81 lines
3.1 KiB
C
81 lines
3.1 KiB
C
/*
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* QEMU PowerMac emulation shared definitions and prototypes
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*
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* Copyright (c) 2004-2007 Fabrice Bellard
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#if !defined(__PPC_MAC_H__)
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#define __PPC_MAC_H__
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#include "memory.h"
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/* SMP is not enabled, for now */
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#define MAX_CPUS 1
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#define BIOS_SIZE (1024 * 1024)
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#define BIOS_FILENAME "ppc_rom.bin"
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#define NVRAM_SIZE 0x2000
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#define PROM_FILENAME "openbios-ppc"
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#define PROM_ADDR 0xfff00000
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#define KERNEL_LOAD_ADDR 0x01000000
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#define KERNEL_GAP 0x00100000
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#define ESCC_CLOCK 3686400
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/* Cuda */
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void cuda_init (MemoryRegion **cuda_mem, qemu_irq irq);
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/* MacIO */
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void macio_init (PCIBus *bus, int device_id, int is_oldworld,
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MemoryRegion *pic_mem, MemoryRegion *dbdma_mem,
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MemoryRegion *cuda_mem, void *nvram,
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int nb_ide, MemoryRegion **ide_mem, MemoryRegion *escc_mem);
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/* Heathrow PIC */
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qemu_irq *heathrow_pic_init(MemoryRegion **pmem,
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int nb_cpus, qemu_irq **irqs);
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/* Grackle PCI */
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PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io);
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/* UniNorth PCI */
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PCIBus *pci_pmac_init(qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io);
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PCIBus *pci_pmac_u3_init(qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io);
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/* Mac NVRAM */
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typedef struct MacIONVRAMState MacIONVRAMState;
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MacIONVRAMState *macio_nvram_init (target_phys_addr_t size,
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unsigned int it_shift);
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void macio_nvram_setup_bar(MacIONVRAMState *s, MemoryRegion *bar,
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target_phys_addr_t mem_base);
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void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
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uint32_t macio_nvram_read (void *opaque, uint32_t addr);
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void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);
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#endif /* !defined(__PPC_MAC_H__) */
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