From eba4ca3b13d4f0f88626b2aad61adac80007d248 Mon Sep 17 00:00:00 2001 From: hatal175 Date: Wed, 23 Aug 2023 18:40:37 +0300 Subject: [PATCH] Work on d_bg_w (#1894) --- ...__4dBgWFP10fopAc_ac_cP10fopAc_ac_cR4cXyz.s | 14 - .../CaptPolyGrpRp__4dBgWFR13dBgS_CaptPolyii.s | 65 -- .../CaptPolyRp__4dBgWFR13dBgS_CaptPolyi.s | 78 -- ...hkGrpThrough__4dBgWFiP15cBgS_GrpPassChki.s | 32 - ...RC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s | 17 - ...etGrpRoomIndex__4cBgWCFRC13cBgS_PolyInfo.s | 36 - ...GroundCrossGrpRp__4cBgWFP11cBgS_GndChkii.s | 92 -- .../GroundCrossRp__4cBgWFP11cBgS_GndChki.s | 94 -- .../LineCheckGrpRp__4cBgWFP11cBgS_LinChkii.s | 83 -- .../LineCheckRp__4cBgWFP11cBgS_LinChki.s | 108 --- ...RC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s | 12 - .../RoofChkGrpRp__4dBgWFP12dBgS_RoofChkii.s | 89 -- .../RoofChkRp__4dBgWFP12dBgS_RoofChki.s | 82 -- .../RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly.s | 39 - ...oundCheckCommon__4cBgWFfUsP11cBgS_GndChk.s | 64 -- ...wgGroundCheckGnd__4cBgWFUsP11cBgS_GndChk.s | 48 - ...gGroundCheckWall__4cBgWFUsP11cBgS_GndChk.s | 56 -- .../RwgRoofChk__4dBgWFUsP12dBgS_RoofChk.s | 79 -- .../RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw.s | 49 - .../RwgSplGrpChk__4dBgWFUsP14dBgS_SplGrpChk.s | 79 -- .../ShdwDrawGrpRp__4cBgWFP13cBgS_ShdwDrawi.s | 53 -- .../ShdwDrawRp__4cBgWFP13cBgS_ShdwDrawi.s | 78 -- .../SphChkGrpRp__4dBgWFP11dBgS_SphChkPvii.s | 80 -- .../SphChkRp__4dBgWFP11dBgS_SphChkPvi.s | 101 -- ...plGrpChkGrpRp__4dBgWFP14dBgS_SplGrpChkii.s | 89 -- .../SplGrpChkRp__4dBgWFP14dBgS_SplGrpChki.s | 83 -- ...RC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s | 17 - ...allCorrectGrpRpSort__4dBgWFP9dBgS_Acchii.s | 73 -- .../WallCorrectGrpRp__4dBgWFP9dBgS_Acchii.s | 81 -- .../WallCorrectRpSort__4dBgWFP9dBgS_Acchi.s | 67 -- .../WallCorrectRp__4dBgWFP9dBgS_Acchi.s | 83 -- include/SSystem/SComponent/c_bg_s_chk.h | 1 + include/SSystem/SComponent/c_bg_s_gnd_chk.h | 2 + include/SSystem/SComponent/c_bg_s_shdw_draw.h | 3 +- include/SSystem/SComponent/c_m3d.h | 3 + include/SSystem/SComponent/c_m3d_g_aab.h | 14 + include/SSystem/SComponent/c_m3d_g_pla.h | 3 + include/SSystem/SComponent/c_m3d_g_sph.h | 3 + include/d/bg/d_bg_s_acch.h | 1 + include/d/bg/d_bg_s_cap_poly.h | 20 + include/d/bg/d_bg_s_grp_pass_chk.h | 3 +- include/d/bg/d_bg_s_roof_chk.h | 1 + include/d/bg/d_bg_s_spl_grp_chk.h | 1 + include/d/bg/d_bg_w.h | 37 +- src/d/bg/d_bg_w.cpp | 871 +++++++++++++----- src/d/bg/d_bg_w_sv.cpp | 1 + 46 files changed, 697 insertions(+), 2288 deletions(-) delete mode 100644 asm/d/bg/d_bg_w/CallArrowStickCallBack__4dBgWFP10fopAc_ac_cP10fopAc_ac_cR4cXyz.s delete mode 100644 asm/d/bg/d_bg_w/CaptPolyGrpRp__4dBgWFR13dBgS_CaptPolyii.s delete mode 100644 asm/d/bg/d_bg_w/CaptPolyRp__4dBgWFR13dBgS_CaptPolyi.s delete mode 100644 asm/d/bg/d_bg_w/ChkGrpThrough__4dBgWFiP15cBgS_GrpPassChki.s delete mode 100644 asm/d/bg/d_bg_w/CrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s delete mode 100644 asm/d/bg/d_bg_w/GetGrpRoomIndex__4cBgWCFRC13cBgS_PolyInfo.s delete mode 100644 asm/d/bg/d_bg_w/GroundCrossGrpRp__4cBgWFP11cBgS_GndChkii.s delete mode 100644 asm/d/bg/d_bg_w/GroundCrossRp__4cBgWFP11cBgS_GndChki.s delete mode 100644 asm/d/bg/d_bg_w/LineCheckGrpRp__4cBgWFP11cBgS_LinChkii.s delete mode 100644 asm/d/bg/d_bg_w/LineCheckRp__4cBgWFP11cBgS_LinChki.s delete mode 100644 asm/d/bg/d_bg_w/MatrixCrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s delete mode 100644 asm/d/bg/d_bg_w/RoofChkGrpRp__4dBgWFP12dBgS_RoofChkii.s delete mode 100644 asm/d/bg/d_bg_w/RoofChkRp__4dBgWFP12dBgS_RoofChki.s delete mode 100644 asm/d/bg/d_bg_w/RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly.s delete mode 100644 asm/d/bg/d_bg_w/RwgGroundCheckCommon__4cBgWFfUsP11cBgS_GndChk.s delete mode 100644 asm/d/bg/d_bg_w/RwgGroundCheckGnd__4cBgWFUsP11cBgS_GndChk.s delete mode 100644 asm/d/bg/d_bg_w/RwgGroundCheckWall__4cBgWFUsP11cBgS_GndChk.s delete mode 100644 asm/d/bg/d_bg_w/RwgRoofChk__4dBgWFUsP12dBgS_RoofChk.s delete mode 100644 asm/d/bg/d_bg_w/RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw.s delete mode 100644 asm/d/bg/d_bg_w/RwgSplGrpChk__4dBgWFUsP14dBgS_SplGrpChk.s delete mode 100644 asm/d/bg/d_bg_w/ShdwDrawGrpRp__4cBgWFP13cBgS_ShdwDrawi.s delete mode 100644 asm/d/bg/d_bg_w/ShdwDrawRp__4cBgWFP13cBgS_ShdwDrawi.s delete mode 100644 asm/d/bg/d_bg_w/SphChkGrpRp__4dBgWFP11dBgS_SphChkPvii.s delete mode 100644 asm/d/bg/d_bg_w/SphChkRp__4dBgWFP11dBgS_SphChkPvi.s delete mode 100644 asm/d/bg/d_bg_w/SplGrpChkGrpRp__4dBgWFP14dBgS_SplGrpChkii.s delete mode 100644 asm/d/bg/d_bg_w/SplGrpChkRp__4dBgWFP14dBgS_SplGrpChki.s delete mode 100644 asm/d/bg/d_bg_w/TransPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s delete mode 100644 asm/d/bg/d_bg_w/WallCorrectGrpRpSort__4dBgWFP9dBgS_Acchii.s delete mode 100644 asm/d/bg/d_bg_w/WallCorrectGrpRp__4dBgWFP9dBgS_Acchii.s delete mode 100644 asm/d/bg/d_bg_w/WallCorrectRpSort__4dBgWFP9dBgS_Acchi.s delete mode 100644 asm/d/bg/d_bg_w/WallCorrectRp__4dBgWFP9dBgS_Acchi.s create mode 100644 include/d/bg/d_bg_s_cap_poly.h diff --git a/asm/d/bg/d_bg_w/CallArrowStickCallBack__4dBgWFP10fopAc_ac_cP10fopAc_ac_cR4cXyz.s b/asm/d/bg/d_bg_w/CallArrowStickCallBack__4dBgWFP10fopAc_ac_cP10fopAc_ac_cR4cXyz.s deleted file mode 100644 index 0f746040516..00000000000 --- a/asm/d/bg/d_bg_w/CallArrowStickCallBack__4dBgWFP10fopAc_ac_cP10fopAc_ac_cR4cXyz.s +++ /dev/null @@ -1,14 +0,0 @@ -lbl_8007E474: -/* 8007E474 94 21 FF F0 */ stwu r1, -0x10(r1) -/* 8007E478 7C 08 02 A6 */ mflr r0 -/* 8007E47C 90 01 00 14 */ stw r0, 0x14(r1) -/* 8007E480 81 83 00 B8 */ lwz r12, 0xb8(r3) -/* 8007E484 28 0C 00 00 */ cmplwi r12, 0 -/* 8007E488 41 82 00 0C */ beq lbl_8007E494 -/* 8007E48C 7D 89 03 A6 */ mtctr r12 -/* 8007E490 4E 80 04 21 */ bctrl -lbl_8007E494: -/* 8007E494 80 01 00 14 */ lwz r0, 0x14(r1) -/* 8007E498 7C 08 03 A6 */ mtlr r0 -/* 8007E49C 38 21 00 10 */ addi r1, r1, 0x10 -/* 8007E4A0 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/CaptPolyGrpRp__4dBgWFR13dBgS_CaptPolyii.s b/asm/d/bg/d_bg_w/CaptPolyGrpRp__4dBgWFR13dBgS_CaptPolyii.s deleted file mode 100644 index 8ef5a5600cb..00000000000 --- a/asm/d/bg/d_bg_w/CaptPolyGrpRp__4dBgWFR13dBgS_CaptPolyii.s +++ /dev/null @@ -1,65 +0,0 @@ -lbl_8007DA04: -/* 8007DA04 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007DA08 7C 08 02 A6 */ mflr r0 -/* 8007DA0C 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007DA10 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007DA14 48 2E 47 C5 */ bl _savegpr_28 -/* 8007DA18 7C 7D 1B 78 */ mr r29, r3 -/* 8007DA1C 7C 9E 23 78 */ mr r30, r4 -/* 8007DA20 7C BC 2B 78 */ mr r28, r5 -/* 8007DA24 7C DF 33 78 */ mr r31, r6 -/* 8007DA28 38 9E 00 2C */ addi r4, r30, 0x2c -/* 8007DA2C 80 03 00 A8 */ lwz r0, 0xa8(r3) -/* 8007DA30 54 A3 28 34 */ slwi r3, r5, 5 -/* 8007DA34 38 63 00 04 */ addi r3, r3, 4 -/* 8007DA38 7C 60 1A 14 */ add r3, r0, r3 -/* 8007DA3C 48 1E AF AD */ bl cM3d_Cross_AabAab__FPC8cM3dGAabPC8cM3dGAab -/* 8007DA40 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DA44 41 82 00 9C */ beq lbl_8007DAE0 -/* 8007DA48 7F A3 EB 78 */ mr r3, r29 -/* 8007DA4C 7F 84 E3 78 */ mr r4, r28 -/* 8007DA50 80 BE 00 04 */ lwz r5, 4(r30) -/* 8007DA54 7F E6 FB 78 */ mr r6, r31 -/* 8007DA58 81 9D 00 04 */ lwz r12, 4(r29) -/* 8007DA5C 81 8C 01 00 */ lwz r12, 0x100(r12) -/* 8007DA60 7D 89 03 A6 */ mtctr r12 -/* 8007DA64 4E 80 04 21 */ bctrl -/* 8007DA68 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DA6C 40 82 00 74 */ bne lbl_8007DAE0 -/* 8007DA70 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007DA74 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007DA78 1F 9C 00 34 */ mulli r28, r28, 0x34 -/* 8007DA7C 7C 60 E2 14 */ add r3, r0, r28 -/* 8007DA80 A0 A3 00 2E */ lhz r5, 0x2e(r3) -/* 8007DA84 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007DA88 41 82 00 10 */ beq lbl_8007DA98 -/* 8007DA8C 7F A3 EB 78 */ mr r3, r29 -/* 8007DA90 7F C4 F3 78 */ mr r4, r30 -/* 8007DA94 4B FF FE 55 */ bl CaptPolyRp__4dBgWFR13dBgS_CaptPolyi -lbl_8007DA98: -/* 8007DA98 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007DA9C 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007DAA0 7C 60 E2 14 */ add r3, r0, r28 -/* 8007DAA4 A3 83 00 28 */ lhz r28, 0x28(r3) -lbl_8007DAA8: -/* 8007DAA8 3C 1C 00 00 */ addis r0, r28, 0 -/* 8007DAAC 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007DAB0 41 82 00 30 */ beq lbl_8007DAE0 -/* 8007DAB4 7F A3 EB 78 */ mr r3, r29 -/* 8007DAB8 7F C4 F3 78 */ mr r4, r30 -/* 8007DABC 7F 85 E3 78 */ mr r5, r28 -/* 8007DAC0 38 DF 00 01 */ addi r6, r31, 1 -/* 8007DAC4 4B FF FF 41 */ bl CaptPolyGrpRp__4dBgWFR13dBgS_CaptPolyii -/* 8007DAC8 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007DACC 80 83 00 24 */ lwz r4, 0x24(r3) -/* 8007DAD0 1C 7C 00 34 */ mulli r3, r28, 0x34 -/* 8007DAD4 38 03 00 26 */ addi r0, r3, 0x26 -/* 8007DAD8 7F 84 02 2E */ lhzx r28, r4, r0 -/* 8007DADC 4B FF FF CC */ b lbl_8007DAA8 -lbl_8007DAE0: -/* 8007DAE0 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007DAE4 48 2E 47 41 */ bl _restgpr_28 -/* 8007DAE8 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007DAEC 7C 08 03 A6 */ mtlr r0 -/* 8007DAF0 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007DAF4 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/CaptPolyRp__4dBgWFR13dBgS_CaptPolyi.s b/asm/d/bg/d_bg_w/CaptPolyRp__4dBgWFR13dBgS_CaptPolyi.s deleted file mode 100644 index 87f276a7f69..00000000000 --- a/asm/d/bg/d_bg_w/CaptPolyRp__4dBgWFR13dBgS_CaptPolyi.s +++ /dev/null @@ -1,78 +0,0 @@ -lbl_8007D8E8: -/* 8007D8E8 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007D8EC 7C 08 02 A6 */ mflr r0 -/* 8007D8F0 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007D8F4 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D8F8 48 2E 48 DD */ bl _savegpr_27 -/* 8007D8FC 7C 7E 1B 78 */ mr r30, r3 -/* 8007D900 7C 9F 23 78 */ mr r31, r4 -/* 8007D904 7C BB 2B 78 */ mr r27, r5 -/* 8007D908 38 9F 00 2C */ addi r4, r31, 0x2c -/* 8007D90C 80 63 00 AC */ lwz r3, 0xac(r3) -/* 8007D910 1C 1B 00 1C */ mulli r0, r27, 0x1c -/* 8007D914 7C 63 02 14 */ add r3, r3, r0 -/* 8007D918 48 1E B0 D1 */ bl cM3d_Cross_AabAab__FPC8cM3dGAabPC8cM3dGAab -/* 8007D91C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D920 41 82 00 CC */ beq lbl_8007D9EC -/* 8007D924 80 7E 00 A0 */ lwz r3, 0xa0(r30) -/* 8007D928 80 63 00 1C */ lwz r3, 0x1c(r3) -/* 8007D92C 1C 1B 00 14 */ mulli r0, r27, 0x14 -/* 8007D930 7F 83 02 14 */ add r28, r3, r0 -/* 8007D934 A0 1C 00 00 */ lhz r0, 0(r28) -/* 8007D938 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007D93C 41 82 00 7C */ beq lbl_8007D9B8 -/* 8007D940 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007D944 A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007D948 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007D94C 7C 63 02 14 */ add r3, r3, r0 -/* 8007D950 A0 83 00 02 */ lhz r4, 2(r3) -/* 8007D954 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007D958 41 82 00 10 */ beq lbl_8007D968 -/* 8007D95C 7F C3 F3 78 */ mr r3, r30 -/* 8007D960 7F E5 FB 78 */ mr r5, r31 -/* 8007D964 4B FF FE F5 */ bl RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly -lbl_8007D968: -/* 8007D968 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007D96C A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007D970 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007D974 7C 83 02 2E */ lhzx r4, r3, r0 -/* 8007D978 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007D97C 41 82 00 10 */ beq lbl_8007D98C -/* 8007D980 7F C3 F3 78 */ mr r3, r30 -/* 8007D984 7F E5 FB 78 */ mr r5, r31 -/* 8007D988 4B FF FE D1 */ bl RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly -lbl_8007D98C: -/* 8007D98C 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007D990 A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007D994 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007D998 7C 63 02 14 */ add r3, r3, r0 -/* 8007D99C A0 83 00 04 */ lhz r4, 4(r3) -/* 8007D9A0 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007D9A4 41 82 00 48 */ beq lbl_8007D9EC -/* 8007D9A8 7F C3 F3 78 */ mr r3, r30 -/* 8007D9AC 7F E5 FB 78 */ mr r5, r31 -/* 8007D9B0 4B FF FE A9 */ bl RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly -/* 8007D9B4 48 00 00 38 */ b lbl_8007D9EC -lbl_8007D9B8: -/* 8007D9B8 3B 60 00 00 */ li r27, 0 -/* 8007D9BC 3B A0 00 00 */ li r29, 0 -lbl_8007D9C0: -/* 8007D9C0 38 1D 00 04 */ addi r0, r29, 4 -/* 8007D9C4 7C BC 02 2E */ lhzx r5, r28, r0 -/* 8007D9C8 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007D9CC 41 82 00 10 */ beq lbl_8007D9DC -/* 8007D9D0 7F C3 F3 78 */ mr r3, r30 -/* 8007D9D4 7F E4 FB 78 */ mr r4, r31 -/* 8007D9D8 4B FF FF 11 */ bl CaptPolyRp__4dBgWFR13dBgS_CaptPolyi -lbl_8007D9DC: -/* 8007D9DC 3B 7B 00 01 */ addi r27, r27, 1 -/* 8007D9E0 2C 1B 00 08 */ cmpwi r27, 8 -/* 8007D9E4 3B BD 00 02 */ addi r29, r29, 2 -/* 8007D9E8 41 80 FF D8 */ blt lbl_8007D9C0 -lbl_8007D9EC: -/* 8007D9EC 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D9F0 48 2E 48 31 */ bl _restgpr_27 -/* 8007D9F4 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007D9F8 7C 08 03 A6 */ mtlr r0 -/* 8007D9FC 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007DA00 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/ChkGrpThrough__4dBgWFiP15cBgS_GrpPassChki.s b/asm/d/bg/d_bg_w/ChkGrpThrough__4dBgWFiP15cBgS_GrpPassChki.s deleted file mode 100644 index b8dcbbc085f..00000000000 --- a/asm/d/bg/d_bg_w/ChkGrpThrough__4dBgWFiP15cBgS_GrpPassChki.s +++ /dev/null @@ -1,32 +0,0 @@ -lbl_8007E3D8: -/* 8007E3D8 2C 06 00 02 */ cmpwi r6, 2 -/* 8007E3DC 40 82 00 0C */ bne lbl_8007E3E8 -/* 8007E3E0 28 05 00 00 */ cmplwi r5, 0 -/* 8007E3E4 40 82 00 0C */ bne lbl_8007E3F0 -lbl_8007E3E8: -/* 8007E3E8 38 60 00 00 */ li r3, 0 -/* 8007E3EC 4E 80 00 20 */ blr -lbl_8007E3F0: -/* 8007E3F0 80 63 00 A0 */ lwz r3, 0xa0(r3) -/* 8007E3F4 80 63 00 24 */ lwz r3, 0x24(r3) -/* 8007E3F8 1C 04 00 34 */ mulli r0, r4, 0x34 -/* 8007E3FC 7C 63 02 14 */ add r3, r3, r0 -/* 8007E400 80 03 00 30 */ lwz r0, 0x30(r3) -/* 8007E404 54 03 05 EF */ rlwinm. r3, r0, 0, 0x17, 0x17 -/* 8007E408 40 82 00 18 */ bne lbl_8007E420 -/* 8007E40C 80 05 00 04 */ lwz r0, 4(r5) -/* 8007E410 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007E414 41 82 00 0C */ beq lbl_8007E420 -/* 8007E418 38 60 00 00 */ li r3, 0 -/* 8007E41C 4E 80 00 20 */ blr -lbl_8007E420: -/* 8007E420 28 03 00 00 */ cmplwi r3, 0 -/* 8007E424 41 82 00 18 */ beq lbl_8007E43C -/* 8007E428 80 05 00 04 */ lwz r0, 4(r5) -/* 8007E42C 54 00 07 BD */ rlwinm. r0, r0, 0, 0x1e, 0x1e -/* 8007E430 41 82 00 0C */ beq lbl_8007E43C -/* 8007E434 38 60 00 00 */ li r3, 0 -/* 8007E438 4E 80 00 20 */ blr -lbl_8007E43C: -/* 8007E43C 38 60 00 01 */ li r3, 1 -/* 8007E440 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/CrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s b/asm/d/bg/d_bg_w/CrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s deleted file mode 100644 index dfcb7924df0..00000000000 --- a/asm/d/bg/d_bg_w/CrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s +++ /dev/null @@ -1,17 +0,0 @@ -lbl_8007DF88: -/* 8007DF88 94 21 FF F0 */ stwu r1, -0x10(r1) -/* 8007DF8C 7C 08 02 A6 */ mflr r0 -/* 8007DF90 90 01 00 14 */ stw r0, 0x14(r1) -/* 8007DF94 7C 80 23 78 */ mr r0, r4 -/* 8007DF98 81 83 00 B0 */ lwz r12, 0xb0(r3) -/* 8007DF9C 28 0C 00 00 */ cmplwi r12, 0 -/* 8007DFA0 41 82 00 14 */ beq lbl_8007DFB4 -/* 8007DFA4 7C A4 2B 78 */ mr r4, r5 -/* 8007DFA8 7C 05 03 78 */ mr r5, r0 -/* 8007DFAC 7D 89 03 A6 */ mtctr r12 -/* 8007DFB0 4E 80 04 21 */ bctrl -lbl_8007DFB4: -/* 8007DFB4 80 01 00 14 */ lwz r0, 0x14(r1) -/* 8007DFB8 7C 08 03 A6 */ mtlr r0 -/* 8007DFBC 38 21 00 10 */ addi r1, r1, 0x10 -/* 8007DFC0 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/GetGrpRoomIndex__4cBgWCFRC13cBgS_PolyInfo.s b/asm/d/bg/d_bg_w/GetGrpRoomIndex__4cBgWCFRC13cBgS_PolyInfo.s deleted file mode 100644 index 7ea0a7d71e6..00000000000 --- a/asm/d/bg/d_bg_w/GetGrpRoomIndex__4cBgWCFRC13cBgS_PolyInfo.s +++ /dev/null @@ -1,36 +0,0 @@ -lbl_8007B0E4: -/* 8007B0E4 94 21 FF F0 */ stwu r1, -0x10(r1) -/* 8007B0E8 7C 08 02 A6 */ mflr r0 -/* 8007B0EC 90 01 00 14 */ stw r0, 0x14(r1) -/* 8007B0F0 93 E1 00 0C */ stw r31, 0xc(r1) -/* 8007B0F4 7C 7F 1B 78 */ mr r31, r3 -/* 8007B0F8 A0 84 00 00 */ lhz r4, 0(r4) -/* 8007B0FC 48 00 08 35 */ bl GetTriGrp__4cBgWCFi -/* 8007B100 80 9F 00 A0 */ lwz r4, 0xa0(r31) -/* 8007B104 80 84 00 24 */ lwz r4, 0x24(r4) -/* 8007B108 1C 03 00 34 */ mulli r0, r3, 0x34 -/* 8007B10C 7C 64 02 14 */ add r3, r4, r0 -/* 8007B110 A0 03 00 24 */ lhz r0, 0x24(r3) -/* 8007B114 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007B118 41 82 00 18 */ beq lbl_8007B130 -/* 8007B11C 1C 00 00 34 */ mulli r0, r0, 0x34 -/* 8007B120 7C 64 02 14 */ add r3, r4, r0 -/* 8007B124 A0 03 00 24 */ lhz r0, 0x24(r3) -/* 8007B128 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007B12C 40 82 00 0C */ bne lbl_8007B138 -lbl_8007B130: -/* 8007B130 38 60 00 FF */ li r3, 0xff -/* 8007B134 48 00 00 1C */ b lbl_8007B150 -lbl_8007B138: -/* 8007B138 1C 00 00 34 */ mulli r0, r0, 0x34 -/* 8007B13C 7C 64 02 14 */ add r3, r4, r0 -/* 8007B140 A0 63 00 2A */ lhz r3, 0x2a(r3) -/* 8007B144 2C 03 00 FF */ cmpwi r3, 0xff -/* 8007B148 41 80 00 08 */ blt lbl_8007B150 -/* 8007B14C 38 60 00 FF */ li r3, 0xff -lbl_8007B150: -/* 8007B150 83 E1 00 0C */ lwz r31, 0xc(r1) -/* 8007B154 80 01 00 14 */ lwz r0, 0x14(r1) -/* 8007B158 7C 08 03 A6 */ mtlr r0 -/* 8007B15C 38 21 00 10 */ addi r1, r1, 0x10 -/* 8007B160 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/GroundCrossGrpRp__4cBgWFP11cBgS_GndChkii.s b/asm/d/bg/d_bg_w/GroundCrossGrpRp__4cBgWFP11cBgS_GndChkii.s deleted file mode 100644 index 8a474205193..00000000000 --- a/asm/d/bg/d_bg_w/GroundCrossGrpRp__4cBgWFP11cBgS_GndChkii.s +++ /dev/null @@ -1,92 +0,0 @@ -lbl_8007AA50: -/* 8007AA50 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007AA54 7C 08 02 A6 */ mflr r0 -/* 8007AA58 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007AA5C 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007AA60 48 2E 77 71 */ bl _savegpr_26 -/* 8007AA64 7C 7C 1B 78 */ mr r28, r3 -/* 8007AA68 7C 9D 23 78 */ mr r29, r4 -/* 8007AA6C 7C BA 2B 78 */ mr r26, r5 -/* 8007AA70 7C DE 33 78 */ mr r30, r6 -/* 8007AA74 80 63 00 A8 */ lwz r3, 0xa8(r3) -/* 8007AA78 54 A0 28 34 */ slwi r0, r5, 5 -/* 8007AA7C 7F 63 02 14 */ add r27, r3, r0 -/* 8007AA80 38 7B 00 04 */ addi r3, r27, 4 -/* 8007AA84 38 9D 00 24 */ addi r4, r29, 0x24 -/* 8007AA88 48 1F 42 01 */ bl CrossY__8cM3dGAabCFPC4cXyz -/* 8007AA8C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AA90 41 82 00 2C */ beq lbl_8007AABC -/* 8007AA94 38 7B 00 04 */ addi r3, r27, 4 -/* 8007AA98 C0 3D 00 28 */ lfs f1, 0x28(r29) -/* 8007AA9C 48 1F 42 35 */ bl UnderPlaneYUnder__8cM3dGAabCFf -/* 8007AAA0 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AAA4 41 82 00 18 */ beq lbl_8007AABC -/* 8007AAA8 38 7B 00 04 */ addi r3, r27, 4 -/* 8007AAAC C0 3D 00 34 */ lfs f1, 0x34(r29) -/* 8007AAB0 48 1F 42 35 */ bl TopPlaneYUnder__8cM3dGAabCFf -/* 8007AAB4 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AAB8 41 82 00 0C */ beq lbl_8007AAC4 -lbl_8007AABC: -/* 8007AABC 38 60 00 00 */ li r3, 0 -/* 8007AAC0 48 00 00 C4 */ b lbl_8007AB84 -lbl_8007AAC4: -/* 8007AAC4 7F 83 E3 78 */ mr r3, r28 -/* 8007AAC8 7F 44 D3 78 */ mr r4, r26 -/* 8007AACC 80 BD 00 04 */ lwz r5, 4(r29) -/* 8007AAD0 7F C6 F3 78 */ mr r6, r30 -/* 8007AAD4 81 9C 00 04 */ lwz r12, 4(r28) -/* 8007AAD8 81 8C 01 00 */ lwz r12, 0x100(r12) -/* 8007AADC 7D 89 03 A6 */ mtctr r12 -/* 8007AAE0 4E 80 04 21 */ bctrl -/* 8007AAE4 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AAE8 41 82 00 0C */ beq lbl_8007AAF4 -/* 8007AAEC 38 60 00 00 */ li r3, 0 -/* 8007AAF0 48 00 00 94 */ b lbl_8007AB84 -lbl_8007AAF4: -/* 8007AAF4 3B E0 00 00 */ li r31, 0 -/* 8007AAF8 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007AAFC 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007AB00 1F 7A 00 34 */ mulli r27, r26, 0x34 -/* 8007AB04 7C 60 DA 14 */ add r3, r0, r27 -/* 8007AB08 A0 A3 00 2E */ lhz r5, 0x2e(r3) -/* 8007AB0C 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007AB10 41 82 00 1C */ beq lbl_8007AB2C -/* 8007AB14 7F 83 E3 78 */ mr r3, r28 -/* 8007AB18 7F A4 EB 78 */ mr r4, r29 -/* 8007AB1C 4B FF FD D9 */ bl GroundCrossRp__4cBgWFP11cBgS_GndChki -/* 8007AB20 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AB24 41 82 00 08 */ beq lbl_8007AB2C -/* 8007AB28 3B E0 00 01 */ li r31, 1 -lbl_8007AB2C: -/* 8007AB2C 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007AB30 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007AB34 7C 60 DA 14 */ add r3, r0, r27 -/* 8007AB38 A3 63 00 28 */ lhz r27, 0x28(r3) -lbl_8007AB3C: -/* 8007AB3C 3C 1B 00 00 */ addis r0, r27, 0 -/* 8007AB40 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007AB44 41 82 00 3C */ beq lbl_8007AB80 -/* 8007AB48 7F 83 E3 78 */ mr r3, r28 -/* 8007AB4C 7F A4 EB 78 */ mr r4, r29 -/* 8007AB50 7F 65 DB 78 */ mr r5, r27 -/* 8007AB54 38 DE 00 01 */ addi r6, r30, 1 -/* 8007AB58 4B FF FE F9 */ bl GroundCrossGrpRp__4cBgWFP11cBgS_GndChkii -/* 8007AB5C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AB60 41 82 00 08 */ beq lbl_8007AB68 -/* 8007AB64 3B E0 00 01 */ li r31, 1 -lbl_8007AB68: -/* 8007AB68 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007AB6C 80 83 00 24 */ lwz r4, 0x24(r3) -/* 8007AB70 1C 7B 00 34 */ mulli r3, r27, 0x34 -/* 8007AB74 38 03 00 26 */ addi r0, r3, 0x26 -/* 8007AB78 7F 64 02 2E */ lhzx r27, r4, r0 -/* 8007AB7C 4B FF FF C0 */ b lbl_8007AB3C -lbl_8007AB80: -/* 8007AB80 7F E3 FB 78 */ mr r3, r31 -lbl_8007AB84: -/* 8007AB84 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007AB88 48 2E 76 95 */ bl _restgpr_26 -/* 8007AB8C 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007AB90 7C 08 03 A6 */ mtlr r0 -/* 8007AB94 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007AB98 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/GroundCrossRp__4cBgWFP11cBgS_GndChki.s b/asm/d/bg/d_bg_w/GroundCrossRp__4cBgWFP11cBgS_GndChki.s deleted file mode 100644 index 15fd294789e..00000000000 --- a/asm/d/bg/d_bg_w/GroundCrossRp__4cBgWFP11cBgS_GndChki.s +++ /dev/null @@ -1,94 +0,0 @@ -lbl_8007A8F4: -/* 8007A8F4 94 21 FF D0 */ stwu r1, -0x30(r1) -/* 8007A8F8 7C 08 02 A6 */ mflr r0 -/* 8007A8FC 90 01 00 34 */ stw r0, 0x34(r1) -/* 8007A900 39 61 00 30 */ addi r11, r1, 0x30 -/* 8007A904 48 2E 78 C5 */ bl _savegpr_24 -/* 8007A908 7C 7C 1B 78 */ mr r28, r3 -/* 8007A90C 7C 9D 23 78 */ mr r29, r4 -/* 8007A910 3B E0 00 00 */ li r31, 0 -/* 8007A914 80 83 00 A0 */ lwz r4, 0xa0(r3) -/* 8007A918 80 84 00 1C */ lwz r4, 0x1c(r4) -/* 8007A91C 1C 05 00 14 */ mulli r0, r5, 0x14 -/* 8007A920 7F C4 02 14 */ add r30, r4, r0 -/* 8007A924 A0 1E 00 00 */ lhz r0, 0(r30) -/* 8007A928 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007A92C 41 82 00 7C */ beq lbl_8007A9A8 -/* 8007A930 80 9C 00 A4 */ lwz r4, 0xa4(r28) -/* 8007A934 A0 1E 00 04 */ lhz r0, 4(r30) -/* 8007A938 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007A93C 7C 84 02 14 */ add r4, r4, r0 -/* 8007A940 A0 84 00 04 */ lhz r4, 4(r4) -/* 8007A944 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007A948 41 82 00 18 */ beq lbl_8007A960 -/* 8007A94C 7F A5 EB 78 */ mr r5, r29 -/* 8007A950 4B FF FE 25 */ bl RwgGroundCheckGnd__4cBgWFUsP11cBgS_GndChk -/* 8007A954 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A958 41 82 00 08 */ beq lbl_8007A960 -/* 8007A95C 3B E0 00 01 */ li r31, 1 -lbl_8007A960: -/* 8007A960 80 1D 00 38 */ lwz r0, 0x38(r29) -/* 8007A964 28 00 00 00 */ cmplwi r0, 0 -/* 8007A968 41 82 00 38 */ beq lbl_8007A9A0 -/* 8007A96C 80 7C 00 A4 */ lwz r3, 0xa4(r28) -/* 8007A970 A0 1E 00 04 */ lhz r0, 4(r30) -/* 8007A974 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007A978 7C 63 02 14 */ add r3, r3, r0 -/* 8007A97C A0 83 00 02 */ lhz r4, 2(r3) -/* 8007A980 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007A984 41 82 00 1C */ beq lbl_8007A9A0 -/* 8007A988 7F 83 E3 78 */ mr r3, r28 -/* 8007A98C 7F A5 EB 78 */ mr r5, r29 -/* 8007A990 4B FF FE 95 */ bl RwgGroundCheckWall__4cBgWFUsP11cBgS_GndChk -/* 8007A994 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A998 41 82 00 08 */ beq lbl_8007A9A0 -/* 8007A99C 3B E0 00 01 */ li r31, 1 -lbl_8007A9A0: -/* 8007A9A0 7F E3 FB 78 */ mr r3, r31 -/* 8007A9A4 48 00 00 94 */ b lbl_8007AA38 -lbl_8007A9A8: -/* 8007A9A8 3B 20 00 00 */ li r25, 0 -/* 8007A9AC 3B 60 00 00 */ li r27, 0 -lbl_8007A9B0: -/* 8007A9B0 3B 5B 00 04 */ addi r26, r27, 4 -/* 8007A9B4 7C 1E D2 2E */ lhzx r0, r30, r26 -/* 8007A9B8 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007A9BC 41 82 00 68 */ beq lbl_8007AA24 -/* 8007A9C0 80 7C 00 AC */ lwz r3, 0xac(r28) -/* 8007A9C4 1C 00 00 1C */ mulli r0, r0, 0x1c -/* 8007A9C8 7F 03 02 14 */ add r24, r3, r0 -/* 8007A9CC 7F 03 C3 78 */ mr r3, r24 -/* 8007A9D0 38 9D 00 24 */ addi r4, r29, 0x24 -/* 8007A9D4 48 1F 42 B5 */ bl CrossY__8cM3dGAabCFPC4cXyz -/* 8007A9D8 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A9DC 41 82 00 48 */ beq lbl_8007AA24 -/* 8007A9E0 7F 03 C3 78 */ mr r3, r24 -/* 8007A9E4 C0 3D 00 28 */ lfs f1, 0x28(r29) -/* 8007A9E8 48 1F 42 E9 */ bl UnderPlaneYUnder__8cM3dGAabCFf -/* 8007A9EC 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A9F0 41 82 00 34 */ beq lbl_8007AA24 -/* 8007A9F4 7F 03 C3 78 */ mr r3, r24 -/* 8007A9F8 C0 3D 00 34 */ lfs f1, 0x34(r29) -/* 8007A9FC 48 1F 42 E9 */ bl TopPlaneYUnder__8cM3dGAabCFf -/* 8007AA00 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AA04 40 82 00 20 */ bne lbl_8007AA24 -/* 8007AA08 7F 83 E3 78 */ mr r3, r28 -/* 8007AA0C 7F A4 EB 78 */ mr r4, r29 -/* 8007AA10 7C BE D2 2E */ lhzx r5, r30, r26 -/* 8007AA14 4B FF FE E1 */ bl GroundCrossRp__4cBgWFP11cBgS_GndChki -/* 8007AA18 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AA1C 41 82 00 08 */ beq lbl_8007AA24 -/* 8007AA20 3B E0 00 01 */ li r31, 1 -lbl_8007AA24: -/* 8007AA24 3B 39 00 01 */ addi r25, r25, 1 -/* 8007AA28 2C 19 00 08 */ cmpwi r25, 8 -/* 8007AA2C 3B 7B 00 02 */ addi r27, r27, 2 -/* 8007AA30 41 80 FF 80 */ blt lbl_8007A9B0 -/* 8007AA34 7F E3 FB 78 */ mr r3, r31 -lbl_8007AA38: -/* 8007AA38 39 61 00 30 */ addi r11, r1, 0x30 -/* 8007AA3C 48 2E 77 D9 */ bl _restgpr_24 -/* 8007AA40 80 01 00 34 */ lwz r0, 0x34(r1) -/* 8007AA44 7C 08 03 A6 */ mtlr r0 -/* 8007AA48 38 21 00 30 */ addi r1, r1, 0x30 -/* 8007AA4C 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/LineCheckGrpRp__4cBgWFP11cBgS_LinChkii.s b/asm/d/bg/d_bg_w/LineCheckGrpRp__4cBgWFP11cBgS_LinChkii.s deleted file mode 100644 index 3b6fdb29a38..00000000000 --- a/asm/d/bg/d_bg_w/LineCheckGrpRp__4cBgWFP11cBgS_LinChkii.s +++ /dev/null @@ -1,83 +0,0 @@ -lbl_8007A52C: -/* 8007A52C 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007A530 7C 08 02 A6 */ mflr r0 -/* 8007A534 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007A538 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A53C 48 2E 7C 99 */ bl _savegpr_27 -/* 8007A540 7C 7C 1B 78 */ mr r28, r3 -/* 8007A544 7C 9D 23 78 */ mr r29, r4 -/* 8007A548 7C BB 2B 78 */ mr r27, r5 -/* 8007A54C 7C DE 33 78 */ mr r30, r6 -/* 8007A550 38 BD 00 24 */ addi r5, r29, 0x24 -/* 8007A554 80 03 00 A8 */ lwz r0, 0xa8(r3) -/* 8007A558 57 63 28 34 */ slwi r3, r27, 5 -/* 8007A55C 38 63 00 04 */ addi r3, r3, 4 -/* 8007A560 7C 60 1A 14 */ add r3, r0, r3 -/* 8007A564 38 83 00 0C */ addi r4, r3, 0xc -/* 8007A568 38 C5 00 0C */ addi r6, r5, 0xc -/* 8007A56C 48 1E EA E5 */ bl cM3d_Cross_MinMaxBoxLine__FPC3VecPC3VecPC3VecPC3Vec -/* 8007A570 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A574 40 82 00 0C */ bne lbl_8007A580 -/* 8007A578 38 60 00 00 */ li r3, 0 -/* 8007A57C 48 00 00 C4 */ b lbl_8007A640 -lbl_8007A580: -/* 8007A580 7F 83 E3 78 */ mr r3, r28 -/* 8007A584 7F 64 DB 78 */ mr r4, r27 -/* 8007A588 80 BD 00 04 */ lwz r5, 4(r29) -/* 8007A58C 7F C6 F3 78 */ mr r6, r30 -/* 8007A590 81 9C 00 04 */ lwz r12, 4(r28) -/* 8007A594 81 8C 01 00 */ lwz r12, 0x100(r12) -/* 8007A598 7D 89 03 A6 */ mtctr r12 -/* 8007A59C 4E 80 04 21 */ bctrl -/* 8007A5A0 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A5A4 41 82 00 0C */ beq lbl_8007A5B0 -/* 8007A5A8 38 60 00 00 */ li r3, 0 -/* 8007A5AC 48 00 00 94 */ b lbl_8007A640 -lbl_8007A5B0: -/* 8007A5B0 3B E0 00 00 */ li r31, 0 -/* 8007A5B4 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007A5B8 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007A5BC 1F 7B 00 34 */ mulli r27, r27, 0x34 -/* 8007A5C0 7C 60 DA 14 */ add r3, r0, r27 -/* 8007A5C4 A0 A3 00 2E */ lhz r5, 0x2e(r3) -/* 8007A5C8 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007A5CC 41 82 00 1C */ beq lbl_8007A5E8 -/* 8007A5D0 7F 83 E3 78 */ mr r3, r28 -/* 8007A5D4 7F A4 EB 78 */ mr r4, r29 -/* 8007A5D8 4B FF FD C9 */ bl LineCheckRp__4cBgWFP11cBgS_LinChki -/* 8007A5DC 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A5E0 41 82 00 08 */ beq lbl_8007A5E8 -/* 8007A5E4 3B E0 00 01 */ li r31, 1 -lbl_8007A5E8: -/* 8007A5E8 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007A5EC 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007A5F0 7C 60 DA 14 */ add r3, r0, r27 -/* 8007A5F4 A3 63 00 28 */ lhz r27, 0x28(r3) -lbl_8007A5F8: -/* 8007A5F8 3C 1B 00 00 */ addis r0, r27, 0 -/* 8007A5FC 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007A600 41 82 00 3C */ beq lbl_8007A63C -/* 8007A604 7F 83 E3 78 */ mr r3, r28 -/* 8007A608 7F A4 EB 78 */ mr r4, r29 -/* 8007A60C 7F 65 DB 78 */ mr r5, r27 -/* 8007A610 38 DE 00 01 */ addi r6, r30, 1 -/* 8007A614 4B FF FF 19 */ bl LineCheckGrpRp__4cBgWFP11cBgS_LinChkii -/* 8007A618 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A61C 41 82 00 08 */ beq lbl_8007A624 -/* 8007A620 3B E0 00 01 */ li r31, 1 -lbl_8007A624: -/* 8007A624 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007A628 80 83 00 24 */ lwz r4, 0x24(r3) -/* 8007A62C 1C 7B 00 34 */ mulli r3, r27, 0x34 -/* 8007A630 38 03 00 26 */ addi r0, r3, 0x26 -/* 8007A634 7F 64 02 2E */ lhzx r27, r4, r0 -/* 8007A638 4B FF FF C0 */ b lbl_8007A5F8 -lbl_8007A63C: -/* 8007A63C 7F E3 FB 78 */ mr r3, r31 -lbl_8007A640: -/* 8007A640 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A644 48 2E 7B DD */ bl _restgpr_27 -/* 8007A648 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007A64C 7C 08 03 A6 */ mtlr r0 -/* 8007A650 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007A654 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/LineCheckRp__4cBgWFP11cBgS_LinChki.s b/asm/d/bg/d_bg_w/LineCheckRp__4cBgWFP11cBgS_LinChki.s deleted file mode 100644 index 10c91457cfc..00000000000 --- a/asm/d/bg/d_bg_w/LineCheckRp__4cBgWFP11cBgS_LinChki.s +++ /dev/null @@ -1,108 +0,0 @@ -lbl_8007A3A0: -/* 8007A3A0 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007A3A4 7C 08 02 A6 */ mflr r0 -/* 8007A3A8 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007A3AC 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A3B0 48 2E 7E 21 */ bl _savegpr_26 -/* 8007A3B4 7C 7C 1B 78 */ mr r28, r3 -/* 8007A3B8 7C 9D 23 78 */ mr r29, r4 -/* 8007A3BC 7C BA 2B 78 */ mr r26, r5 -/* 8007A3C0 80 63 00 AC */ lwz r3, 0xac(r3) -/* 8007A3C4 1C 1A 00 1C */ mulli r0, r26, 0x1c -/* 8007A3C8 7C 63 02 14 */ add r3, r3, r0 -/* 8007A3CC 38 BD 00 24 */ addi r5, r29, 0x24 -/* 8007A3D0 38 C5 00 0C */ addi r6, r5, 0xc -/* 8007A3D4 38 83 00 0C */ addi r4, r3, 0xc -/* 8007A3D8 48 1E EC 79 */ bl cM3d_Cross_MinMaxBoxLine__FPC3VecPC3VecPC3VecPC3Vec -/* 8007A3DC 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A3E0 40 82 00 0C */ bne lbl_8007A3EC -/* 8007A3E4 38 60 00 00 */ li r3, 0 -/* 8007A3E8 48 00 01 2C */ b lbl_8007A514 -lbl_8007A3EC: -/* 8007A3EC 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007A3F0 80 63 00 1C */ lwz r3, 0x1c(r3) -/* 8007A3F4 1C 1A 00 14 */ mulli r0, r26, 0x14 -/* 8007A3F8 7F E3 02 14 */ add r31, r3, r0 -/* 8007A3FC 3B C0 00 00 */ li r30, 0 -/* 8007A400 A0 1F 00 00 */ lhz r0, 0(r31) -/* 8007A404 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007A408 41 82 00 C8 */ beq lbl_8007A4D0 -/* 8007A40C 88 1D 00 50 */ lbz r0, 0x50(r29) -/* 8007A410 28 00 00 00 */ cmplwi r0, 0 -/* 8007A414 41 82 00 38 */ beq lbl_8007A44C -/* 8007A418 80 7C 00 A4 */ lwz r3, 0xa4(r28) -/* 8007A41C A0 1F 00 04 */ lhz r0, 4(r31) -/* 8007A420 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007A424 7C 63 02 14 */ add r3, r3, r0 -/* 8007A428 A0 83 00 02 */ lhz r4, 2(r3) -/* 8007A42C 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007A430 41 82 00 1C */ beq lbl_8007A44C -/* 8007A434 7F 83 E3 78 */ mr r3, r28 -/* 8007A438 7F A5 EB 78 */ mr r5, r29 -/* 8007A43C 4B FF FD C5 */ bl RwgLineCheck__4cBgWFUsP11cBgS_LinChk -/* 8007A440 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A444 41 82 00 08 */ beq lbl_8007A44C -/* 8007A448 3B C0 00 01 */ li r30, 1 -lbl_8007A44C: -/* 8007A44C 88 1D 00 51 */ lbz r0, 0x51(r29) -/* 8007A450 28 00 00 00 */ cmplwi r0, 0 -/* 8007A454 41 82 00 38 */ beq lbl_8007A48C -/* 8007A458 80 7C 00 A4 */ lwz r3, 0xa4(r28) -/* 8007A45C A0 1F 00 04 */ lhz r0, 4(r31) -/* 8007A460 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007A464 7C 63 02 14 */ add r3, r3, r0 -/* 8007A468 A0 83 00 04 */ lhz r4, 4(r3) -/* 8007A46C 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007A470 41 82 00 1C */ beq lbl_8007A48C -/* 8007A474 7F 83 E3 78 */ mr r3, r28 -/* 8007A478 7F A5 EB 78 */ mr r5, r29 -/* 8007A47C 4B FF FD 85 */ bl RwgLineCheck__4cBgWFUsP11cBgS_LinChk -/* 8007A480 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A484 41 82 00 08 */ beq lbl_8007A48C -/* 8007A488 3B C0 00 01 */ li r30, 1 -lbl_8007A48C: -/* 8007A48C 88 1D 00 52 */ lbz r0, 0x52(r29) -/* 8007A490 28 00 00 00 */ cmplwi r0, 0 -/* 8007A494 41 82 00 34 */ beq lbl_8007A4C8 -/* 8007A498 80 7C 00 A4 */ lwz r3, 0xa4(r28) -/* 8007A49C A0 1F 00 04 */ lhz r0, 4(r31) -/* 8007A4A0 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007A4A4 7C 83 02 2E */ lhzx r4, r3, r0 -/* 8007A4A8 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007A4AC 41 82 00 1C */ beq lbl_8007A4C8 -/* 8007A4B0 7F 83 E3 78 */ mr r3, r28 -/* 8007A4B4 7F A5 EB 78 */ mr r5, r29 -/* 8007A4B8 4B FF FD 49 */ bl RwgLineCheck__4cBgWFUsP11cBgS_LinChk -/* 8007A4BC 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A4C0 41 82 00 08 */ beq lbl_8007A4C8 -/* 8007A4C4 3B C0 00 01 */ li r30, 1 -lbl_8007A4C8: -/* 8007A4C8 7F C3 F3 78 */ mr r3, r30 -/* 8007A4CC 48 00 00 48 */ b lbl_8007A514 -lbl_8007A4D0: -/* 8007A4D0 3B 40 00 00 */ li r26, 0 -/* 8007A4D4 3B 60 00 00 */ li r27, 0 -lbl_8007A4D8: -/* 8007A4D8 38 1B 00 04 */ addi r0, r27, 4 -/* 8007A4DC 7C BF 02 2E */ lhzx r5, r31, r0 -/* 8007A4E0 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007A4E4 41 82 00 1C */ beq lbl_8007A500 -/* 8007A4E8 7F 83 E3 78 */ mr r3, r28 -/* 8007A4EC 7F A4 EB 78 */ mr r4, r29 -/* 8007A4F0 4B FF FE B1 */ bl LineCheckRp__4cBgWFP11cBgS_LinChki -/* 8007A4F4 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A4F8 41 82 00 08 */ beq lbl_8007A500 -/* 8007A4FC 3B C0 00 01 */ li r30, 1 -lbl_8007A500: -/* 8007A500 3B 5A 00 01 */ addi r26, r26, 1 -/* 8007A504 2C 1A 00 08 */ cmpwi r26, 8 -/* 8007A508 3B 7B 00 02 */ addi r27, r27, 2 -/* 8007A50C 41 80 FF CC */ blt lbl_8007A4D8 -/* 8007A510 7F C3 F3 78 */ mr r3, r30 -lbl_8007A514: -/* 8007A514 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A518 48 2E 7D 05 */ bl _restgpr_26 -/* 8007A51C 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007A520 7C 08 03 A6 */ mtlr r0 -/* 8007A524 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007A528 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/MatrixCrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s b/asm/d/bg/d_bg_w/MatrixCrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s deleted file mode 100644 index 42215b93ec6..00000000000 --- a/asm/d/bg/d_bg_w/MatrixCrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s +++ /dev/null @@ -1,12 +0,0 @@ -lbl_8007E000: -/* 8007E000 94 21 FF F0 */ stwu r1, -0x10(r1) -/* 8007E004 7C 08 02 A6 */ mflr r0 -/* 8007E008 90 01 00 14 */ stw r0, 0x14(r1) -/* 8007E00C 81 83 00 04 */ lwz r12, 4(r3) -/* 8007E010 81 8C 00 DC */ lwz r12, 0xdc(r12) -/* 8007E014 7D 89 03 A6 */ mtctr r12 -/* 8007E018 4E 80 04 21 */ bctrl -/* 8007E01C 80 01 00 14 */ lwz r0, 0x14(r1) -/* 8007E020 7C 08 03 A6 */ mtlr r0 -/* 8007E024 38 21 00 10 */ addi r1, r1, 0x10 -/* 8007E028 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/RoofChkGrpRp__4dBgWFP12dBgS_RoofChkii.s b/asm/d/bg/d_bg_w/RoofChkGrpRp__4dBgWFP12dBgS_RoofChkii.s deleted file mode 100644 index daa82ac9906..00000000000 --- a/asm/d/bg/d_bg_w/RoofChkGrpRp__4dBgWFP12dBgS_RoofChkii.s +++ /dev/null @@ -1,89 +0,0 @@ -lbl_8007D330: -/* 8007D330 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007D334 7C 08 02 A6 */ mflr r0 -/* 8007D338 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007D33C 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D340 48 2E 4E 95 */ bl _savegpr_27 -/* 8007D344 7C 7D 1B 78 */ mr r29, r3 -/* 8007D348 7C 9E 23 78 */ mr r30, r4 -/* 8007D34C 7C BB 2B 78 */ mr r27, r5 -/* 8007D350 7C DF 33 78 */ mr r31, r6 -/* 8007D354 80 63 00 A8 */ lwz r3, 0xa8(r3) -/* 8007D358 54 A0 28 34 */ slwi r0, r5, 5 -/* 8007D35C 7F 83 02 14 */ add r28, r3, r0 -/* 8007D360 38 7C 00 04 */ addi r3, r28, 4 -/* 8007D364 38 9E 00 3C */ addi r4, r30, 0x3c -/* 8007D368 48 1F 19 21 */ bl CrossY__8cM3dGAabCFPC4cXyz -/* 8007D36C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D370 41 82 00 2C */ beq lbl_8007D39C -/* 8007D374 38 7C 00 04 */ addi r3, r28, 4 -/* 8007D378 C0 3E 00 4C */ lfs f1, 0x4c(r30) -/* 8007D37C 48 1F 19 55 */ bl UnderPlaneYUnder__8cM3dGAabCFf -/* 8007D380 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D384 41 82 00 18 */ beq lbl_8007D39C -/* 8007D388 38 7C 00 04 */ addi r3, r28, 4 -/* 8007D38C C0 3E 00 40 */ lfs f1, 0x40(r30) -/* 8007D390 48 1F 19 55 */ bl TopPlaneYUnder__8cM3dGAabCFf -/* 8007D394 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D398 41 82 00 0C */ beq lbl_8007D3A4 -lbl_8007D39C: -/* 8007D39C 38 60 00 00 */ li r3, 0 -/* 8007D3A0 48 00 00 B8 */ b lbl_8007D458 -lbl_8007D3A4: -/* 8007D3A4 7F A3 EB 78 */ mr r3, r29 -/* 8007D3A8 7F 64 DB 78 */ mr r4, r27 -/* 8007D3AC 80 BE 00 14 */ lwz r5, 0x14(r30) -/* 8007D3B0 7F E6 FB 78 */ mr r6, r31 -/* 8007D3B4 81 9D 00 04 */ lwz r12, 4(r29) -/* 8007D3B8 81 8C 01 00 */ lwz r12, 0x100(r12) -/* 8007D3BC 7D 89 03 A6 */ mtctr r12 -/* 8007D3C0 4E 80 04 21 */ bctrl -/* 8007D3C4 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D3C8 41 82 00 0C */ beq lbl_8007D3D4 -/* 8007D3CC 38 60 00 00 */ li r3, 0 -/* 8007D3D0 48 00 00 88 */ b lbl_8007D458 -lbl_8007D3D4: -/* 8007D3D4 3B 80 00 00 */ li r28, 0 -/* 8007D3D8 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007D3DC 80 63 00 24 */ lwz r3, 0x24(r3) -/* 8007D3E0 1C 1B 00 34 */ mulli r0, r27, 0x34 -/* 8007D3E4 7F 63 02 14 */ add r27, r3, r0 -/* 8007D3E8 A0 BB 00 2E */ lhz r5, 0x2e(r27) -/* 8007D3EC 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007D3F0 41 82 00 1C */ beq lbl_8007D40C -/* 8007D3F4 7F A3 EB 78 */ mr r3, r29 -/* 8007D3F8 7F C4 F3 78 */ mr r4, r30 -/* 8007D3FC 4B FF FE 0D */ bl RoofChkRp__4dBgWFP12dBgS_RoofChki -/* 8007D400 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D404 41 82 00 08 */ beq lbl_8007D40C -/* 8007D408 3B 80 00 01 */ li r28, 1 -lbl_8007D40C: -/* 8007D40C A3 7B 00 28 */ lhz r27, 0x28(r27) -lbl_8007D410: -/* 8007D410 3C 1B 00 00 */ addis r0, r27, 0 -/* 8007D414 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007D418 41 82 00 3C */ beq lbl_8007D454 -/* 8007D41C 7F A3 EB 78 */ mr r3, r29 -/* 8007D420 7F C4 F3 78 */ mr r4, r30 -/* 8007D424 7F 65 DB 78 */ mr r5, r27 -/* 8007D428 38 DF 00 01 */ addi r6, r31, 1 -/* 8007D42C 4B FF FF 05 */ bl RoofChkGrpRp__4dBgWFP12dBgS_RoofChkii -/* 8007D430 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D434 41 82 00 08 */ beq lbl_8007D43C -/* 8007D438 3B 80 00 01 */ li r28, 1 -lbl_8007D43C: -/* 8007D43C 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007D440 80 83 00 24 */ lwz r4, 0x24(r3) -/* 8007D444 1C 7B 00 34 */ mulli r3, r27, 0x34 -/* 8007D448 38 03 00 26 */ addi r0, r3, 0x26 -/* 8007D44C 7F 64 02 2E */ lhzx r27, r4, r0 -/* 8007D450 4B FF FF C0 */ b lbl_8007D410 -lbl_8007D454: -/* 8007D454 7F 83 E3 78 */ mr r3, r28 -lbl_8007D458: -/* 8007D458 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D45C 48 2E 4D C5 */ bl _restgpr_27 -/* 8007D460 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007D464 7C 08 03 A6 */ mtlr r0 -/* 8007D468 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007D46C 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/RoofChkRp__4dBgWFP12dBgS_RoofChki.s b/asm/d/bg/d_bg_w/RoofChkRp__4dBgWFP12dBgS_RoofChki.s deleted file mode 100644 index ab33801dabd..00000000000 --- a/asm/d/bg/d_bg_w/RoofChkRp__4dBgWFP12dBgS_RoofChki.s +++ /dev/null @@ -1,82 +0,0 @@ -lbl_8007D208: -/* 8007D208 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007D20C 7C 08 02 A6 */ mflr r0 -/* 8007D210 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007D214 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D218 48 2E 4F B9 */ bl _savegpr_26 -/* 8007D21C 7C 7E 1B 78 */ mr r30, r3 -/* 8007D220 7C 9F 23 78 */ mr r31, r4 -/* 8007D224 7C BA 2B 78 */ mr r26, r5 -/* 8007D228 80 63 00 AC */ lwz r3, 0xac(r3) -/* 8007D22C 1C 1A 00 1C */ mulli r0, r26, 0x1c -/* 8007D230 7F A3 02 14 */ add r29, r3, r0 -/* 8007D234 7F A3 EB 78 */ mr r3, r29 -/* 8007D238 38 9F 00 3C */ addi r4, r31, 0x3c -/* 8007D23C 48 1F 1A 4D */ bl CrossY__8cM3dGAabCFPC4cXyz -/* 8007D240 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D244 41 82 00 2C */ beq lbl_8007D270 -/* 8007D248 7F A3 EB 78 */ mr r3, r29 -/* 8007D24C C0 3F 00 4C */ lfs f1, 0x4c(r31) -/* 8007D250 48 1F 1A 81 */ bl UnderPlaneYUnder__8cM3dGAabCFf -/* 8007D254 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D258 41 82 00 18 */ beq lbl_8007D270 -/* 8007D25C 7F A3 EB 78 */ mr r3, r29 -/* 8007D260 C0 3F 00 40 */ lfs f1, 0x40(r31) -/* 8007D264 48 1F 1A 81 */ bl TopPlaneYUnder__8cM3dGAabCFf -/* 8007D268 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D26C 41 82 00 0C */ beq lbl_8007D278 -lbl_8007D270: -/* 8007D270 38 60 00 00 */ li r3, 0 -/* 8007D274 48 00 00 A4 */ b lbl_8007D318 -lbl_8007D278: -/* 8007D278 80 7E 00 A0 */ lwz r3, 0xa0(r30) -/* 8007D27C 80 63 00 1C */ lwz r3, 0x1c(r3) -/* 8007D280 1C 1A 00 14 */ mulli r0, r26, 0x14 -/* 8007D284 7F 83 02 14 */ add r28, r3, r0 -/* 8007D288 A0 1C 00 00 */ lhz r0, 0(r28) -/* 8007D28C 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007D290 41 82 00 40 */ beq lbl_8007D2D0 -/* 8007D294 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007D298 A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007D29C 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007D2A0 7C 83 02 2E */ lhzx r4, r3, r0 -/* 8007D2A4 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007D2A8 41 82 00 20 */ beq lbl_8007D2C8 -/* 8007D2AC 7F C3 F3 78 */ mr r3, r30 -/* 8007D2B0 7F E5 FB 78 */ mr r5, r31 -/* 8007D2B4 4B FF FE 29 */ bl RwgRoofChk__4dBgWFUsP12dBgS_RoofChk -/* 8007D2B8 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D2BC 41 82 00 0C */ beq lbl_8007D2C8 -/* 8007D2C0 38 60 00 01 */ li r3, 1 -/* 8007D2C4 48 00 00 54 */ b lbl_8007D318 -lbl_8007D2C8: -/* 8007D2C8 38 60 00 00 */ li r3, 0 -/* 8007D2CC 48 00 00 4C */ b lbl_8007D318 -lbl_8007D2D0: -/* 8007D2D0 3B 60 00 00 */ li r27, 0 -/* 8007D2D4 3B 40 00 00 */ li r26, 0 -/* 8007D2D8 3B A0 00 00 */ li r29, 0 -lbl_8007D2DC: -/* 8007D2DC 38 1D 00 04 */ addi r0, r29, 4 -/* 8007D2E0 7C BC 02 2E */ lhzx r5, r28, r0 -/* 8007D2E4 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007D2E8 41 82 00 1C */ beq lbl_8007D304 -/* 8007D2EC 7F C3 F3 78 */ mr r3, r30 -/* 8007D2F0 7F E4 FB 78 */ mr r4, r31 -/* 8007D2F4 4B FF FF 15 */ bl RoofChkRp__4dBgWFP12dBgS_RoofChki -/* 8007D2F8 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D2FC 41 82 00 08 */ beq lbl_8007D304 -/* 8007D300 3B 60 00 01 */ li r27, 1 -lbl_8007D304: -/* 8007D304 3B 5A 00 01 */ addi r26, r26, 1 -/* 8007D308 2C 1A 00 08 */ cmpwi r26, 8 -/* 8007D30C 3B BD 00 02 */ addi r29, r29, 2 -/* 8007D310 41 80 FF CC */ blt lbl_8007D2DC -/* 8007D314 7F 63 DB 78 */ mr r3, r27 -lbl_8007D318: -/* 8007D318 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D31C 48 2E 4F 01 */ bl _restgpr_26 -/* 8007D320 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007D324 7C 08 03 A6 */ mtlr r0 -/* 8007D328 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007D32C 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly.s b/asm/d/bg/d_bg_w/RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly.s deleted file mode 100644 index d237212e959..00000000000 --- a/asm/d/bg/d_bg_w/RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly.s +++ /dev/null @@ -1,39 +0,0 @@ -lbl_8007D858: -/* 8007D858 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007D85C 7C 08 02 A6 */ mflr r0 -/* 8007D860 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007D864 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D868 48 2E 49 71 */ bl _savegpr_28 -/* 8007D86C 7C 7C 1B 78 */ mr r28, r3 -/* 8007D870 7C 89 23 78 */ mr r9, r4 -/* 8007D874 7C BD 2B 78 */ mr r29, r5 -lbl_8007D878: -/* 8007D878 83 DC 00 98 */ lwz r30, 0x98(r28) -/* 8007D87C 55 3F 18 38 */ slwi r31, r9, 3 -/* 8007D880 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007D884 80 63 00 0C */ lwz r3, 0xc(r3) -/* 8007D888 1C 09 00 0A */ mulli r0, r9, 0xa -/* 8007D88C 7C E3 02 14 */ add r7, r3, r0 -/* 8007D890 7F A3 EB 78 */ mr r3, r29 -/* 8007D894 80 9C 00 9C */ lwz r4, 0x9c(r28) -/* 8007D898 A0 A7 00 00 */ lhz r5, 0(r7) -/* 8007D89C A0 C7 00 02 */ lhz r6, 2(r7) -/* 8007D8A0 A0 E7 00 04 */ lhz r7, 4(r7) -/* 8007D8A4 81 1C 00 94 */ lwz r8, 0x94(r28) -/* 8007D8A8 1C 09 00 18 */ mulli r0, r9, 0x18 -/* 8007D8AC 7D 08 02 14 */ add r8, r8, r0 -/* 8007D8B0 81 9D 00 48 */ lwz r12, 0x48(r29) -/* 8007D8B4 7D 89 03 A6 */ mtctr r12 -/* 8007D8B8 4E 80 04 21 */ bctrl -/* 8007D8BC 7C 1E FA 2E */ lhzx r0, r30, r31 -/* 8007D8C0 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007D8C4 41 82 00 0C */ beq lbl_8007D8D0 -/* 8007D8C8 7C 09 03 78 */ mr r9, r0 -/* 8007D8CC 4B FF FF AC */ b lbl_8007D878 -lbl_8007D8D0: -/* 8007D8D0 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D8D4 48 2E 49 51 */ bl _restgpr_28 -/* 8007D8D8 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007D8DC 7C 08 03 A6 */ mtlr r0 -/* 8007D8E0 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007D8E4 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/RwgGroundCheckCommon__4cBgWFfUsP11cBgS_GndChk.s b/asm/d/bg/d_bg_w/RwgGroundCheckCommon__4cBgWFfUsP11cBgS_GndChk.s deleted file mode 100644 index 6af71ed2804..00000000000 --- a/asm/d/bg/d_bg_w/RwgGroundCheckCommon__4cBgWFfUsP11cBgS_GndChk.s +++ /dev/null @@ -1,64 +0,0 @@ -lbl_8007A680: -/* 8007A680 94 21 FF D0 */ stwu r1, -0x30(r1) -/* 8007A684 7C 08 02 A6 */ mflr r0 -/* 8007A688 90 01 00 34 */ stw r0, 0x34(r1) -/* 8007A68C DB E1 00 20 */ stfd f31, 0x20(r1) -/* 8007A690 F3 E1 00 28 */ psq_st f31, 40(r1), 0, 0 /* qr0 */ -/* 8007A694 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A698 48 2E 7B 45 */ bl _savegpr_29 -/* 8007A69C 7C 7D 1B 78 */ mr r29, r3 -/* 8007A6A0 FF E0 08 90 */ fmr f31, f1 -/* 8007A6A4 7C 9F 23 78 */ mr r31, r4 -/* 8007A6A8 7C BE 2B 78 */ mr r30, r5 -/* 8007A6AC C0 05 00 28 */ lfs f0, 0x28(r5) -/* 8007A6B0 FC 1F 00 40 */ fcmpo cr0, f31, f0 -/* 8007A6B4 40 80 00 9C */ bge lbl_8007A750 -/* 8007A6B8 C0 1E 00 34 */ lfs f0, 0x34(r30) -/* 8007A6BC FC 1F 00 40 */ fcmpo cr0, f31, f0 -/* 8007A6C0 40 81 00 90 */ ble lbl_8007A750 -/* 8007A6C4 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007A6C8 80 63 00 0C */ lwz r3, 0xc(r3) -/* 8007A6CC 57 E0 04 3E */ clrlwi r0, r31, 0x10 -/* 8007A6D0 1C 00 00 0A */ mulli r0, r0, 0xa -/* 8007A6D4 7C C3 02 14 */ add r6, r3, r0 -/* 8007A6D8 80 BD 00 9C */ lwz r5, 0x9c(r29) -/* 8007A6DC A0 06 00 00 */ lhz r0, 0(r6) -/* 8007A6E0 1C 00 00 0C */ mulli r0, r0, 0xc -/* 8007A6E4 7C 65 02 14 */ add r3, r5, r0 -/* 8007A6E8 A0 06 00 02 */ lhz r0, 2(r6) -/* 8007A6EC 1C 00 00 0C */ mulli r0, r0, 0xc -/* 8007A6F0 7C 85 02 14 */ add r4, r5, r0 -/* 8007A6F4 A0 06 00 04 */ lhz r0, 4(r6) -/* 8007A6F8 1C 00 00 0C */ mulli r0, r0, 0xc -/* 8007A6FC 7C A5 02 14 */ add r5, r5, r0 -/* 8007A700 38 DE 00 24 */ addi r6, r30, 0x24 -/* 8007A704 48 1F 00 B5 */ bl cM3d_CrossY_Tri_Front__FRC3VecRC3VecRC3VecPC3Vec -/* 8007A708 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A70C 41 82 00 44 */ beq lbl_8007A750 -/* 8007A710 7F A3 EB 78 */ mr r3, r29 -/* 8007A714 57 FF 04 3E */ clrlwi r31, r31, 0x10 -/* 8007A718 7F E4 FB 78 */ mr r4, r31 -/* 8007A71C 80 BE 00 00 */ lwz r5, 0(r30) -/* 8007A720 81 9D 00 04 */ lwz r12, 4(r29) -/* 8007A724 81 8C 00 F8 */ lwz r12, 0xf8(r12) -/* 8007A728 7D 89 03 A6 */ mtctr r12 -/* 8007A72C 4E 80 04 21 */ bctrl -/* 8007A730 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A734 40 82 00 1C */ bne lbl_8007A750 -/* 8007A738 D3 FE 00 34 */ stfs f31, 0x34(r30) -/* 8007A73C 38 7E 00 14 */ addi r3, r30, 0x14 -/* 8007A740 7F E4 FB 78 */ mr r4, r31 -/* 8007A744 48 1E DA 61 */ bl SetPolyIndex__13cBgS_PolyInfoFi -/* 8007A748 38 60 00 01 */ li r3, 1 -/* 8007A74C 48 00 00 08 */ b lbl_8007A754 -lbl_8007A750: -/* 8007A750 38 60 00 00 */ li r3, 0 -lbl_8007A754: -/* 8007A754 E3 E1 00 28 */ psq_l f31, 40(r1), 0, 0 /* qr0 */ -/* 8007A758 CB E1 00 20 */ lfd f31, 0x20(r1) -/* 8007A75C 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A760 48 2E 7A C9 */ bl _restgpr_29 -/* 8007A764 80 01 00 34 */ lwz r0, 0x34(r1) -/* 8007A768 7C 08 03 A6 */ mtlr r0 -/* 8007A76C 38 21 00 30 */ addi r1, r1, 0x30 -/* 8007A770 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/RwgGroundCheckGnd__4cBgWFUsP11cBgS_GndChk.s b/asm/d/bg/d_bg_w/RwgGroundCheckGnd__4cBgWFUsP11cBgS_GndChk.s deleted file mode 100644 index 971159fdfc5..00000000000 --- a/asm/d/bg/d_bg_w/RwgGroundCheckGnd__4cBgWFUsP11cBgS_GndChk.s +++ /dev/null @@ -1,48 +0,0 @@ -lbl_8007A774: -/* 8007A774 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007A778 7C 08 02 A6 */ mflr r0 -/* 8007A77C 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007A780 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A784 48 2E 7A 51 */ bl _savegpr_27 -/* 8007A788 7C 7B 1B 78 */ mr r27, r3 -/* 8007A78C 7C BC 2B 78 */ mr r28, r5 -/* 8007A790 3B A0 00 00 */ li r29, 0 -lbl_8007A794: -/* 8007A794 83 DB 00 98 */ lwz r30, 0x98(r27) -/* 8007A798 54 85 04 3E */ clrlwi r5, r4, 0x10 -/* 8007A79C 54 9F 1B 78 */ rlwinm r31, r4, 3, 0xd, 0x1c -/* 8007A7A0 80 7B 00 94 */ lwz r3, 0x94(r27) -/* 8007A7A4 1C 05 00 18 */ mulli r0, r5, 0x18 -/* 8007A7A8 7C 63 02 14 */ add r3, r3, r0 -/* 8007A7AC C0 03 00 00 */ lfs f0, 0(r3) -/* 8007A7B0 FC 20 00 50 */ fneg f1, f0 -/* 8007A7B4 C0 1C 00 24 */ lfs f0, 0x24(r28) -/* 8007A7B8 EC 41 00 32 */ fmuls f2, f1, f0 -/* 8007A7BC C0 23 00 08 */ lfs f1, 8(r3) -/* 8007A7C0 C0 1C 00 2C */ lfs f0, 0x2c(r28) -/* 8007A7C4 EC 01 00 32 */ fmuls f0, f1, f0 -/* 8007A7C8 EC 22 00 28 */ fsubs f1, f2, f0 -/* 8007A7CC C0 03 00 0C */ lfs f0, 0xc(r3) -/* 8007A7D0 EC 21 00 28 */ fsubs f1, f1, f0 -/* 8007A7D4 C0 03 00 04 */ lfs f0, 4(r3) -/* 8007A7D8 EC 21 00 24 */ fdivs f1, f1, f0 -/* 8007A7DC 7F 63 DB 78 */ mr r3, r27 -/* 8007A7E0 7C A4 2B 78 */ mr r4, r5 -/* 8007A7E4 7F 85 E3 78 */ mr r5, r28 -/* 8007A7E8 4B FF FE 99 */ bl RwgGroundCheckCommon__4cBgWFfUsP11cBgS_GndChk -/* 8007A7EC 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A7F0 41 82 00 08 */ beq lbl_8007A7F8 -/* 8007A7F4 3B A0 00 01 */ li r29, 1 -lbl_8007A7F8: -/* 8007A7F8 7C 9E FA 2E */ lhzx r4, r30, r31 -/* 8007A7FC 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007A800 41 82 00 08 */ beq lbl_8007A808 -/* 8007A804 4B FF FF 90 */ b lbl_8007A794 -lbl_8007A808: -/* 8007A808 7F A3 EB 78 */ mr r3, r29 -/* 8007A80C 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A810 48 2E 7A 11 */ bl _restgpr_27 -/* 8007A814 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007A818 7C 08 03 A6 */ mtlr r0 -/* 8007A81C 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007A820 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/RwgGroundCheckWall__4cBgWFUsP11cBgS_GndChk.s b/asm/d/bg/d_bg_w/RwgGroundCheckWall__4cBgWFUsP11cBgS_GndChk.s deleted file mode 100644 index 2b67bbbd150..00000000000 --- a/asm/d/bg/d_bg_w/RwgGroundCheckWall__4cBgWFUsP11cBgS_GndChk.s +++ /dev/null @@ -1,56 +0,0 @@ -lbl_8007A824: -/* 8007A824 94 21 FF D0 */ stwu r1, -0x30(r1) -/* 8007A828 7C 08 02 A6 */ mflr r0 -/* 8007A82C 90 01 00 34 */ stw r0, 0x34(r1) -/* 8007A830 DB E1 00 20 */ stfd f31, 0x20(r1) -/* 8007A834 F3 E1 00 28 */ psq_st f31, 40(r1), 0, 0 /* qr0 */ -/* 8007A838 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A83C 48 2E 79 99 */ bl _savegpr_27 -/* 8007A840 7C 7B 1B 78 */ mr r27, r3 -/* 8007A844 7C BC 2B 78 */ mr r28, r5 -/* 8007A848 3B A0 00 00 */ li r29, 0 -/* 8007A84C C3 E2 8D 0C */ lfs f31, lit_4271(r2) -lbl_8007A850: -/* 8007A850 80 7B 00 94 */ lwz r3, 0x94(r27) -/* 8007A854 54 85 04 3E */ clrlwi r5, r4, 0x10 -/* 8007A858 1C 05 00 18 */ mulli r0, r5, 0x18 -/* 8007A85C 7C 63 02 14 */ add r3, r3, r0 -/* 8007A860 83 DB 00 98 */ lwz r30, 0x98(r27) -/* 8007A864 54 9F 1B 78 */ rlwinm r31, r4, 3, 0xd, 0x1c -/* 8007A868 C0 63 00 04 */ lfs f3, 4(r3) -/* 8007A86C FC 03 F8 40 */ fcmpo cr0, f3, f31 -/* 8007A870 4C 41 13 82 */ cror 2, 1, 2 -/* 8007A874 40 82 00 4C */ bne lbl_8007A8C0 -/* 8007A878 C0 03 00 00 */ lfs f0, 0(r3) -/* 8007A87C FC 20 00 50 */ fneg f1, f0 -/* 8007A880 C0 1C 00 24 */ lfs f0, 0x24(r28) -/* 8007A884 EC 41 00 32 */ fmuls f2, f1, f0 -/* 8007A888 C0 23 00 08 */ lfs f1, 8(r3) -/* 8007A88C C0 1C 00 2C */ lfs f0, 0x2c(r28) -/* 8007A890 EC 01 00 32 */ fmuls f0, f1, f0 -/* 8007A894 EC 22 00 28 */ fsubs f1, f2, f0 -/* 8007A898 C0 03 00 0C */ lfs f0, 0xc(r3) -/* 8007A89C EC 01 00 28 */ fsubs f0, f1, f0 -/* 8007A8A0 EC 20 18 24 */ fdivs f1, f0, f3 -/* 8007A8A4 7F 63 DB 78 */ mr r3, r27 -/* 8007A8A8 7C A4 2B 78 */ mr r4, r5 -/* 8007A8AC 7F 85 E3 78 */ mr r5, r28 -/* 8007A8B0 4B FF FD D1 */ bl RwgGroundCheckCommon__4cBgWFfUsP11cBgS_GndChk -/* 8007A8B4 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007A8B8 41 82 00 08 */ beq lbl_8007A8C0 -/* 8007A8BC 3B A0 00 01 */ li r29, 1 -lbl_8007A8C0: -/* 8007A8C0 7C 9E FA 2E */ lhzx r4, r30, r31 -/* 8007A8C4 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007A8C8 41 82 00 08 */ beq lbl_8007A8D0 -/* 8007A8CC 4B FF FF 84 */ b lbl_8007A850 -lbl_8007A8D0: -/* 8007A8D0 7F A3 EB 78 */ mr r3, r29 -/* 8007A8D4 E3 E1 00 28 */ psq_l f31, 40(r1), 0, 0 /* qr0 */ -/* 8007A8D8 CB E1 00 20 */ lfd f31, 0x20(r1) -/* 8007A8DC 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007A8E0 48 2E 79 41 */ bl _restgpr_27 -/* 8007A8E4 80 01 00 34 */ lwz r0, 0x34(r1) -/* 8007A8E8 7C 08 03 A6 */ mtlr r0 -/* 8007A8EC 38 21 00 30 */ addi r1, r1, 0x30 -/* 8007A8F0 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/RwgRoofChk__4dBgWFUsP12dBgS_RoofChk.s b/asm/d/bg/d_bg_w/RwgRoofChk__4dBgWFUsP12dBgS_RoofChk.s deleted file mode 100644 index a9e445bbe6c..00000000000 --- a/asm/d/bg/d_bg_w/RwgRoofChk__4dBgWFUsP12dBgS_RoofChk.s +++ /dev/null @@ -1,79 +0,0 @@ -lbl_8007D0DC: -/* 8007D0DC 94 21 FF D0 */ stwu r1, -0x30(r1) -/* 8007D0E0 7C 08 02 A6 */ mflr r0 -/* 8007D0E4 90 01 00 34 */ stw r0, 0x34(r1) -/* 8007D0E8 39 61 00 30 */ addi r11, r1, 0x30 -/* 8007D0EC 48 2E 50 E5 */ bl _savegpr_26 -/* 8007D0F0 7C 7A 1B 78 */ mr r26, r3 -/* 8007D0F4 7C 9B 23 78 */ mr r27, r4 -/* 8007D0F8 7C BC 2B 78 */ mr r28, r5 -/* 8007D0FC 3B A0 00 00 */ li r29, 0 -lbl_8007D100: -/* 8007D100 80 1A 00 94 */ lwz r0, 0x94(r26) -/* 8007D104 57 7F 04 3E */ clrlwi r31, r27, 0x10 -/* 8007D108 1F DF 00 18 */ mulli r30, r31, 0x18 -/* 8007D10C 7C 60 F2 14 */ add r3, r0, r30 -/* 8007D110 38 9C 00 3C */ addi r4, r28, 0x3c -/* 8007D114 38 A1 00 08 */ addi r5, r1, 8 -/* 8007D118 48 1F 24 65 */ bl getCrossY__8cM3dGPlaCFRC4cXyzPf -/* 8007D11C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D120 41 82 00 B0 */ beq lbl_8007D1D0 -/* 8007D124 C0 21 00 08 */ lfs f1, 8(r1) -/* 8007D128 C0 1C 00 40 */ lfs f0, 0x40(r28) -/* 8007D12C FC 01 00 40 */ fcmpo cr0, f1, f0 -/* 8007D130 40 81 00 A0 */ ble lbl_8007D1D0 -/* 8007D134 C0 1C 00 4C */ lfs f0, 0x4c(r28) -/* 8007D138 FC 01 00 40 */ fcmpo cr0, f1, f0 -/* 8007D13C 40 80 00 94 */ bge lbl_8007D1D0 -/* 8007D140 80 7A 00 A0 */ lwz r3, 0xa0(r26) -/* 8007D144 80 63 00 0C */ lwz r3, 0xc(r3) -/* 8007D148 1C 1F 00 0A */ mulli r0, r31, 0xa -/* 8007D14C 7C C3 02 14 */ add r6, r3, r0 -/* 8007D150 80 BA 00 9C */ lwz r5, 0x9c(r26) -/* 8007D154 A0 06 00 00 */ lhz r0, 0(r6) -/* 8007D158 1C 00 00 0C */ mulli r0, r0, 0xc -/* 8007D15C 7C 65 02 14 */ add r3, r5, r0 -/* 8007D160 A0 06 00 02 */ lhz r0, 2(r6) -/* 8007D164 1C 00 00 0C */ mulli r0, r0, 0xc -/* 8007D168 7C 85 02 14 */ add r4, r5, r0 -/* 8007D16C A0 06 00 04 */ lhz r0, 4(r6) -/* 8007D170 1C 00 00 0C */ mulli r0, r0, 0xc -/* 8007D174 7C A5 02 14 */ add r5, r5, r0 -/* 8007D178 80 1A 00 94 */ lwz r0, 0x94(r26) -/* 8007D17C 7C C0 F2 14 */ add r6, r0, r30 -/* 8007D180 38 FC 00 3C */ addi r7, r28, 0x3c -/* 8007D184 48 1E D4 89 */ bl cM3d_CrossY_Tri__FRC3VecRC3VecRC3VecRC8cM3dGPlaPC3Vec -/* 8007D188 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D18C 41 82 00 44 */ beq lbl_8007D1D0 -/* 8007D190 7F 43 D3 78 */ mr r3, r26 -/* 8007D194 57 7B 04 3E */ clrlwi r27, r27, 0x10 -/* 8007D198 7F 64 DB 78 */ mr r4, r27 -/* 8007D19C 80 BC 00 10 */ lwz r5, 0x10(r28) -/* 8007D1A0 81 9A 00 04 */ lwz r12, 4(r26) -/* 8007D1A4 81 8C 00 F8 */ lwz r12, 0xf8(r12) -/* 8007D1A8 7D 89 03 A6 */ mtctr r12 -/* 8007D1AC 4E 80 04 21 */ bctrl -/* 8007D1B0 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D1B4 40 82 00 1C */ bne lbl_8007D1D0 -/* 8007D1B8 C0 01 00 08 */ lfs f0, 8(r1) -/* 8007D1BC D0 1C 00 4C */ stfs f0, 0x4c(r28) -/* 8007D1C0 7F 83 E3 78 */ mr r3, r28 -/* 8007D1C4 7F 64 DB 78 */ mr r4, r27 -/* 8007D1C8 48 1E AF DD */ bl SetPolyIndex__13cBgS_PolyInfoFi -/* 8007D1CC 3B A0 00 01 */ li r29, 1 -lbl_8007D1D0: -/* 8007D1D0 80 7A 00 98 */ lwz r3, 0x98(r26) -/* 8007D1D4 57 E0 18 38 */ slwi r0, r31, 3 -/* 8007D1D8 7C 03 02 2E */ lhzx r0, r3, r0 -/* 8007D1DC 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007D1E0 41 82 00 0C */ beq lbl_8007D1EC -/* 8007D1E4 7C 1B 03 78 */ mr r27, r0 -/* 8007D1E8 4B FF FF 18 */ b lbl_8007D100 -lbl_8007D1EC: -/* 8007D1EC 7F A3 EB 78 */ mr r3, r29 -/* 8007D1F0 39 61 00 30 */ addi r11, r1, 0x30 -/* 8007D1F4 48 2E 50 29 */ bl _restgpr_26 -/* 8007D1F8 80 01 00 34 */ lwz r0, 0x34(r1) -/* 8007D1FC 7C 08 03 A6 */ mtlr r0 -/* 8007D200 38 21 00 30 */ addi r1, r1, 0x30 -/* 8007D204 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw.s b/asm/d/bg/d_bg_w/RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw.s deleted file mode 100644 index 39756e87db2..00000000000 --- a/asm/d/bg/d_bg_w/RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw.s +++ /dev/null @@ -1,49 +0,0 @@ -lbl_8007ADF0: -/* 8007ADF0 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007ADF4 7C 08 02 A6 */ mflr r0 -/* 8007ADF8 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007ADFC 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007AE00 48 2E 73 D5 */ bl _savegpr_27 -/* 8007AE04 7C 7B 1B 78 */ mr r27, r3 -/* 8007AE08 7C 9C 23 78 */ mr r28, r4 -/* 8007AE0C 7C BD 2B 78 */ mr r29, r5 -lbl_8007AE10: -/* 8007AE10 83 DB 00 98 */ lwz r30, 0x98(r27) -/* 8007AE14 57 9F 18 38 */ slwi r31, r28, 3 -/* 8007AE18 7F 63 DB 78 */ mr r3, r27 -/* 8007AE1C 7F 84 E3 78 */ mr r4, r28 -/* 8007AE20 80 BD 00 00 */ lwz r5, 0(r29) -/* 8007AE24 81 9B 00 04 */ lwz r12, 4(r27) -/* 8007AE28 81 8C 00 FC */ lwz r12, 0xfc(r12) -/* 8007AE2C 7D 89 03 A6 */ mtctr r12 -/* 8007AE30 4E 80 04 21 */ bctrl -/* 8007AE34 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AE38 40 82 00 40 */ bne lbl_8007AE78 -/* 8007AE3C 80 7B 00 A0 */ lwz r3, 0xa0(r27) -/* 8007AE40 80 63 00 0C */ lwz r3, 0xc(r3) -/* 8007AE44 1C 1C 00 0A */ mulli r0, r28, 0xa -/* 8007AE48 7C E3 02 14 */ add r7, r3, r0 -/* 8007AE4C 7F A3 EB 78 */ mr r3, r29 -/* 8007AE50 80 9B 00 9C */ lwz r4, 0x9c(r27) -/* 8007AE54 A0 A7 00 00 */ lhz r5, 0(r7) -/* 8007AE58 A0 C7 00 02 */ lhz r6, 2(r7) -/* 8007AE5C A0 E7 00 04 */ lhz r7, 4(r7) -/* 8007AE60 81 1B 00 94 */ lwz r8, 0x94(r27) -/* 8007AE64 1C 1C 00 18 */ mulli r0, r28, 0x18 -/* 8007AE68 7D 08 02 14 */ add r8, r8, r0 -/* 8007AE6C 81 9D 00 30 */ lwz r12, 0x30(r29) -/* 8007AE70 7D 89 03 A6 */ mtctr r12 -/* 8007AE74 4E 80 04 21 */ bctrl -lbl_8007AE78: -/* 8007AE78 7C 1E FA 2E */ lhzx r0, r30, r31 -/* 8007AE7C 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007AE80 41 82 00 0C */ beq lbl_8007AE8C -/* 8007AE84 7C 1C 03 78 */ mr r28, r0 -/* 8007AE88 4B FF FF 88 */ b lbl_8007AE10 -lbl_8007AE8C: -/* 8007AE8C 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007AE90 48 2E 73 91 */ bl _restgpr_27 -/* 8007AE94 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007AE98 7C 08 03 A6 */ mtlr r0 -/* 8007AE9C 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007AEA0 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/RwgSplGrpChk__4dBgWFUsP14dBgS_SplGrpChk.s b/asm/d/bg/d_bg_w/RwgSplGrpChk__4dBgWFUsP14dBgS_SplGrpChk.s deleted file mode 100644 index ef0b5582065..00000000000 --- a/asm/d/bg/d_bg_w/RwgSplGrpChk__4dBgWFUsP14dBgS_SplGrpChk.s +++ /dev/null @@ -1,79 +0,0 @@ -lbl_8007D498: -/* 8007D498 94 21 FF D0 */ stwu r1, -0x30(r1) -/* 8007D49C 7C 08 02 A6 */ mflr r0 -/* 8007D4A0 90 01 00 34 */ stw r0, 0x34(r1) -/* 8007D4A4 39 61 00 30 */ addi r11, r1, 0x30 -/* 8007D4A8 48 2E 4D 29 */ bl _savegpr_26 -/* 8007D4AC 7C 7A 1B 78 */ mr r26, r3 -/* 8007D4B0 7C 9B 23 78 */ mr r27, r4 -/* 8007D4B4 7C BC 2B 78 */ mr r28, r5 -/* 8007D4B8 3B A0 00 00 */ li r29, 0 -lbl_8007D4BC: -/* 8007D4BC 80 1A 00 94 */ lwz r0, 0x94(r26) -/* 8007D4C0 57 7F 04 3E */ clrlwi r31, r27, 0x10 -/* 8007D4C4 1F DF 00 18 */ mulli r30, r31, 0x18 -/* 8007D4C8 7C 60 F2 14 */ add r3, r0, r30 -/* 8007D4CC 38 9C 00 3C */ addi r4, r28, 0x3c -/* 8007D4D0 38 A1 00 08 */ addi r5, r1, 8 -/* 8007D4D4 48 1F 20 A9 */ bl getCrossY__8cM3dGPlaCFRC4cXyzPf -/* 8007D4D8 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D4DC 41 82 00 B0 */ beq lbl_8007D58C -/* 8007D4E0 C0 21 00 08 */ lfs f1, 8(r1) -/* 8007D4E4 C0 1C 00 48 */ lfs f0, 0x48(r28) -/* 8007D4E8 FC 01 00 40 */ fcmpo cr0, f1, f0 -/* 8007D4EC 40 80 00 A0 */ bge lbl_8007D58C -/* 8007D4F0 C0 1C 00 4C */ lfs f0, 0x4c(r28) -/* 8007D4F4 FC 01 00 40 */ fcmpo cr0, f1, f0 -/* 8007D4F8 40 81 00 94 */ ble lbl_8007D58C -/* 8007D4FC 80 7A 00 A0 */ lwz r3, 0xa0(r26) -/* 8007D500 80 63 00 0C */ lwz r3, 0xc(r3) -/* 8007D504 1C 1F 00 0A */ mulli r0, r31, 0xa -/* 8007D508 7C C3 02 14 */ add r6, r3, r0 -/* 8007D50C 80 BA 00 9C */ lwz r5, 0x9c(r26) -/* 8007D510 A0 06 00 00 */ lhz r0, 0(r6) -/* 8007D514 1C 00 00 0C */ mulli r0, r0, 0xc -/* 8007D518 7C 65 02 14 */ add r3, r5, r0 -/* 8007D51C A0 06 00 02 */ lhz r0, 2(r6) -/* 8007D520 1C 00 00 0C */ mulli r0, r0, 0xc -/* 8007D524 7C 85 02 14 */ add r4, r5, r0 -/* 8007D528 A0 06 00 04 */ lhz r0, 4(r6) -/* 8007D52C 1C 00 00 0C */ mulli r0, r0, 0xc -/* 8007D530 7C A5 02 14 */ add r5, r5, r0 -/* 8007D534 80 1A 00 94 */ lwz r0, 0x94(r26) -/* 8007D538 7C C0 F2 14 */ add r6, r0, r30 -/* 8007D53C 38 FC 00 3C */ addi r7, r28, 0x3c -/* 8007D540 48 1E D0 CD */ bl cM3d_CrossY_Tri__FRC3VecRC3VecRC3VecRC8cM3dGPlaPC3Vec -/* 8007D544 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D548 41 82 00 44 */ beq lbl_8007D58C -/* 8007D54C 7F 43 D3 78 */ mr r3, r26 -/* 8007D550 57 7B 04 3E */ clrlwi r27, r27, 0x10 -/* 8007D554 7F 64 DB 78 */ mr r4, r27 -/* 8007D558 80 BC 00 10 */ lwz r5, 0x10(r28) -/* 8007D55C 81 9A 00 04 */ lwz r12, 4(r26) -/* 8007D560 81 8C 00 F8 */ lwz r12, 0xf8(r12) -/* 8007D564 7D 89 03 A6 */ mtctr r12 -/* 8007D568 4E 80 04 21 */ bctrl -/* 8007D56C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D570 40 82 00 1C */ bne lbl_8007D58C -/* 8007D574 C0 01 00 08 */ lfs f0, 8(r1) -/* 8007D578 D0 1C 00 4C */ stfs f0, 0x4c(r28) -/* 8007D57C 7F 83 E3 78 */ mr r3, r28 -/* 8007D580 7F 64 DB 78 */ mr r4, r27 -/* 8007D584 48 1E AC 21 */ bl SetPolyIndex__13cBgS_PolyInfoFi -/* 8007D588 3B A0 00 01 */ li r29, 1 -lbl_8007D58C: -/* 8007D58C 80 7A 00 98 */ lwz r3, 0x98(r26) -/* 8007D590 57 E0 18 38 */ slwi r0, r31, 3 -/* 8007D594 7C 03 02 2E */ lhzx r0, r3, r0 -/* 8007D598 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007D59C 41 82 00 0C */ beq lbl_8007D5A8 -/* 8007D5A0 7C 1B 03 78 */ mr r27, r0 -/* 8007D5A4 4B FF FF 18 */ b lbl_8007D4BC -lbl_8007D5A8: -/* 8007D5A8 7F A3 EB 78 */ mr r3, r29 -/* 8007D5AC 39 61 00 30 */ addi r11, r1, 0x30 -/* 8007D5B0 48 2E 4C 6D */ bl _restgpr_26 -/* 8007D5B4 80 01 00 34 */ lwz r0, 0x34(r1) -/* 8007D5B8 7C 08 03 A6 */ mtlr r0 -/* 8007D5BC 38 21 00 30 */ addi r1, r1, 0x30 -/* 8007D5C0 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/ShdwDrawGrpRp__4cBgWFP13cBgS_ShdwDrawi.s b/asm/d/bg/d_bg_w/ShdwDrawGrpRp__4cBgWFP13cBgS_ShdwDrawi.s deleted file mode 100644 index d6bfcd4bc51..00000000000 --- a/asm/d/bg/d_bg_w/ShdwDrawGrpRp__4cBgWFP13cBgS_ShdwDrawi.s +++ /dev/null @@ -1,53 +0,0 @@ -lbl_8007AFC0: -/* 8007AFC0 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007AFC4 7C 08 02 A6 */ mflr r0 -/* 8007AFC8 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007AFCC 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007AFD0 48 2E 72 0D */ bl _savegpr_29 -/* 8007AFD4 7C 7E 1B 78 */ mr r30, r3 -/* 8007AFD8 7C 9F 23 78 */ mr r31, r4 -/* 8007AFDC 7C BD 2B 78 */ mr r29, r5 -/* 8007AFE0 38 9F 00 14 */ addi r4, r31, 0x14 -/* 8007AFE4 80 03 00 A8 */ lwz r0, 0xa8(r3) -/* 8007AFE8 54 A3 28 34 */ slwi r3, r5, 5 -/* 8007AFEC 38 63 00 04 */ addi r3, r3, 4 -/* 8007AFF0 7C 60 1A 14 */ add r3, r0, r3 -/* 8007AFF4 48 1E D9 F5 */ bl cM3d_Cross_AabAab__FPC8cM3dGAabPC8cM3dGAab -/* 8007AFF8 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AFFC 41 82 00 70 */ beq lbl_8007B06C -/* 8007B000 80 7E 00 A0 */ lwz r3, 0xa0(r30) -/* 8007B004 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007B008 1F BD 00 34 */ mulli r29, r29, 0x34 -/* 8007B00C 7C 60 EA 14 */ add r3, r0, r29 -/* 8007B010 A0 A3 00 2E */ lhz r5, 0x2e(r3) -/* 8007B014 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007B018 41 82 00 10 */ beq lbl_8007B028 -/* 8007B01C 7F C3 F3 78 */ mr r3, r30 -/* 8007B020 7F E4 FB 78 */ mr r4, r31 -/* 8007B024 4B FF FE 81 */ bl ShdwDrawRp__4cBgWFP13cBgS_ShdwDrawi -lbl_8007B028: -/* 8007B028 80 7E 00 A0 */ lwz r3, 0xa0(r30) -/* 8007B02C 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007B030 7C 60 EA 14 */ add r3, r0, r29 -/* 8007B034 A3 A3 00 28 */ lhz r29, 0x28(r3) -lbl_8007B038: -/* 8007B038 3C 1D 00 00 */ addis r0, r29, 0 -/* 8007B03C 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007B040 41 82 00 2C */ beq lbl_8007B06C -/* 8007B044 7F C3 F3 78 */ mr r3, r30 -/* 8007B048 7F E4 FB 78 */ mr r4, r31 -/* 8007B04C 7F A5 EB 78 */ mr r5, r29 -/* 8007B050 4B FF FF 71 */ bl ShdwDrawGrpRp__4cBgWFP13cBgS_ShdwDrawi -/* 8007B054 80 7E 00 A0 */ lwz r3, 0xa0(r30) -/* 8007B058 80 83 00 24 */ lwz r4, 0x24(r3) -/* 8007B05C 1C 7D 00 34 */ mulli r3, r29, 0x34 -/* 8007B060 38 03 00 26 */ addi r0, r3, 0x26 -/* 8007B064 7F A4 02 2E */ lhzx r29, r4, r0 -/* 8007B068 4B FF FF D0 */ b lbl_8007B038 -lbl_8007B06C: -/* 8007B06C 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007B070 48 2E 71 B9 */ bl _restgpr_29 -/* 8007B074 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007B078 7C 08 03 A6 */ mtlr r0 -/* 8007B07C 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007B080 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/ShdwDrawRp__4cBgWFP13cBgS_ShdwDrawi.s b/asm/d/bg/d_bg_w/ShdwDrawRp__4cBgWFP13cBgS_ShdwDrawi.s deleted file mode 100644 index 6685c9fc2fc..00000000000 --- a/asm/d/bg/d_bg_w/ShdwDrawRp__4cBgWFP13cBgS_ShdwDrawi.s +++ /dev/null @@ -1,78 +0,0 @@ -lbl_8007AEA4: -/* 8007AEA4 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007AEA8 7C 08 02 A6 */ mflr r0 -/* 8007AEAC 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007AEB0 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007AEB4 48 2E 73 21 */ bl _savegpr_27 -/* 8007AEB8 7C 7E 1B 78 */ mr r30, r3 -/* 8007AEBC 7C 9F 23 78 */ mr r31, r4 -/* 8007AEC0 7C BB 2B 78 */ mr r27, r5 -/* 8007AEC4 38 9F 00 14 */ addi r4, r31, 0x14 -/* 8007AEC8 80 63 00 AC */ lwz r3, 0xac(r3) -/* 8007AECC 1C 1B 00 1C */ mulli r0, r27, 0x1c -/* 8007AED0 7C 63 02 14 */ add r3, r3, r0 -/* 8007AED4 48 1E DB 15 */ bl cM3d_Cross_AabAab__FPC8cM3dGAabPC8cM3dGAab -/* 8007AED8 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007AEDC 41 82 00 CC */ beq lbl_8007AFA8 -/* 8007AEE0 80 7E 00 A0 */ lwz r3, 0xa0(r30) -/* 8007AEE4 80 63 00 1C */ lwz r3, 0x1c(r3) -/* 8007AEE8 1C 1B 00 14 */ mulli r0, r27, 0x14 -/* 8007AEEC 7F 83 02 14 */ add r28, r3, r0 -/* 8007AEF0 A0 1C 00 00 */ lhz r0, 0(r28) -/* 8007AEF4 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007AEF8 41 82 00 7C */ beq lbl_8007AF74 -/* 8007AEFC 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007AF00 A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007AF04 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007AF08 7C 63 02 14 */ add r3, r3, r0 -/* 8007AF0C A0 83 00 02 */ lhz r4, 2(r3) -/* 8007AF10 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007AF14 41 82 00 10 */ beq lbl_8007AF24 -/* 8007AF18 7F C3 F3 78 */ mr r3, r30 -/* 8007AF1C 7F E5 FB 78 */ mr r5, r31 -/* 8007AF20 4B FF FE D1 */ bl RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw -lbl_8007AF24: -/* 8007AF24 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007AF28 A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007AF2C 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007AF30 7C 83 02 2E */ lhzx r4, r3, r0 -/* 8007AF34 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007AF38 41 82 00 10 */ beq lbl_8007AF48 -/* 8007AF3C 7F C3 F3 78 */ mr r3, r30 -/* 8007AF40 7F E5 FB 78 */ mr r5, r31 -/* 8007AF44 4B FF FE AD */ bl RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw -lbl_8007AF48: -/* 8007AF48 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007AF4C A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007AF50 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007AF54 7C 63 02 14 */ add r3, r3, r0 -/* 8007AF58 A0 83 00 04 */ lhz r4, 4(r3) -/* 8007AF5C 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007AF60 41 82 00 48 */ beq lbl_8007AFA8 -/* 8007AF64 7F C3 F3 78 */ mr r3, r30 -/* 8007AF68 7F E5 FB 78 */ mr r5, r31 -/* 8007AF6C 4B FF FE 85 */ bl RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw -/* 8007AF70 48 00 00 38 */ b lbl_8007AFA8 -lbl_8007AF74: -/* 8007AF74 3B 60 00 00 */ li r27, 0 -/* 8007AF78 3B A0 00 00 */ li r29, 0 -lbl_8007AF7C: -/* 8007AF7C 38 1D 00 04 */ addi r0, r29, 4 -/* 8007AF80 7C BC 02 2E */ lhzx r5, r28, r0 -/* 8007AF84 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007AF88 41 82 00 10 */ beq lbl_8007AF98 -/* 8007AF8C 7F C3 F3 78 */ mr r3, r30 -/* 8007AF90 7F E4 FB 78 */ mr r4, r31 -/* 8007AF94 4B FF FF 11 */ bl ShdwDrawRp__4cBgWFP13cBgS_ShdwDrawi -lbl_8007AF98: -/* 8007AF98 3B 7B 00 01 */ addi r27, r27, 1 -/* 8007AF9C 2C 1B 00 08 */ cmpwi r27, 8 -/* 8007AFA0 3B BD 00 02 */ addi r29, r29, 2 -/* 8007AFA4 41 80 FF D8 */ blt lbl_8007AF7C -lbl_8007AFA8: -/* 8007AFA8 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007AFAC 48 2E 72 75 */ bl _restgpr_27 -/* 8007AFB0 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007AFB4 7C 08 03 A6 */ mtlr r0 -/* 8007AFB8 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007AFBC 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/SphChkGrpRp__4dBgWFP11dBgS_SphChkPvii.s b/asm/d/bg/d_bg_w/SphChkGrpRp__4dBgWFP11dBgS_SphChkPvii.s deleted file mode 100644 index 21a26b51f82..00000000000 --- a/asm/d/bg/d_bg_w/SphChkGrpRp__4dBgWFP11dBgS_SphChkPvii.s +++ /dev/null @@ -1,80 +0,0 @@ -lbl_8007DDE0: -/* 8007DDE0 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007DDE4 7C 08 02 A6 */ mflr r0 -/* 8007DDE8 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007DDEC 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007DDF0 48 2E 43 E1 */ bl _savegpr_26 -/* 8007DDF4 7C 7C 1B 78 */ mr r28, r3 -/* 8007DDF8 7C 9D 23 78 */ mr r29, r4 -/* 8007DDFC 7C BE 2B 78 */ mr r30, r5 -/* 8007DE00 7C DA 33 78 */ mr r26, r6 -/* 8007DE04 7C FF 3B 78 */ mr r31, r7 -/* 8007DE08 80 03 00 A8 */ lwz r0, 0xa8(r3) -/* 8007DE0C 54 C3 28 34 */ slwi r3, r6, 5 -/* 8007DE10 38 63 00 04 */ addi r3, r3, 4 -/* 8007DE14 7C 60 1A 14 */ add r3, r0, r3 -/* 8007DE18 48 1E AD 9D */ bl cM3d_Cross_AabSph__FPC8cM3dGAabPC8cM3dGSph -/* 8007DE1C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DE20 40 82 00 0C */ bne lbl_8007DE2C -/* 8007DE24 38 60 00 00 */ li r3, 0 -/* 8007DE28 48 00 00 C0 */ b lbl_8007DEE8 -lbl_8007DE2C: -/* 8007DE2C 7F 83 E3 78 */ mr r3, r28 -/* 8007DE30 7F 44 D3 78 */ mr r4, r26 -/* 8007DE34 80 BD 00 28 */ lwz r5, 0x28(r29) -/* 8007DE38 7F E6 FB 78 */ mr r6, r31 -/* 8007DE3C 81 9C 00 04 */ lwz r12, 4(r28) -/* 8007DE40 81 8C 01 00 */ lwz r12, 0x100(r12) -/* 8007DE44 7D 89 03 A6 */ mtctr r12 -/* 8007DE48 4E 80 04 21 */ bctrl -/* 8007DE4C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DE50 41 82 00 0C */ beq lbl_8007DE5C -/* 8007DE54 38 60 00 00 */ li r3, 0 -/* 8007DE58 48 00 00 90 */ b lbl_8007DEE8 -lbl_8007DE5C: -/* 8007DE5C 3B 60 00 00 */ li r27, 0 -/* 8007DE60 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007DE64 80 63 00 24 */ lwz r3, 0x24(r3) -/* 8007DE68 1C 1A 00 34 */ mulli r0, r26, 0x34 -/* 8007DE6C 7F 43 02 14 */ add r26, r3, r0 -/* 8007DE70 A0 DA 00 2E */ lhz r6, 0x2e(r26) -/* 8007DE74 28 06 FF FF */ cmplwi r6, 0xffff -/* 8007DE78 41 82 00 20 */ beq lbl_8007DE98 -/* 8007DE7C 7F 83 E3 78 */ mr r3, r28 -/* 8007DE80 7F A4 EB 78 */ mr r4, r29 -/* 8007DE84 7F C5 F3 78 */ mr r5, r30 -/* 8007DE88 4B FF FD E9 */ bl SphChkRp__4dBgWFP11dBgS_SphChkPvi -/* 8007DE8C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DE90 41 82 00 08 */ beq lbl_8007DE98 -/* 8007DE94 3B 60 00 01 */ li r27, 1 -lbl_8007DE98: -/* 8007DE98 A3 5A 00 28 */ lhz r26, 0x28(r26) -lbl_8007DE9C: -/* 8007DE9C 3C 1A 00 00 */ addis r0, r26, 0 -/* 8007DEA0 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007DEA4 41 82 00 40 */ beq lbl_8007DEE4 -/* 8007DEA8 7F 83 E3 78 */ mr r3, r28 -/* 8007DEAC 7F A4 EB 78 */ mr r4, r29 -/* 8007DEB0 7F C5 F3 78 */ mr r5, r30 -/* 8007DEB4 7F 46 D3 78 */ mr r6, r26 -/* 8007DEB8 38 FF 00 01 */ addi r7, r31, 1 -/* 8007DEBC 4B FF FF 25 */ bl SphChkGrpRp__4dBgWFP11dBgS_SphChkPvii -/* 8007DEC0 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DEC4 41 82 00 08 */ beq lbl_8007DECC -/* 8007DEC8 3B 60 00 01 */ li r27, 1 -lbl_8007DECC: -/* 8007DECC 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007DED0 80 83 00 24 */ lwz r4, 0x24(r3) -/* 8007DED4 1C 7A 00 34 */ mulli r3, r26, 0x34 -/* 8007DED8 38 03 00 26 */ addi r0, r3, 0x26 -/* 8007DEDC 7F 44 02 2E */ lhzx r26, r4, r0 -/* 8007DEE0 4B FF FF BC */ b lbl_8007DE9C -lbl_8007DEE4: -/* 8007DEE4 7F 63 DB 78 */ mr r3, r27 -lbl_8007DEE8: -/* 8007DEE8 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007DEEC 48 2E 43 31 */ bl _restgpr_26 -/* 8007DEF0 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007DEF4 7C 08 03 A6 */ mtlr r0 -/* 8007DEF8 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007DEFC 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/SphChkRp__4dBgWFP11dBgS_SphChkPvi.s b/asm/d/bg/d_bg_w/SphChkRp__4dBgWFP11dBgS_SphChkPvi.s deleted file mode 100644 index a40151cd40a..00000000000 --- a/asm/d/bg/d_bg_w/SphChkRp__4dBgWFP11dBgS_SphChkPvi.s +++ /dev/null @@ -1,101 +0,0 @@ -lbl_8007DC70: -/* 8007DC70 94 21 FF D0 */ stwu r1, -0x30(r1) -/* 8007DC74 7C 08 02 A6 */ mflr r0 -/* 8007DC78 90 01 00 34 */ stw r0, 0x34(r1) -/* 8007DC7C 39 61 00 30 */ addi r11, r1, 0x30 -/* 8007DC80 48 2E 45 4D */ bl _savegpr_25 -/* 8007DC84 7C 7B 1B 78 */ mr r27, r3 -/* 8007DC88 7C 9C 23 78 */ mr r28, r4 -/* 8007DC8C 7C BD 2B 78 */ mr r29, r5 -/* 8007DC90 7C D9 33 78 */ mr r25, r6 -/* 8007DC94 80 63 00 AC */ lwz r3, 0xac(r3) -/* 8007DC98 1C 19 00 1C */ mulli r0, r25, 0x1c -/* 8007DC9C 7C 63 02 14 */ add r3, r3, r0 -/* 8007DCA0 48 1E AF 15 */ bl cM3d_Cross_AabSph__FPC8cM3dGAabPC8cM3dGSph -/* 8007DCA4 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DCA8 40 82 00 0C */ bne lbl_8007DCB4 -/* 8007DCAC 38 60 00 00 */ li r3, 0 -/* 8007DCB0 48 00 01 18 */ b lbl_8007DDC8 -lbl_8007DCB4: -/* 8007DCB4 80 7B 00 A0 */ lwz r3, 0xa0(r27) -/* 8007DCB8 80 63 00 1C */ lwz r3, 0x1c(r3) -/* 8007DCBC 1C 19 00 14 */ mulli r0, r25, 0x14 -/* 8007DCC0 7F E3 02 14 */ add r31, r3, r0 -/* 8007DCC4 3B C0 00 00 */ li r30, 0 -/* 8007DCC8 A0 1F 00 00 */ lhz r0, 0(r31) -/* 8007DCCC 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007DCD0 41 82 00 B0 */ beq lbl_8007DD80 -/* 8007DCD4 80 7B 00 A4 */ lwz r3, 0xa4(r27) -/* 8007DCD8 A0 1F 00 04 */ lhz r0, 4(r31) -/* 8007DCDC 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007DCE0 7C 63 02 14 */ add r3, r3, r0 -/* 8007DCE4 A0 83 00 04 */ lhz r4, 4(r3) -/* 8007DCE8 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007DCEC 41 82 00 20 */ beq lbl_8007DD0C -/* 8007DCF0 7F 63 DB 78 */ mr r3, r27 -/* 8007DCF4 7F 85 E3 78 */ mr r5, r28 -/* 8007DCF8 7F A6 EB 78 */ mr r6, r29 -/* 8007DCFC 4B FF FE 25 */ bl RwgSphChk__4dBgWFUsP11dBgS_SphChkPv -/* 8007DD00 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DD04 41 82 00 08 */ beq lbl_8007DD0C -/* 8007DD08 3B C0 00 01 */ li r30, 1 -lbl_8007DD0C: -/* 8007DD0C 80 7B 00 A4 */ lwz r3, 0xa4(r27) -/* 8007DD10 A0 1F 00 04 */ lhz r0, 4(r31) -/* 8007DD14 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007DD18 7C 83 02 2E */ lhzx r4, r3, r0 -/* 8007DD1C 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007DD20 41 82 00 20 */ beq lbl_8007DD40 -/* 8007DD24 7F 63 DB 78 */ mr r3, r27 -/* 8007DD28 7F 85 E3 78 */ mr r5, r28 -/* 8007DD2C 7F A6 EB 78 */ mr r6, r29 -/* 8007DD30 4B FF FD F1 */ bl RwgSphChk__4dBgWFUsP11dBgS_SphChkPv -/* 8007DD34 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DD38 41 82 00 08 */ beq lbl_8007DD40 -/* 8007DD3C 3B C0 00 01 */ li r30, 1 -lbl_8007DD40: -/* 8007DD40 80 7B 00 A4 */ lwz r3, 0xa4(r27) -/* 8007DD44 A0 1F 00 04 */ lhz r0, 4(r31) -/* 8007DD48 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007DD4C 7C 63 02 14 */ add r3, r3, r0 -/* 8007DD50 A0 83 00 02 */ lhz r4, 2(r3) -/* 8007DD54 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007DD58 41 82 00 20 */ beq lbl_8007DD78 -/* 8007DD5C 7F 63 DB 78 */ mr r3, r27 -/* 8007DD60 7F 85 E3 78 */ mr r5, r28 -/* 8007DD64 7F A6 EB 78 */ mr r6, r29 -/* 8007DD68 4B FF FD B9 */ bl RwgSphChk__4dBgWFUsP11dBgS_SphChkPv -/* 8007DD6C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DD70 41 82 00 08 */ beq lbl_8007DD78 -/* 8007DD74 3B C0 00 01 */ li r30, 1 -lbl_8007DD78: -/* 8007DD78 7F C3 F3 78 */ mr r3, r30 -/* 8007DD7C 48 00 00 4C */ b lbl_8007DDC8 -lbl_8007DD80: -/* 8007DD80 3B 20 00 00 */ li r25, 0 -/* 8007DD84 3B 40 00 00 */ li r26, 0 -lbl_8007DD88: -/* 8007DD88 38 1A 00 04 */ addi r0, r26, 4 -/* 8007DD8C 7C DF 02 2E */ lhzx r6, r31, r0 -/* 8007DD90 28 06 FF FF */ cmplwi r6, 0xffff -/* 8007DD94 41 82 00 20 */ beq lbl_8007DDB4 -/* 8007DD98 7F 63 DB 78 */ mr r3, r27 -/* 8007DD9C 7F 84 E3 78 */ mr r4, r28 -/* 8007DDA0 7F A5 EB 78 */ mr r5, r29 -/* 8007DDA4 4B FF FE CD */ bl SphChkRp__4dBgWFP11dBgS_SphChkPvi -/* 8007DDA8 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007DDAC 41 82 00 08 */ beq lbl_8007DDB4 -/* 8007DDB0 3B C0 00 01 */ li r30, 1 -lbl_8007DDB4: -/* 8007DDB4 3B 39 00 01 */ addi r25, r25, 1 -/* 8007DDB8 2C 19 00 08 */ cmpwi r25, 8 -/* 8007DDBC 3B 5A 00 02 */ addi r26, r26, 2 -/* 8007DDC0 41 80 FF C8 */ blt lbl_8007DD88 -/* 8007DDC4 7F C3 F3 78 */ mr r3, r30 -lbl_8007DDC8: -/* 8007DDC8 39 61 00 30 */ addi r11, r1, 0x30 -/* 8007DDCC 48 2E 44 4D */ bl _restgpr_25 -/* 8007DDD0 80 01 00 34 */ lwz r0, 0x34(r1) -/* 8007DDD4 7C 08 03 A6 */ mtlr r0 -/* 8007DDD8 38 21 00 30 */ addi r1, r1, 0x30 -/* 8007DDDC 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/SplGrpChkGrpRp__4dBgWFP14dBgS_SplGrpChkii.s b/asm/d/bg/d_bg_w/SplGrpChkGrpRp__4dBgWFP14dBgS_SplGrpChkii.s deleted file mode 100644 index b64dfa46239..00000000000 --- a/asm/d/bg/d_bg_w/SplGrpChkGrpRp__4dBgWFP14dBgS_SplGrpChkii.s +++ /dev/null @@ -1,89 +0,0 @@ -lbl_8007D6F0: -/* 8007D6F0 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007D6F4 7C 08 02 A6 */ mflr r0 -/* 8007D6F8 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007D6FC 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D700 48 2E 4A D5 */ bl _savegpr_27 -/* 8007D704 7C 7D 1B 78 */ mr r29, r3 -/* 8007D708 7C 9E 23 78 */ mr r30, r4 -/* 8007D70C 7C BB 2B 78 */ mr r27, r5 -/* 8007D710 7C DF 33 78 */ mr r31, r6 -/* 8007D714 80 63 00 A8 */ lwz r3, 0xa8(r3) -/* 8007D718 54 A0 28 34 */ slwi r0, r5, 5 -/* 8007D71C 7F 83 02 14 */ add r28, r3, r0 -/* 8007D720 38 7C 00 04 */ addi r3, r28, 4 -/* 8007D724 38 9E 00 3C */ addi r4, r30, 0x3c -/* 8007D728 48 1F 15 61 */ bl CrossY__8cM3dGAabCFPC4cXyz -/* 8007D72C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D730 41 82 00 2C */ beq lbl_8007D75C -/* 8007D734 38 7C 00 04 */ addi r3, r28, 4 -/* 8007D738 C0 3E 00 48 */ lfs f1, 0x48(r30) -/* 8007D73C 48 1F 15 95 */ bl UnderPlaneYUnder__8cM3dGAabCFf -/* 8007D740 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D744 41 82 00 18 */ beq lbl_8007D75C -/* 8007D748 38 7C 00 04 */ addi r3, r28, 4 -/* 8007D74C C0 3E 00 4C */ lfs f1, 0x4c(r30) -/* 8007D750 48 1F 15 95 */ bl TopPlaneYUnder__8cM3dGAabCFf -/* 8007D754 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D758 41 82 00 0C */ beq lbl_8007D764 -lbl_8007D75C: -/* 8007D75C 38 60 00 00 */ li r3, 0 -/* 8007D760 48 00 00 B8 */ b lbl_8007D818 -lbl_8007D764: -/* 8007D764 7F A3 EB 78 */ mr r3, r29 -/* 8007D768 7F 64 DB 78 */ mr r4, r27 -/* 8007D76C 80 BE 00 14 */ lwz r5, 0x14(r30) -/* 8007D770 7F E6 FB 78 */ mr r6, r31 -/* 8007D774 81 9D 00 04 */ lwz r12, 4(r29) -/* 8007D778 81 8C 01 00 */ lwz r12, 0x100(r12) -/* 8007D77C 7D 89 03 A6 */ mtctr r12 -/* 8007D780 4E 80 04 21 */ bctrl -/* 8007D784 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D788 41 82 00 0C */ beq lbl_8007D794 -/* 8007D78C 38 60 00 00 */ li r3, 0 -/* 8007D790 48 00 00 88 */ b lbl_8007D818 -lbl_8007D794: -/* 8007D794 3B 80 00 00 */ li r28, 0 -/* 8007D798 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007D79C 80 63 00 24 */ lwz r3, 0x24(r3) -/* 8007D7A0 1C 1B 00 34 */ mulli r0, r27, 0x34 -/* 8007D7A4 7F 63 02 14 */ add r27, r3, r0 -/* 8007D7A8 A0 BB 00 2E */ lhz r5, 0x2e(r27) -/* 8007D7AC 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007D7B0 41 82 00 1C */ beq lbl_8007D7CC -/* 8007D7B4 7F A3 EB 78 */ mr r3, r29 -/* 8007D7B8 7F C4 F3 78 */ mr r4, r30 -/* 8007D7BC 4B FF FE 09 */ bl SplGrpChkRp__4dBgWFP14dBgS_SplGrpChki -/* 8007D7C0 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D7C4 41 82 00 08 */ beq lbl_8007D7CC -/* 8007D7C8 3B 80 00 01 */ li r28, 1 -lbl_8007D7CC: -/* 8007D7CC A3 7B 00 28 */ lhz r27, 0x28(r27) -lbl_8007D7D0: -/* 8007D7D0 3C 1B 00 00 */ addis r0, r27, 0 -/* 8007D7D4 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007D7D8 41 82 00 3C */ beq lbl_8007D814 -/* 8007D7DC 7F A3 EB 78 */ mr r3, r29 -/* 8007D7E0 7F C4 F3 78 */ mr r4, r30 -/* 8007D7E4 7F 65 DB 78 */ mr r5, r27 -/* 8007D7E8 38 DF 00 01 */ addi r6, r31, 1 -/* 8007D7EC 4B FF FF 05 */ bl SplGrpChkGrpRp__4dBgWFP14dBgS_SplGrpChkii -/* 8007D7F0 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D7F4 41 82 00 08 */ beq lbl_8007D7FC -/* 8007D7F8 3B 80 00 01 */ li r28, 1 -lbl_8007D7FC: -/* 8007D7FC 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007D800 80 83 00 24 */ lwz r4, 0x24(r3) -/* 8007D804 1C 7B 00 34 */ mulli r3, r27, 0x34 -/* 8007D808 38 03 00 26 */ addi r0, r3, 0x26 -/* 8007D80C 7F 64 02 2E */ lhzx r27, r4, r0 -/* 8007D810 4B FF FF C0 */ b lbl_8007D7D0 -lbl_8007D814: -/* 8007D814 7F 83 E3 78 */ mr r3, r28 -lbl_8007D818: -/* 8007D818 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D81C 48 2E 4A 05 */ bl _restgpr_27 -/* 8007D820 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007D824 7C 08 03 A6 */ mtlr r0 -/* 8007D828 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007D82C 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/SplGrpChkRp__4dBgWFP14dBgS_SplGrpChki.s b/asm/d/bg/d_bg_w/SplGrpChkRp__4dBgWFP14dBgS_SplGrpChki.s deleted file mode 100644 index 5e970aae43a..00000000000 --- a/asm/d/bg/d_bg_w/SplGrpChkRp__4dBgWFP14dBgS_SplGrpChki.s +++ /dev/null @@ -1,83 +0,0 @@ -lbl_8007D5C4: -/* 8007D5C4 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007D5C8 7C 08 02 A6 */ mflr r0 -/* 8007D5CC 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007D5D0 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D5D4 48 2E 4B FD */ bl _savegpr_26 -/* 8007D5D8 7C 7E 1B 78 */ mr r30, r3 -/* 8007D5DC 7C 9F 23 78 */ mr r31, r4 -/* 8007D5E0 7C BA 2B 78 */ mr r26, r5 -/* 8007D5E4 80 63 00 AC */ lwz r3, 0xac(r3) -/* 8007D5E8 1C 1A 00 1C */ mulli r0, r26, 0x1c -/* 8007D5EC 7F A3 02 14 */ add r29, r3, r0 -/* 8007D5F0 7F A3 EB 78 */ mr r3, r29 -/* 8007D5F4 38 9F 00 3C */ addi r4, r31, 0x3c -/* 8007D5F8 48 1F 16 91 */ bl CrossY__8cM3dGAabCFPC4cXyz -/* 8007D5FC 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D600 41 82 00 2C */ beq lbl_8007D62C -/* 8007D604 7F A3 EB 78 */ mr r3, r29 -/* 8007D608 C0 3F 00 48 */ lfs f1, 0x48(r31) -/* 8007D60C 48 1F 16 C5 */ bl UnderPlaneYUnder__8cM3dGAabCFf -/* 8007D610 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D614 41 82 00 18 */ beq lbl_8007D62C -/* 8007D618 7F A3 EB 78 */ mr r3, r29 -/* 8007D61C C0 3F 00 4C */ lfs f1, 0x4c(r31) -/* 8007D620 48 1F 16 C5 */ bl TopPlaneYUnder__8cM3dGAabCFf -/* 8007D624 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D628 41 82 00 0C */ beq lbl_8007D634 -lbl_8007D62C: -/* 8007D62C 38 60 00 00 */ li r3, 0 -/* 8007D630 48 00 00 A8 */ b lbl_8007D6D8 -lbl_8007D634: -/* 8007D634 80 7E 00 A0 */ lwz r3, 0xa0(r30) -/* 8007D638 80 63 00 1C */ lwz r3, 0x1c(r3) -/* 8007D63C 1C 1A 00 14 */ mulli r0, r26, 0x14 -/* 8007D640 7F 83 02 14 */ add r28, r3, r0 -/* 8007D644 A0 1C 00 00 */ lhz r0, 0(r28) -/* 8007D648 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007D64C 41 82 00 44 */ beq lbl_8007D690 -/* 8007D650 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007D654 A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007D658 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007D65C 7C 63 02 14 */ add r3, r3, r0 -/* 8007D660 A0 83 00 04 */ lhz r4, 4(r3) -/* 8007D664 28 04 FF FF */ cmplwi r4, 0xffff -/* 8007D668 41 82 00 20 */ beq lbl_8007D688 -/* 8007D66C 7F C3 F3 78 */ mr r3, r30 -/* 8007D670 7F E5 FB 78 */ mr r5, r31 -/* 8007D674 4B FF FE 25 */ bl RwgSplGrpChk__4dBgWFUsP14dBgS_SplGrpChk -/* 8007D678 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D67C 41 82 00 0C */ beq lbl_8007D688 -/* 8007D680 38 60 00 01 */ li r3, 1 -/* 8007D684 48 00 00 54 */ b lbl_8007D6D8 -lbl_8007D688: -/* 8007D688 38 60 00 00 */ li r3, 0 -/* 8007D68C 48 00 00 4C */ b lbl_8007D6D8 -lbl_8007D690: -/* 8007D690 3B 60 00 00 */ li r27, 0 -/* 8007D694 3B 40 00 00 */ li r26, 0 -/* 8007D698 3B A0 00 00 */ li r29, 0 -lbl_8007D69C: -/* 8007D69C 38 1D 00 04 */ addi r0, r29, 4 -/* 8007D6A0 7C BC 02 2E */ lhzx r5, r28, r0 -/* 8007D6A4 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007D6A8 41 82 00 1C */ beq lbl_8007D6C4 -/* 8007D6AC 7F C3 F3 78 */ mr r3, r30 -/* 8007D6B0 7F E4 FB 78 */ mr r4, r31 -/* 8007D6B4 4B FF FF 11 */ bl SplGrpChkRp__4dBgWFP14dBgS_SplGrpChki -/* 8007D6B8 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007D6BC 41 82 00 08 */ beq lbl_8007D6C4 -/* 8007D6C0 3B 60 00 01 */ li r27, 1 -lbl_8007D6C4: -/* 8007D6C4 3B 5A 00 01 */ addi r26, r26, 1 -/* 8007D6C8 2C 1A 00 08 */ cmpwi r26, 8 -/* 8007D6CC 3B BD 00 02 */ addi r29, r29, 2 -/* 8007D6D0 41 80 FF CC */ blt lbl_8007D69C -/* 8007D6D4 7F 63 DB 78 */ mr r3, r27 -lbl_8007D6D8: -/* 8007D6D8 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007D6DC 48 2E 4B 41 */ bl _restgpr_26 -/* 8007D6E0 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007D6E4 7C 08 03 A6 */ mtlr r0 -/* 8007D6E8 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007D6EC 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/TransPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s b/asm/d/bg/d_bg_w/TransPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s deleted file mode 100644 index 449891cc1ae..00000000000 --- a/asm/d/bg/d_bg_w/TransPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s +++ /dev/null @@ -1,17 +0,0 @@ -lbl_8007DFC4: -/* 8007DFC4 94 21 FF F0 */ stwu r1, -0x10(r1) -/* 8007DFC8 7C 08 02 A6 */ mflr r0 -/* 8007DFCC 90 01 00 14 */ stw r0, 0x14(r1) -/* 8007DFD0 7C 80 23 78 */ mr r0, r4 -/* 8007DFD4 81 83 00 B0 */ lwz r12, 0xb0(r3) -/* 8007DFD8 28 0C 00 00 */ cmplwi r12, 0 -/* 8007DFDC 41 82 00 14 */ beq lbl_8007DFF0 -/* 8007DFE0 7C A4 2B 78 */ mr r4, r5 -/* 8007DFE4 7C 05 03 78 */ mr r5, r0 -/* 8007DFE8 7D 89 03 A6 */ mtctr r12 -/* 8007DFEC 4E 80 04 21 */ bctrl -lbl_8007DFF0: -/* 8007DFF0 80 01 00 14 */ lwz r0, 0x14(r1) -/* 8007DFF4 7C 08 03 A6 */ mtlr r0 -/* 8007DFF8 38 21 00 10 */ addi r1, r1, 0x10 -/* 8007DFFC 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/WallCorrectGrpRpSort__4dBgWFP9dBgS_Acchii.s b/asm/d/bg/d_bg_w/WallCorrectGrpRpSort__4dBgWFP9dBgS_Acchii.s deleted file mode 100644 index 9cc0f20722d..00000000000 --- a/asm/d/bg/d_bg_w/WallCorrectGrpRpSort__4dBgWFP9dBgS_Acchii.s +++ /dev/null @@ -1,73 +0,0 @@ -lbl_8007C808: -/* 8007C808 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007C80C 7C 08 02 A6 */ mflr r0 -/* 8007C810 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007C814 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007C818 48 2E 59 C1 */ bl _savegpr_28 -/* 8007C81C 7C 7D 1B 78 */ mr r29, r3 -/* 8007C820 7C 9E 23 78 */ mr r30, r4 -/* 8007C824 7C BC 2B 78 */ mr r28, r5 -/* 8007C828 7C DF 33 78 */ mr r31, r6 -/* 8007C82C 38 9E 00 60 */ addi r4, r30, 0x60 -/* 8007C830 80 03 00 A8 */ lwz r0, 0xa8(r3) -/* 8007C834 54 A3 28 34 */ slwi r3, r5, 5 -/* 8007C838 38 63 00 04 */ addi r3, r3, 4 -/* 8007C83C 7C 60 1A 14 */ add r3, r0, r3 -/* 8007C840 48 1E C2 CD */ bl cM3d_Cross_AabCyl__FPC8cM3dGAabPC8cM3dGCyl -/* 8007C844 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C848 40 82 00 0C */ bne lbl_8007C854 -/* 8007C84C 38 60 00 00 */ li r3, 0 -/* 8007C850 48 00 00 A8 */ b lbl_8007C8F8 -lbl_8007C854: -/* 8007C854 7F A3 EB 78 */ mr r3, r29 -/* 8007C858 7F 84 E3 78 */ mr r4, r28 -/* 8007C85C 80 BE 00 04 */ lwz r5, 4(r30) -/* 8007C860 7F E6 FB 78 */ mr r6, r31 -/* 8007C864 81 9D 00 04 */ lwz r12, 4(r29) -/* 8007C868 81 8C 01 00 */ lwz r12, 0x100(r12) -/* 8007C86C 7D 89 03 A6 */ mtctr r12 -/* 8007C870 4E 80 04 21 */ bctrl -/* 8007C874 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C878 41 82 00 0C */ beq lbl_8007C884 -/* 8007C87C 38 60 00 00 */ li r3, 0 -/* 8007C880 48 00 00 78 */ b lbl_8007C8F8 -lbl_8007C884: -/* 8007C884 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007C888 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007C88C 1F 9C 00 34 */ mulli r28, r28, 0x34 -/* 8007C890 7C 60 E2 14 */ add r3, r0, r28 -/* 8007C894 A0 A3 00 2E */ lhz r5, 0x2e(r3) -/* 8007C898 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007C89C 41 82 00 10 */ beq lbl_8007C8AC -/* 8007C8A0 7F A3 EB 78 */ mr r3, r29 -/* 8007C8A4 7F C4 F3 78 */ mr r4, r30 -/* 8007C8A8 4B FF FE 6D */ bl WallCorrectRpSort__4dBgWFP9dBgS_Acchi -lbl_8007C8AC: -/* 8007C8AC 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007C8B0 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007C8B4 7C 60 E2 14 */ add r3, r0, r28 -/* 8007C8B8 A3 83 00 28 */ lhz r28, 0x28(r3) -lbl_8007C8BC: -/* 8007C8BC 3C 1C 00 00 */ addis r0, r28, 0 -/* 8007C8C0 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007C8C4 41 82 00 30 */ beq lbl_8007C8F4 -/* 8007C8C8 7F A3 EB 78 */ mr r3, r29 -/* 8007C8CC 7F C4 F3 78 */ mr r4, r30 -/* 8007C8D0 7F 85 E3 78 */ mr r5, r28 -/* 8007C8D4 38 DF 00 01 */ addi r6, r31, 1 -/* 8007C8D8 4B FF FF 31 */ bl WallCorrectGrpRpSort__4dBgWFP9dBgS_Acchii -/* 8007C8DC 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007C8E0 80 83 00 24 */ lwz r4, 0x24(r3) -/* 8007C8E4 1C 7C 00 34 */ mulli r3, r28, 0x34 -/* 8007C8E8 38 03 00 26 */ addi r0, r3, 0x26 -/* 8007C8EC 7F 84 02 2E */ lhzx r28, r4, r0 -/* 8007C8F0 4B FF FF CC */ b lbl_8007C8BC -lbl_8007C8F4: -/* 8007C8F4 38 60 00 00 */ li r3, 0 -lbl_8007C8F8: -/* 8007C8F8 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007C8FC 48 2E 59 29 */ bl _restgpr_28 -/* 8007C900 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007C904 7C 08 03 A6 */ mtlr r0 -/* 8007C908 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007C90C 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/WallCorrectGrpRp__4dBgWFP9dBgS_Acchii.s b/asm/d/bg/d_bg_w/WallCorrectGrpRp__4dBgWFP9dBgS_Acchii.s deleted file mode 100644 index 91446f77821..00000000000 --- a/asm/d/bg/d_bg_w/WallCorrectGrpRp__4dBgWFP9dBgS_Acchii.s +++ /dev/null @@ -1,81 +0,0 @@ -lbl_8007C360: -/* 8007C360 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007C364 7C 08 02 A6 */ mflr r0 -/* 8007C368 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007C36C 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007C370 48 2E 5E 65 */ bl _savegpr_27 -/* 8007C374 7C 7C 1B 78 */ mr r28, r3 -/* 8007C378 7C 9D 23 78 */ mr r29, r4 -/* 8007C37C 7C BB 2B 78 */ mr r27, r5 -/* 8007C380 7C DE 33 78 */ mr r30, r6 -/* 8007C384 38 9D 00 60 */ addi r4, r29, 0x60 -/* 8007C388 80 03 00 A8 */ lwz r0, 0xa8(r3) -/* 8007C38C 54 A3 28 34 */ slwi r3, r5, 5 -/* 8007C390 38 63 00 04 */ addi r3, r3, 4 -/* 8007C394 7C 60 1A 14 */ add r3, r0, r3 -/* 8007C398 48 1E C7 75 */ bl cM3d_Cross_AabCyl__FPC8cM3dGAabPC8cM3dGCyl -/* 8007C39C 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C3A0 40 82 00 0C */ bne lbl_8007C3AC -/* 8007C3A4 38 60 00 00 */ li r3, 0 -/* 8007C3A8 48 00 00 C4 */ b lbl_8007C46C -lbl_8007C3AC: -/* 8007C3AC 7F 83 E3 78 */ mr r3, r28 -/* 8007C3B0 7F 64 DB 78 */ mr r4, r27 -/* 8007C3B4 80 BD 00 04 */ lwz r5, 4(r29) -/* 8007C3B8 7F C6 F3 78 */ mr r6, r30 -/* 8007C3BC 81 9C 00 04 */ lwz r12, 4(r28) -/* 8007C3C0 81 8C 01 00 */ lwz r12, 0x100(r12) -/* 8007C3C4 7D 89 03 A6 */ mtctr r12 -/* 8007C3C8 4E 80 04 21 */ bctrl -/* 8007C3CC 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C3D0 41 82 00 0C */ beq lbl_8007C3DC -/* 8007C3D4 38 60 00 00 */ li r3, 0 -/* 8007C3D8 48 00 00 94 */ b lbl_8007C46C -lbl_8007C3DC: -/* 8007C3DC 3B E0 00 00 */ li r31, 0 -/* 8007C3E0 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007C3E4 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007C3E8 1F 7B 00 34 */ mulli r27, r27, 0x34 -/* 8007C3EC 7C 60 DA 14 */ add r3, r0, r27 -/* 8007C3F0 A0 A3 00 2E */ lhz r5, 0x2e(r3) -/* 8007C3F4 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007C3F8 41 82 00 1C */ beq lbl_8007C414 -/* 8007C3FC 7F 83 E3 78 */ mr r3, r28 -/* 8007C400 7F A4 EB 78 */ mr r4, r29 -/* 8007C404 4B FF FE 31 */ bl WallCorrectRp__4dBgWFP9dBgS_Acchi -/* 8007C408 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C40C 41 82 00 08 */ beq lbl_8007C414 -/* 8007C410 3B E0 00 01 */ li r31, 1 -lbl_8007C414: -/* 8007C414 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007C418 80 03 00 24 */ lwz r0, 0x24(r3) -/* 8007C41C 7C 60 DA 14 */ add r3, r0, r27 -/* 8007C420 A3 63 00 28 */ lhz r27, 0x28(r3) -lbl_8007C424: -/* 8007C424 3C 1B 00 00 */ addis r0, r27, 0 -/* 8007C428 28 00 FF FF */ cmplwi r0, 0xffff -/* 8007C42C 41 82 00 3C */ beq lbl_8007C468 -/* 8007C430 7F 83 E3 78 */ mr r3, r28 -/* 8007C434 7F A4 EB 78 */ mr r4, r29 -/* 8007C438 7F 65 DB 78 */ mr r5, r27 -/* 8007C43C 38 DE 00 01 */ addi r6, r30, 1 -/* 8007C440 4B FF FF 21 */ bl WallCorrectGrpRp__4dBgWFP9dBgS_Acchii -/* 8007C444 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C448 41 82 00 08 */ beq lbl_8007C450 -/* 8007C44C 3B E0 00 01 */ li r31, 1 -lbl_8007C450: -/* 8007C450 80 7C 00 A0 */ lwz r3, 0xa0(r28) -/* 8007C454 80 83 00 24 */ lwz r4, 0x24(r3) -/* 8007C458 1C 7B 00 34 */ mulli r3, r27, 0x34 -/* 8007C45C 38 03 00 26 */ addi r0, r3, 0x26 -/* 8007C460 7F 64 02 2E */ lhzx r27, r4, r0 -/* 8007C464 4B FF FF C0 */ b lbl_8007C424 -lbl_8007C468: -/* 8007C468 7F E3 FB 78 */ mr r3, r31 -lbl_8007C46C: -/* 8007C46C 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007C470 48 2E 5D B1 */ bl _restgpr_27 -/* 8007C474 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007C478 7C 08 03 A6 */ mtlr r0 -/* 8007C47C 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007C480 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/WallCorrectRpSort__4dBgWFP9dBgS_Acchi.s b/asm/d/bg/d_bg_w/WallCorrectRpSort__4dBgWFP9dBgS_Acchi.s deleted file mode 100644 index 175dd92f5f1..00000000000 --- a/asm/d/bg/d_bg_w/WallCorrectRpSort__4dBgWFP9dBgS_Acchi.s +++ /dev/null @@ -1,67 +0,0 @@ -lbl_8007C714: -/* 8007C714 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007C718 7C 08 02 A6 */ mflr r0 -/* 8007C71C 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007C720 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007C724 48 2E 5A B1 */ bl _savegpr_27 -/* 8007C728 7C 7E 1B 78 */ mr r30, r3 -/* 8007C72C 7C 9F 23 78 */ mr r31, r4 -/* 8007C730 7C BB 2B 78 */ mr r27, r5 -/* 8007C734 38 9F 00 60 */ addi r4, r31, 0x60 -/* 8007C738 80 63 00 AC */ lwz r3, 0xac(r3) -/* 8007C73C 1C 1B 00 1C */ mulli r0, r27, 0x1c -/* 8007C740 7C 63 02 14 */ add r3, r3, r0 -/* 8007C744 48 1E C3 C9 */ bl cM3d_Cross_AabCyl__FPC8cM3dGAabPC8cM3dGCyl -/* 8007C748 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C74C 41 82 00 A4 */ beq lbl_8007C7F0 -/* 8007C750 80 7E 00 A0 */ lwz r3, 0xa0(r30) -/* 8007C754 80 63 00 1C */ lwz r3, 0x1c(r3) -/* 8007C758 1C 1B 00 14 */ mulli r0, r27, 0x14 -/* 8007C75C 7F 83 02 14 */ add r28, r3, r0 -/* 8007C760 A0 1C 00 00 */ lhz r0, 0(r28) -/* 8007C764 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007C768 41 82 00 54 */ beq lbl_8007C7BC -/* 8007C76C 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007C770 A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007C774 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007C778 7C 63 02 14 */ add r3, r3, r0 -/* 8007C77C A0 A3 00 02 */ lhz r5, 2(r3) -/* 8007C780 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007C784 41 82 00 10 */ beq lbl_8007C794 -/* 8007C788 7F C3 F3 78 */ mr r3, r30 -/* 8007C78C 7F E4 FB 78 */ mr r4, r31 -/* 8007C790 4B FF FD 1D */ bl RwgWallCorrectSort__4dBgWFP9dBgS_AcchUs -lbl_8007C794: -/* 8007C794 80 7E 00 A4 */ lwz r3, 0xa4(r30) -/* 8007C798 A0 1C 00 04 */ lhz r0, 4(r28) -/* 8007C79C 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007C7A0 7C A3 02 2E */ lhzx r5, r3, r0 -/* 8007C7A4 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007C7A8 41 82 00 48 */ beq lbl_8007C7F0 -/* 8007C7AC 7F C3 F3 78 */ mr r3, r30 -/* 8007C7B0 7F E4 FB 78 */ mr r4, r31 -/* 8007C7B4 4B FF FC F9 */ bl RwgWallCorrectSort__4dBgWFP9dBgS_AcchUs -/* 8007C7B8 48 00 00 38 */ b lbl_8007C7F0 -lbl_8007C7BC: -/* 8007C7BC 3B 60 00 00 */ li r27, 0 -/* 8007C7C0 3B A0 00 00 */ li r29, 0 -lbl_8007C7C4: -/* 8007C7C4 38 1D 00 04 */ addi r0, r29, 4 -/* 8007C7C8 7C BC 02 2E */ lhzx r5, r28, r0 -/* 8007C7CC 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007C7D0 41 82 00 10 */ beq lbl_8007C7E0 -/* 8007C7D4 7F C3 F3 78 */ mr r3, r30 -/* 8007C7D8 7F E4 FB 78 */ mr r4, r31 -/* 8007C7DC 4B FF FF 39 */ bl WallCorrectRpSort__4dBgWFP9dBgS_Acchi -lbl_8007C7E0: -/* 8007C7E0 3B 7B 00 01 */ addi r27, r27, 1 -/* 8007C7E4 2C 1B 00 08 */ cmpwi r27, 8 -/* 8007C7E8 3B BD 00 02 */ addi r29, r29, 2 -/* 8007C7EC 41 80 FF D8 */ blt lbl_8007C7C4 -lbl_8007C7F0: -/* 8007C7F0 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007C7F4 48 2E 5A 2D */ bl _restgpr_27 -/* 8007C7F8 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007C7FC 7C 08 03 A6 */ mtlr r0 -/* 8007C800 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007C804 4E 80 00 20 */ blr diff --git a/asm/d/bg/d_bg_w/WallCorrectRp__4dBgWFP9dBgS_Acchi.s b/asm/d/bg/d_bg_w/WallCorrectRp__4dBgWFP9dBgS_Acchi.s deleted file mode 100644 index 7a5f5b2232f..00000000000 --- a/asm/d/bg/d_bg_w/WallCorrectRp__4dBgWFP9dBgS_Acchi.s +++ /dev/null @@ -1,83 +0,0 @@ -lbl_8007C234: -/* 8007C234 94 21 FF E0 */ stwu r1, -0x20(r1) -/* 8007C238 7C 08 02 A6 */ mflr r0 -/* 8007C23C 90 01 00 24 */ stw r0, 0x24(r1) -/* 8007C240 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007C244 48 2E 5F 8D */ bl _savegpr_26 -/* 8007C248 7C 7D 1B 78 */ mr r29, r3 -/* 8007C24C 7C 9E 23 78 */ mr r30, r4 -/* 8007C250 7C BA 2B 78 */ mr r26, r5 -/* 8007C254 38 9E 00 60 */ addi r4, r30, 0x60 -/* 8007C258 80 63 00 AC */ lwz r3, 0xac(r3) -/* 8007C25C 1C 1A 00 1C */ mulli r0, r26, 0x1c -/* 8007C260 7C 63 02 14 */ add r3, r3, r0 -/* 8007C264 48 1E C8 A9 */ bl cM3d_Cross_AabCyl__FPC8cM3dGAabPC8cM3dGCyl -/* 8007C268 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C26C 40 82 00 0C */ bne lbl_8007C278 -/* 8007C270 38 60 00 00 */ li r3, 0 -/* 8007C274 48 00 00 D4 */ b lbl_8007C348 -lbl_8007C278: -/* 8007C278 80 7D 00 A0 */ lwz r3, 0xa0(r29) -/* 8007C27C 80 63 00 1C */ lwz r3, 0x1c(r3) -/* 8007C280 1C 1A 00 14 */ mulli r0, r26, 0x14 -/* 8007C284 7F 63 02 14 */ add r27, r3, r0 -/* 8007C288 3B E0 00 00 */ li r31, 0 -/* 8007C28C A0 1B 00 00 */ lhz r0, 0(r27) -/* 8007C290 54 00 07 FF */ clrlwi. r0, r0, 0x1f -/* 8007C294 41 82 00 70 */ beq lbl_8007C304 -/* 8007C298 80 7D 00 A4 */ lwz r3, 0xa4(r29) -/* 8007C29C A0 1B 00 04 */ lhz r0, 4(r27) -/* 8007C2A0 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007C2A4 7C 63 02 14 */ add r3, r3, r0 -/* 8007C2A8 A0 A3 00 02 */ lhz r5, 2(r3) -/* 8007C2AC 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007C2B0 41 82 00 1C */ beq lbl_8007C2CC -/* 8007C2B4 7F A3 EB 78 */ mr r3, r29 -/* 8007C2B8 7F C4 F3 78 */ mr r4, r30 -/* 8007C2BC 4B FF F7 85 */ bl RwgWallCorrect__4dBgWFP9dBgS_AcchUs -/* 8007C2C0 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C2C4 41 82 00 08 */ beq lbl_8007C2CC -/* 8007C2C8 3B E0 00 01 */ li r31, 1 -lbl_8007C2CC: -/* 8007C2CC 80 7D 00 A4 */ lwz r3, 0xa4(r29) -/* 8007C2D0 A0 1B 00 04 */ lhz r0, 4(r27) -/* 8007C2D4 1C 00 00 06 */ mulli r0, r0, 6 -/* 8007C2D8 7C A3 02 2E */ lhzx r5, r3, r0 -/* 8007C2DC 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007C2E0 41 82 00 1C */ beq lbl_8007C2FC -/* 8007C2E4 7F A3 EB 78 */ mr r3, r29 -/* 8007C2E8 7F C4 F3 78 */ mr r4, r30 -/* 8007C2EC 4B FF F7 55 */ bl RwgWallCorrect__4dBgWFP9dBgS_AcchUs -/* 8007C2F0 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C2F4 41 82 00 08 */ beq lbl_8007C2FC -/* 8007C2F8 3B E0 00 01 */ li r31, 1 -lbl_8007C2FC: -/* 8007C2FC 7F E3 FB 78 */ mr r3, r31 -/* 8007C300 48 00 00 48 */ b lbl_8007C348 -lbl_8007C304: -/* 8007C304 3B 40 00 00 */ li r26, 0 -/* 8007C308 3B 80 00 00 */ li r28, 0 -lbl_8007C30C: -/* 8007C30C 38 1C 00 04 */ addi r0, r28, 4 -/* 8007C310 7C BB 02 2E */ lhzx r5, r27, r0 -/* 8007C314 28 05 FF FF */ cmplwi r5, 0xffff -/* 8007C318 41 82 00 1C */ beq lbl_8007C334 -/* 8007C31C 7F A3 EB 78 */ mr r3, r29 -/* 8007C320 7F C4 F3 78 */ mr r4, r30 -/* 8007C324 4B FF FF 11 */ bl WallCorrectRp__4dBgWFP9dBgS_Acchi -/* 8007C328 54 60 06 3F */ clrlwi. r0, r3, 0x18 -/* 8007C32C 41 82 00 08 */ beq lbl_8007C334 -/* 8007C330 3B E0 00 01 */ li r31, 1 -lbl_8007C334: -/* 8007C334 3B 5A 00 01 */ addi r26, r26, 1 -/* 8007C338 2C 1A 00 08 */ cmpwi r26, 8 -/* 8007C33C 3B 9C 00 02 */ addi r28, r28, 2 -/* 8007C340 41 80 FF CC */ blt lbl_8007C30C -/* 8007C344 7F E3 FB 78 */ mr r3, r31 -lbl_8007C348: -/* 8007C348 39 61 00 20 */ addi r11, r1, 0x20 -/* 8007C34C 48 2E 5E D1 */ bl _restgpr_26 -/* 8007C350 80 01 00 24 */ lwz r0, 0x24(r1) -/* 8007C354 7C 08 03 A6 */ mtlr r0 -/* 8007C358 38 21 00 20 */ addi r1, r1, 0x20 -/* 8007C35C 4E 80 00 20 */ blr diff --git a/include/SSystem/SComponent/c_bg_s_chk.h b/include/SSystem/SComponent/c_bg_s_chk.h index 2096801b1b2..8367b50e25c 100644 --- a/include/SSystem/SComponent/c_bg_s_chk.h +++ b/include/SSystem/SComponent/c_bg_s_chk.h @@ -30,6 +30,7 @@ public: void SetPolyPassChk(cBgS_PolyPassChk* p_chk) { mPolyPassChk = p_chk; } void SetGrpPassChk(cBgS_GrpPassChk* p_chk) { mGrpPassChk = p_chk; } cBgS_PolyPassChk* GetPolyPassChk() const { return mPolyPassChk; } + cBgS_GrpPassChk* GetGrpPassChk() const { return mGrpPassChk; } virtual ~cBgS_Chk(void); }; // Size: 0x14 diff --git a/include/SSystem/SComponent/c_bg_s_gnd_chk.h b/include/SSystem/SComponent/c_bg_s_gnd_chk.h index ca1abef890c..f4446c0786e 100644 --- a/include/SSystem/SComponent/c_bg_s_gnd_chk.h +++ b/include/SSystem/SComponent/c_bg_s_gnd_chk.h @@ -16,6 +16,8 @@ public: f32 GetNowY() const { return mNowY; } void SetNowY(f32 y) { mNowY = y; } + const cXyz& GetPointP() { return m_pos; } + u32 GetWallPrecheck() const { return mWallPrecheck; } private: /* 0x24 */ cXyz m_pos; diff --git a/include/SSystem/SComponent/c_bg_s_shdw_draw.h b/include/SSystem/SComponent/c_bg_s_shdw_draw.h index a17dd2a30f9..806d7cf5d3c 100644 --- a/include/SSystem/SComponent/c_bg_s_shdw_draw.h +++ b/include/SSystem/SComponent/c_bg_s_shdw_draw.h @@ -10,7 +10,7 @@ class cM3dGPla; typedef int (*cBgS_ShdwDraw_Callback)(class cBgS_ShdwDraw*, cBgD_Vtx_t*, int, int, int, cM3dGPla*); -class cBgS_ShdwDraw : cBgS_Chk { +class cBgS_ShdwDraw : public cBgS_Chk { public: cBgS_ShdwDraw(void); virtual ~cBgS_ShdwDraw(void); @@ -19,7 +19,6 @@ public: cM3dGAab* GetBndP() { return &mM3dGAab; } -private: /* 0x14 */ cM3dGAab mM3dGAab; /* 0x30 */ cBgS_ShdwDraw_Callback mCallbackFun; }; diff --git a/include/SSystem/SComponent/c_m3d.h b/include/SSystem/SComponent/c_m3d.h index 931f31c4d5a..23ad25f5828 100644 --- a/include/SSystem/SComponent/c_m3d.h +++ b/include/SSystem/SComponent/c_m3d.h @@ -62,6 +62,9 @@ static bool cM3d_Cross_SphSph(const cM3dGSph*, const cM3dGSph*, f32*, f32*); bool cM3d_Cross_SphSph(const cM3dGSph*, const cM3dGSph*, Vec*); static void cM3d_CalcSphVsTriCrossPoint(const cM3dGSph*, const cM3dGTri*, Vec*); bool cM3d_Cross_SphTri(const cM3dGSph*, const cM3dGTri*, Vec*); +inline bool cM3d_Cross_SphTri(const cM3dGSph* param_0, const cM3dGTri* param_1) { + return cM3d_Cross_SphTri(param_0, param_1, NULL); +} bool cM3d_Cross_CylCyl(const cM3dGCyl*, const cM3dGCyl*, f32*); bool cM3d_Cross_CylCyl(const cM3dGCyl*, const cM3dGCyl*, Vec*); bool cM3d_Cross_CylTri(const cM3dGCyl*, const cM3dGTri*, Vec*); diff --git a/include/SSystem/SComponent/c_m3d_g_aab.h b/include/SSystem/SComponent/c_m3d_g_aab.h index a1fed6648fb..2e60d72ce6c 100644 --- a/include/SSystem/SComponent/c_m3d_g_aab.h +++ b/include/SSystem/SComponent/c_m3d_g_aab.h @@ -2,6 +2,8 @@ #define C_M3D_G_AAB_H #include "SSystem/SComponent/c_xyz.h" +#include "SSystem/SComponent/c_m3d_g_lin.h" +#include "SSystem/SComponent/c_m3d.h" #include "global.h" // Axis aligned bounding box @@ -32,6 +34,18 @@ public: const f32 GetMinX(void) const { return mMin.x; } const f32 GetMinY(void) const { return mMin.y; } const f32 GetMinZ(void) const { return mMin.z; } + bool Cross(const cM3dGLin *param_1) { + return cM3d_Cross_MinMaxBoxLine(GetMinP(), GetMaxP(), (Vec*)¶m_1->GetStartP(), (Vec*)¶m_1->GetEndP()); + } + bool Cross(const cM3dGAab *param_1) { + return cM3d_Cross_AabAab(this, param_1); + } + bool Cross(const cM3dGCyl *param_1) { + return cM3d_Cross_AabCyl(this, param_1); + } + bool Cross(const cM3dGSph *param_1) { + return cM3d_Cross_AabSph(this, param_1); + } }; // Size = 0x1C STATIC_ASSERT(0x1C == sizeof(cM3dGAab)); diff --git a/include/SSystem/SComponent/c_m3d_g_pla.h b/include/SSystem/SComponent/c_m3d_g_pla.h index 122ce22ec61..125f06ee7c9 100644 --- a/include/SSystem/SComponent/c_m3d_g_pla.h +++ b/include/SSystem/SComponent/c_m3d_g_pla.h @@ -30,6 +30,9 @@ public: void SetupFrom3Vtx(const Vec* v1, const Vec* v2, const Vec* v3) { cM3d_CalcPla(v1, v2, v3, &mNormal, &mD); } + f32 getCrossY_NonIsZero(const cXyz *param_1) { + return ((-mNormal.x * param_1->x - mNormal.z * param_1->z) - mD) / mNormal.y; + } }; #endif \ No newline at end of file diff --git a/include/SSystem/SComponent/c_m3d_g_sph.h b/include/SSystem/SComponent/c_m3d_g_sph.h index 1527d67b0cd..217dcefc04a 100644 --- a/include/SSystem/SComponent/c_m3d_g_sph.h +++ b/include/SSystem/SComponent/c_m3d_g_sph.h @@ -27,6 +27,9 @@ public: void SetR(f32); bool cross(const cM3dGSph*, cXyz*) const; bool cross(const cM3dGCyl*, cXyz*) const; + inline bool cross(const cM3dGTri *param_1) const { + return cM3d_Cross_SphTri(this, param_1); + } void GetMinMaxCube(cXyz&, cXyz&) const; const cXyz& GetC(void) const { return mCenter; } const cXyz* GetCP() const { return &mCenter; } diff --git a/include/d/bg/d_bg_s_acch.h b/include/d/bg/d_bg_s_acch.h index 9c77533a090..0f64ca1c612 100644 --- a/include/d/bg/d_bg_s_acch.h +++ b/include/d/bg/d_bg_s_acch.h @@ -159,6 +159,7 @@ public: bool ChkMoveBGOnly() const { return m_flags & MOVE_BG_ONLY; } void SetWallHit() { m_flags |= WALL_HIT; } void ClrWallNone() { m_flags &= ~WALL_NONE; } + cM3dGCyl* GetWallBmdCylP() { return &m_wall_cyl; } // inline dupe void i_ClrGroundHit() { m_flags &= ~GROUND_HIT; } diff --git a/include/d/bg/d_bg_s_cap_poly.h b/include/d/bg/d_bg_s_cap_poly.h new file mode 100644 index 00000000000..2789e5cf2b3 --- /dev/null +++ b/include/d/bg/d_bg_s_cap_poly.h @@ -0,0 +1,20 @@ +#ifndef D_BG_D_BG_S_CAPT_POLY_H +#define D_BG_D_BG_S_CAPT_POLY_H + +#include "SSystem/SComponent/c_bg_s_chk.h" +#include "SSystem/SComponent/c_m3d_g_aab.h" +#include "d/bg/d_bg_s_chk.h" + +struct dBgS_CaptPoly; + +typedef void (*CaptPolyCallback)(dBgS_CaptPoly&, cBgD_Vtx_t*, u16, u16, u16, cM3dGPla*); + +struct dBgS_CaptPoly : public cBgS_Chk, public dBgS_Chk { +public: + cM3dGAab* GetBndP() { return &m_pos;} + + /* 0x2C */ cM3dGAab m_pos; + /* 0x48 */ CaptPolyCallback m_callback; +}; + +#endif \ No newline at end of file diff --git a/include/d/bg/d_bg_s_grp_pass_chk.h b/include/d/bg/d_bg_s_grp_pass_chk.h index eeefdc23bb8..058419e02f3 100644 --- a/include/d/bg/d_bg_s_grp_pass_chk.h +++ b/include/d/bg/d_bg_s_grp_pass_chk.h @@ -21,7 +21,8 @@ public: void OffNormalGrp() { mGrp &= ~NORMAL_GRP; } void OffFullGrp() { mGrp &= ~FULL_GRP; } void OnAll() { mGrp |= FULL_GRP; } - + u32 MaskNormalGrp() const {return mGrp & 1; } + u32 MaskWaterGrp() const {return mGrp & 2; } private: /* 0x4 */ u32 mGrp; }; diff --git a/include/d/bg/d_bg_s_roof_chk.h b/include/d/bg/d_bg_s_roof_chk.h index bb7597395bb..9e79a549943 100644 --- a/include/d/bg/d_bg_s_roof_chk.h +++ b/include/d/bg/d_bg_s_roof_chk.h @@ -17,6 +17,7 @@ public: void SetNowY(f32 y) { mNowY = y; } void i_SetPos(cXyz const& pos) { m_pos = pos; } f32 GetNowY() { return mNowY; } + cXyz* GetPosP() { return &m_pos; } private: /* 0x3C */ cXyz m_pos; diff --git a/include/d/bg/d_bg_s_spl_grp_chk.h b/include/d/bg/d_bg_s_spl_grp_chk.h index c7f8f6c1d46..84e87cc8846 100644 --- a/include/d/bg/d_bg_s_spl_grp_chk.h +++ b/include/d/bg/d_bg_s_spl_grp_chk.h @@ -29,6 +29,7 @@ public: void SetHeight(f32 height) { m_height = height; } f32 GetHeight() { return m_height; } cXyz& GetPosP() { return m_ground; } + f32 GetRoof() const { return m_roof; } private: /* 0x3C */ cXyz m_ground; diff --git a/include/d/bg/d_bg_w.h b/include/d/bg/d_bg_w.h index af260cace96..11551e1dd8d 100644 --- a/include/d/bg/d_bg_w.h +++ b/include/d/bg/d_bg_w.h @@ -9,8 +9,8 @@ class cBgS_GrpPassChk; class cBgS_PolyPassChk; class fopAc_ac_c; - -struct dBgS_CaptPoly {}; +struct cBgD_Vtx_t; +struct dBgS_CaptPoly; class cBgW_TriElm { public: @@ -74,8 +74,7 @@ struct dzb_b_data { struct dzb_tree_data { /* 0x0 */ u16 field_0x0; /* 0x2 */ u16 field_0x2; - /* 0x4 */ u16 m_id[1]; - /* 0x6 */ u8 field_0x6[0x14 - 0x6]; + /* 0x4 */ u16 m_id[8]; }; // Size: 0x14 struct dzb_g_data { @@ -123,10 +122,10 @@ public: /* 8007A200 */ bool RwgLineCheck(u16, cBgS_LinChk*); /* 8007A3A0 */ bool LineCheckRp(cBgS_LinChk*, int); /* 8007A52C */ bool LineCheckGrpRp(cBgS_LinChk*, int, int); - /* 8007A680 */ void RwgGroundCheckCommon(f32, u16, cBgS_GndChk*); - /* 8007A774 */ void RwgGroundCheckGnd(u16, cBgS_GndChk*); - /* 8007A824 */ void RwgGroundCheckWall(u16, cBgS_GndChk*); - /* 8007A8F4 */ void GroundCrossRp(cBgS_GndChk*, int); + /* 8007A680 */ bool RwgGroundCheckCommon(f32, u16, cBgS_GndChk*); + /* 8007A774 */ bool RwgGroundCheckGnd(u16, cBgS_GndChk*); + /* 8007A824 */ bool RwgGroundCheckWall(u16, cBgS_GndChk*); + /* 8007A8F4 */ bool GroundCrossRp(cBgS_GndChk*, int); /* 8007AA50 */ bool GroundCrossGrpRp(cBgS_GndChk*, int, int); /* 8007ABC4 */ void CopyOldMtx(); /* 8007AC10 */ void Move(); @@ -223,7 +222,7 @@ public: /* 0x92 */ u16 field_0x92; /* 0x94 */ cBgW_TriElm* pm_tri; /* 0x98 */ cBgW_RwgElm* pm_rwg; - /* 0x9C */ Vec* pm_vtx_tbl; + /* 0x9C */ cBgD_Vtx_t* pm_vtx_tbl; /* 0xA0 */ cBgD_t* pm_bgd; /* 0xA4 */ cBgW_unk_b_data* field_0xa4; /* 0xA8 */ cBgW_GrpElm* pm_grp; @@ -232,7 +231,7 @@ public: class dBgW; typedef void (*dBgW_RideCallback)(dBgW*, fopAc_ac_c*, fopAc_ac_c*); -typedef void (*dBgW_ArrowStickCallback)(fopAc_ac_c*, fopAc_ac_c*, cXyz&); +typedef void (*dBgW_ArrowStickCallback)(dBgW*, fopAc_ac_c*, fopAc_ac_c*, cXyz&); typedef void (*dBgW_CrrFunc)(dBgW*, void*, cBgS_PolyInfo const&, bool, cXyz*, csXyz*, csXyz*); class dBgW : public cBgW { @@ -240,23 +239,23 @@ public: /* 8007B970 */ dBgW(); /* 8007B9C0 */ void Move(); /* 8007B9EC */ void positionWallCorrect(dBgS_Acch*, f32, cM3dGPla&, cXyz* pupper_pos, f32); - /* 8007BA40 */ void RwgWallCorrect(dBgS_Acch*, u16); - /* 8007C234 */ void WallCorrectRp(dBgS_Acch*, int); + /* 8007BA40 */ bool RwgWallCorrect(dBgS_Acch*, u16); + /* 8007C234 */ bool WallCorrectRp(dBgS_Acch*, int); /* 8007C360 */ bool WallCorrectGrpRp(dBgS_Acch*, int, int); /* 8007C4AC */ void RwgWallCorrectSort(dBgS_Acch*, u16); /* 8007C714 */ void WallCorrectRpSort(dBgS_Acch*, int); - /* 8007C808 */ void WallCorrectGrpRpSort(dBgS_Acch*, int, int); - /* 8007D0DC */ void RwgRoofChk(u16, dBgS_RoofChk*); - /* 8007D208 */ void RoofChkRp(dBgS_RoofChk*, int); + /* 8007C808 */ bool WallCorrectGrpRpSort(dBgS_Acch*, int, int); + /* 8007D0DC */ bool RwgRoofChk(u16, dBgS_RoofChk*); + /* 8007D208 */ bool RoofChkRp(dBgS_RoofChk*, int); /* 8007D330 */ bool RoofChkGrpRp(dBgS_RoofChk*, int, int); - /* 8007D498 */ void RwgSplGrpChk(u16, dBgS_SplGrpChk*); - /* 8007D5C4 */ void SplGrpChkRp(dBgS_SplGrpChk*, int); + /* 8007D498 */ bool RwgSplGrpChk(u16, dBgS_SplGrpChk*); + /* 8007D5C4 */ bool SplGrpChkRp(dBgS_SplGrpChk*, int); /* 8007D6F0 */ bool SplGrpChkGrpRp(dBgS_SplGrpChk*, int, int); /* 8007D858 */ void RwgCaptPoly(int, dBgS_CaptPoly&); /* 8007D8E8 */ void CaptPolyRp(dBgS_CaptPoly&, int); /* 8007DA04 */ void CaptPolyGrpRp(dBgS_CaptPoly&, int, int); - /* 8007DB20 */ void RwgSphChk(u16, dBgS_SphChk*, void*); - /* 8007DC70 */ void SphChkRp(dBgS_SphChk*, void*, int); + /* 8007DB20 */ bool RwgSphChk(u16, dBgS_SphChk*, void*); + /* 8007DC70 */ bool SphChkRp(dBgS_SphChk*, void*, int); /* 8007DDE0 */ bool SphChkGrpRp(dBgS_SphChk*, void*, int, int); /* 8007E548 */ virtual ~dBgW(); diff --git a/src/d/bg/d_bg_w.cpp b/src/d/bg/d_bg_w.cpp index 9aade51c532..53721ecaa45 100644 --- a/src/d/bg/d_bg_w.cpp +++ b/src/d/bg/d_bg_w.cpp @@ -5,6 +5,9 @@ #include "d/bg/d_bg_w.h" #include "SSystem/SComponent/c_math.h" +#include "SSystem/SComponent/c_bg_s_shdw_draw.h" +#include "d/bg/d_bg_s_sph_chk.h" +#include "d/bg/d_bg_s_cap_poly.h" #include "d/com/d_com_inf_game.h" #include "dol2asm.h" #include "global.h" @@ -934,13 +937,11 @@ extern "C" asm void __dt__8cM3dGTriFv() { /* 8007A3A0-8007A52C 074CE0 018C+00 1/1 0/0 0/0 .text LineCheckRp__4cBgWFP11cBgS_LinChki */ -#ifdef NONMATCHING bool cBgW::LineCheckRp(cBgS_LinChk* linchk, int param_1) { cBgW_NodeTree* pnode0 = &pm_node_tree[param_1]; - cM3dGLin* lin = linchk->GetLinP(); - if (!cM3d_Cross_MinMaxBoxLine(&pnode0->getMinP(), &pnode0->getMaxP(), &lin->GetStartP(), - &lin->GetEndP())) { + if (!cM3d_Cross_MinMaxBoxLine((Vec*)pnode0->GetMinP(), (Vec*)pnode0->GetMaxP(), &linchk->GetLinP()->GetStartP(), + &linchk->GetLinP()->GetEndP())) { return false; } @@ -973,37 +974,42 @@ bool cBgW::LineCheckRp(cBgS_LinChk* linchk, int param_1) { } for (int i = 0; i < 8; i++) { - // this is probably wrong, fix later - u16* tmp_p = (u16*)pnode; - u16 tmp = tmp_p[i + 2]; - - if (tmp != 0xFFFF && LineCheckRp(linchk, tmp)) { + if (pnode->m_id[i] != 0xFFFF && LineCheckRp(linchk, pnode->m_id[i])) { chk = true; } } return chk; } -#else -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm bool cBgW::LineCheckRp(cBgS_LinChk* param_0, int param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/LineCheckRp__4cBgWFP11cBgS_LinChki.s" -} -#pragma pop -#endif /* 8007A52C-8007A658 074E6C 012C+00 1/1 0/0 0/0 .text LineCheckGrpRp__4cBgWFP11cBgS_LinChkii */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm bool cBgW::LineCheckGrpRp(cBgS_LinChk* param_0, int param_1, int param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/LineCheckGrpRp__4cBgWFP11cBgS_LinChkii.s" +bool cBgW::LineCheckGrpRp(cBgS_LinChk* param_0, int param_1, int param_2) { + cM3dGLin* pcVar2 = param_0->GetLinP(); + if (!pm_grp[param_1].m_aab.Cross(pcVar2)) { + return false; + } + if (ChkGrpThrough(param_1, param_0->GetGrpPassChk(), param_2)) { + return false; + } + bool uVar4 = false; + + if (pm_bgd->m_g_tbl[param_1].field_0x2e != 0xffff && + LineCheckRp(param_0, pm_bgd->m_g_tbl[param_1].field_0x2e)) { + uVar4 = true; + } + + s32 uVar1 = pm_bgd->m_g_tbl[param_1].field_0x28; + while (true) { + if (uVar1 == 0xffff) { + break; + } + if (LineCheckGrpRp(param_0, uVar1, param_2 + 1)) { + uVar4 = true; + } + uVar1 = pm_bgd->m_g_tbl[uVar1].field_0x26; + } + return uVar4; } -#pragma pop /* 8007A658-8007A680 074F98 0028+00 2/0 1/0 0/0 .text LineCheck__4cBgWFP11cBgS_LinChk */ bool cBgW::LineCheck(cBgS_LinChk* pchk) { @@ -1012,59 +1018,123 @@ bool cBgW::LineCheck(cBgS_LinChk* pchk) { /* 8007A680-8007A774 074FC0 00F4+00 2/2 0/0 0/0 .text * RwgGroundCheckCommon__4cBgWFfUsP11cBgS_GndChk */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void cBgW::RwgGroundCheckCommon(f32 param_0, u16 param_1, cBgS_GndChk* param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/RwgGroundCheckCommon__4cBgWFfUsP11cBgS_GndChk.s" +bool cBgW::RwgGroundCheckCommon(f32 param_0, u16 param_1, cBgS_GndChk* param_2) { + if (param_0 < param_2->GetPointP().y && param_0 > param_2->GetNowY()) { + dzb_tri_data* puVar7 = &pm_bgd->m_t_tbl[param_1]; + if (cM3d_CrossY_Tri_Front(pm_vtx_tbl[puVar7->field_0x0], + pm_vtx_tbl[puVar7->field_0x2], + pm_vtx_tbl[puVar7->field_0x4], + (const Vec*)¶m_2->GetPointP())) { + if (!ChkPolyThrough(param_1, param_2->GetPolyPassChk())) { + param_2->SetNowY(param_0); + param_2->SetPolyIndex(param_1); + return true; + } + } + } + return false; } -#pragma pop /* 8007A774-8007A824 0750B4 00B0+00 1/1 0/0 0/0 .text RwgGroundCheckGnd__4cBgWFUsP11cBgS_GndChk */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void cBgW::RwgGroundCheckGnd(u16 param_0, cBgS_GndChk* param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/RwgGroundCheckGnd__4cBgWFUsP11cBgS_GndChk.s" +bool cBgW::RwgGroundCheckGnd(u16 param_0, cBgS_GndChk* param_1) { + bool rv = false; + while (true) { + cBgW_RwgElm* puVar4 = &pm_rwg[param_0]; + f32 dVar5 = pm_tri[param_0].m_plane.getCrossY_NonIsZero(¶m_1->GetPointP()); + if (RwgGroundCheckCommon(dVar5, (u32)param_0, param_1)) { + rv = true; + } + if (puVar4->field_0x0 == 0xffff) + break; + param_0 = puVar4->field_0x0; + } + return rv; } -#pragma pop - -/* ############################################################################################## */ -/* 8045270C-80452710 000D0C 0004+00 1/1 0/0 0/0 .sdata2 @4271 */ -SECTION_SDATA2 static f32 lit_4271 = 0.014000000432133675f; /* 8007A824-8007A8F4 075164 00D0+00 1/1 0/0 0/0 .text RwgGroundCheckWall__4cBgWFUsP11cBgS_GndChk */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void cBgW::RwgGroundCheckWall(u16 param_0, cBgS_GndChk* param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/RwgGroundCheckWall__4cBgWFUsP11cBgS_GndChk.s" +bool cBgW::RwgGroundCheckWall(u16 param_0, cBgS_GndChk* param_1) { + bool rv = false; + while (true) { + cBgW_TriElm* puVar5 = &pm_tri[param_0]; + cBgW_RwgElm* puVar4 = &pm_rwg[param_0]; + if (puVar5->m_plane.mNormal.y >= 0.014f) { + f32 dVar5 = puVar5->m_plane.getCrossY_NonIsZero(¶m_1->GetPointP()); + if (RwgGroundCheckCommon(dVar5, (u32)param_0, param_1)) { + rv = true; + } + } + if (puVar4->field_0x0 == 0xffff) + break; + param_0 = puVar4->field_0x0; + } + return rv; } -#pragma pop /* 8007A8F4-8007AA50 075234 015C+00 1/1 0/0 0/0 .text GroundCrossRp__4cBgWFP11cBgS_GndChki */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void cBgW::GroundCrossRp(cBgS_GndChk* param_0, int param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/GroundCrossRp__4cBgWFP11cBgS_GndChki.s" +bool cBgW::GroundCrossRp(cBgS_GndChk* param_0, int param_1) { + bool rv = false; + dzb_tree_data* puVar9 = &pm_bgd->m_tree_tbl[param_1]; + if ((puVar9->field_0x0 & 1)) { + if (field_0xa4[puVar9->m_id[0]].field_0x4 != 0xffff && + RwgGroundCheckGnd(field_0xa4[puVar9->m_id[0]].field_0x4, param_0)) + { + rv = true; + } + if (param_0->GetWallPrecheck() && field_0xa4[puVar9->m_id[0]].field_0x2 != 0xffff && + RwgGroundCheckWall(field_0xa4[puVar9->m_id[0]].field_0x2, param_0)) + { + rv = true; + } + return rv; + } + + for (int i = 0; i < 8; i++) { + if (puVar9->m_id[i] != 0xffff) { + cM3dGAab* this_00 = &pm_node_tree[puVar9->m_id[i]]; + if (this_00->CrossY(¶m_0->GetPointP())) { + if (this_00->UnderPlaneYUnder(param_0->GetPointP().y)) { + if (!this_00->TopPlaneYUnder(param_0->GetNowY()) && + GroundCrossRp(param_0, puVar9->m_id[i])) { + rv = true; + } + } + } + } + } + + return rv; } -#pragma pop /* 8007AA50-8007AB9C 075390 014C+00 1/1 0/0 0/0 .text GroundCrossGrpRp__4cBgWFP11cBgS_GndChkii */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm bool cBgW::GroundCrossGrpRp(cBgS_GndChk* param_0, int param_1, int param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/GroundCrossGrpRp__4cBgWFP11cBgS_GndChkii.s" +bool cBgW::GroundCrossGrpRp(cBgS_GndChk* param_0, int param_1, int param_2) { + cBgW_GrpElm* iVar7 = &pm_grp[param_1]; + if (!iVar7->m_aab.CrossY(¶m_0->GetPointP()) || + !iVar7->m_aab.UnderPlaneYUnder(param_0->GetPointP().y) || + iVar7->m_aab.TopPlaneYUnder(param_0->GetNowY())) { + return false; + } + if (ChkGrpThrough(param_1, param_0->GetGrpPassChk(), param_2)) { + return false; + } + bool uVar6 = false; + + if (pm_bgd->m_g_tbl[param_1].field_0x2e != 0xffff && + GroundCrossRp(param_0, pm_bgd->m_g_tbl[param_1].field_0x2e)) { + uVar6 = true; + } + s32 uVar8 = pm_bgd->m_g_tbl[param_1].field_0x28; + while (true) { + if (uVar8 == 0xffff) { + break; + } + if (GroundCrossGrpRp(param_0, uVar8, param_2 + 1)) { + uVar6 = true; + } + uVar8 = pm_bgd->m_g_tbl[uVar8].field_0x26; + } + return uVar6; } -#pragma pop /* 8007AB9C-8007ABC4 0754DC 0028+00 2/0 1/0 0/0 .text GroundCross__4cBgWFP11cBgS_GndChk */ @@ -1119,35 +1189,65 @@ void cBgW::Move() { } /* 8007ADF0-8007AEA4 075730 00B4+00 1/1 0/0 0/0 .text RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void cBgW::RwgShdwDraw(int param_0, cBgS_ShdwDraw* param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/RwgShdwDraw__4cBgWFiP13cBgS_ShdwDraw.s" +void cBgW::RwgShdwDraw(int param_0, cBgS_ShdwDraw* param_1) { + while (true) { + cBgW_RwgElm* puVar4 = &pm_rwg[param_0]; + if (!ChkShdwDrawThrough(param_0, param_1->GetPolyPassChk())) { + (param_1->mCallbackFun)( + param_1, pm_vtx_tbl, + pm_bgd->m_t_tbl[param_0].field_0x0, + pm_bgd->m_t_tbl[param_0].field_0x2, + pm_bgd->m_t_tbl[param_0].field_0x4, + &pm_tri[param_0].m_plane); + } + if (puVar4->field_0x0 == 0xffff) + break; + param_0 = puVar4->field_0x0; + } } -#pragma pop /* 8007AEA4-8007AFC0 0757E4 011C+00 1/1 0/0 0/0 .text ShdwDrawRp__4cBgWFP13cBgS_ShdwDrawi */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void cBgW::ShdwDrawRp(cBgS_ShdwDraw* param_0, int param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/ShdwDrawRp__4cBgWFP13cBgS_ShdwDrawi.s" +void cBgW::ShdwDrawRp(cBgS_ShdwDraw *param_1,int param_2) { + if (pm_node_tree[param_2].Cross(param_1->GetBndP())) { + dzb_tree_data* puVar3 = &pm_bgd->m_tree_tbl[param_2]; + if ((puVar3->field_0x0 & 1)) { + if (field_0xa4[puVar3->m_id[0]].field_0x2 != 0xffff) { + RwgShdwDraw(field_0xa4[puVar3->m_id[0]].field_0x2, param_1); + } + if (field_0xa4[puVar3->m_id[0]].field_0x0 != 0xffff) { + RwgShdwDraw(field_0xa4[puVar3->m_id[0]].field_0x0, param_1); + } + if (field_0xa4[puVar3->m_id[0]].field_0x4 != 0xffff) { + RwgShdwDraw(field_0xa4[puVar3->m_id[0]].field_0x4, param_1); + } + } else { + for (int iVar2 = 0; iVar2 < 8; iVar2++) { + if (puVar3->m_id[iVar2] != 0xffff) { + ShdwDrawRp(param_1, puVar3->m_id[iVar2]); + } + } + } + } } -#pragma pop /* 8007AFC0-8007B084 075900 00C4+00 1/1 0/0 0/0 .text ShdwDrawGrpRp__4cBgWFP13cBgS_ShdwDrawi */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void cBgW::ShdwDrawGrpRp(cBgS_ShdwDraw* param_0, int param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/ShdwDrawGrpRp__4cBgWFP13cBgS_ShdwDrawi.s" +void cBgW::ShdwDrawGrpRp(cBgS_ShdwDraw* param_0, int param_1) { + if (pm_grp[param_1].m_aab.Cross(param_0->GetBndP())) { + + if (pm_bgd->m_g_tbl[param_1].field_0x2e != 0xffff) { + ShdwDrawRp(param_0, pm_bgd->m_g_tbl[param_1].field_0x2e); + } + s32 uVar1 = pm_bgd->m_g_tbl[param_1].field_0x28; + while (true) { + if (uVar1 == 0xffff) { + break; + } + ShdwDrawGrpRp(param_0, uVar1); + uVar1 = pm_bgd->m_g_tbl[uVar1].field_0x26; + } + } } -#pragma pop /* 8007B084-8007B0A8 0759C4 0024+00 2/0 1/0 0/0 .text ShdwDraw__4cBgWFP13cBgS_ShdwDraw */ void cBgW::ShdwDraw(cBgS_ShdwDraw* pshdw) { @@ -1172,36 +1272,22 @@ bool cBgW::ChkGrpThrough(int param_0, cBgS_GrpPassChk* param_1, int param_2) { } /* 8007B0E4-8007B164 075A24 0080+00 2/0 1/0 0/0 .text GetGrpRoomIndex__4cBgWCFRC13cBgS_PolyInfo */ -// missing array access instruction generation -#ifdef NONMATCHING s32 cBgW::GetGrpRoomIndex(cBgS_PolyInfo const& poly) const { - u16 poly_index = poly.GetPolyIndex(); - int grp_index = GetTriGrp(poly_index); + int grp_index = GetTriGrp(poly.GetPolyIndex()); u16 tmp = pm_bgd->m_g_tbl[grp_index].field_0x24; - int room_index; if (tmp == 0xFFFF || pm_bgd->m_g_tbl[tmp].field_0x24 == 0xFFFF) { return 0xFF; } - room_index = pm_bgd->m_g_tbl[tmp].field_0x2a; + int room_index = pm_bgd->m_g_tbl[pm_bgd->m_g_tbl[tmp].field_0x24].field_0x2a; if (room_index >= 0xFF) { room_index = 0xFF; } return room_index; } -#else -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm s32 cBgW::GetGrpRoomIndex(cBgS_PolyInfo const& param_0) const { - nofralloc -#include "asm/d/bg/d_bg_w/GetGrpRoomIndex__4cBgWCFRC13cBgS_PolyInfo.s" -} -#pragma pop -#endif /* 8007B164-8007B17C 075AA4 0018+00 2/0 1/0 0/0 .text GetBnd__4cBgWCFv */ cM3dGAab* cBgW::GetBnd() const { @@ -1503,7 +1589,7 @@ SECTION_SDATA2 static f32 lit_4962[1 + 1 /* padding */] = { #pragma push #pragma optimization_level 0 #pragma optimizewithasm off -asm void dBgW::RwgWallCorrect(dBgS_Acch* param_0, u16 param_1) { +asm bool dBgW::RwgWallCorrect(dBgS_Acch* param_0, u16 param_1) { nofralloc #include "asm/d/bg/d_bg_w/RwgWallCorrect__4dBgWFP9dBgS_AcchUs.s" } @@ -1511,24 +1597,64 @@ asm void dBgW::RwgWallCorrect(dBgS_Acch* param_0, u16 param_1) { /* 8007C234-8007C360 076B74 012C+00 1/1 0/0 0/0 .text WallCorrectRp__4dBgWFP9dBgS_Acchi */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::WallCorrectRp(dBgS_Acch* param_0, int param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/WallCorrectRp__4dBgWFP9dBgS_Acchi.s" +bool dBgW::WallCorrectRp(dBgS_Acch* param_0, int param_1) { + if (!pm_node_tree[param_1].Cross(param_0->GetWallBmdCylP())) { + return false; + } + + dzb_tree_data* puVar9 = &pm_bgd->m_tree_tbl[param_1]; + bool uVar6 = false; + if ((puVar9->field_0x0 & 1)) { + if (field_0xa4[puVar9->m_id[0]].field_0x2 != 0xffff && + RwgWallCorrect(param_0, field_0xa4[puVar9->m_id[0]].field_0x2)) { + uVar6 = true; + } + if (field_0xa4[puVar9->m_id[0]].field_0x0 != 0xffff && + RwgWallCorrect(param_0, field_0xa4[puVar9->m_id[0]].field_0x0)) { + uVar6 = true; + } + return uVar6; + } + for (int i = 0; i < 8; i++) { + if (puVar9->m_id[i] != 0xffff && + WallCorrectRp(param_0, puVar9->m_id[i])) + { + uVar6 = true; + } + } + + return uVar6; } -#pragma pop /* 8007C360-8007C484 076CA0 0124+00 1/1 0/0 0/0 .text WallCorrectGrpRp__4dBgWFP9dBgS_Acchii */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm bool dBgW::WallCorrectGrpRp(dBgS_Acch* param_0, int param_1, int param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/WallCorrectGrpRp__4dBgWFP9dBgS_Acchii.s" +bool dBgW::WallCorrectGrpRp(dBgS_Acch* param_0, int param_1, int param_2) { + if (!pm_grp[param_1].m_aab.Cross(param_0->GetWallBmdCylP())) { + return false; + } + + if (ChkGrpThrough(param_1, param_0->GetGrpPassChk(), param_2)) { + return false; + } + + bool uVar6 = false; + if (pm_bgd->m_g_tbl[param_1].field_0x2e != 0xffff && + WallCorrectRp(param_0, pm_bgd->m_g_tbl[param_1].field_0x2e)) { + uVar6 = true; + } + + s32 uVar1 = pm_bgd->m_g_tbl[param_1].field_0x28; + while (true) { + if (uVar1 == 0xffff) { + break; + } + if (WallCorrectGrpRp(param_0, uVar1, param_2 + 1)) { + uVar6 = true; + } + uVar1 = pm_bgd->m_g_tbl[uVar1].field_0x26; + } + + return uVar6; } -#pragma pop /* 8007C484-8007C4AC 076DC4 0028+00 1/0 1/0 0/0 .text WallCorrect__4dBgWFP9dBgS_Acch */ bool dBgW::WallCorrect(dBgS_Acch* pacch) { @@ -1562,24 +1688,53 @@ asm void dBgW::RwgWallCorrectSort(dBgS_Acch* param_0, u16 param_1) { #pragma pop /* 8007C714-8007C808 077054 00F4+00 1/1 0/0 0/0 .text WallCorrectRpSort__4dBgWFP9dBgS_Acchi */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::WallCorrectRpSort(dBgS_Acch* param_0, int param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/WallCorrectRpSort__4dBgWFP9dBgS_Acchi.s" +void dBgW::WallCorrectRpSort(dBgS_Acch* param_0, int param_1) { + if (!pm_node_tree[param_1].Cross(param_0->GetWallBmdCylP())) { + return; + } + + dzb_tree_data* puVar9 = &pm_bgd->m_tree_tbl[param_1]; + if ((puVar9->field_0x0 & 1)) { + if (field_0xa4[puVar9->m_id[0]].field_0x2 != 0xffff) { + RwgWallCorrectSort(param_0, field_0xa4[puVar9->m_id[0]].field_0x2); + } + if (field_0xa4[puVar9->m_id[0]].field_0x0 != 0xffff) { + RwgWallCorrectSort(param_0, field_0xa4[puVar9->m_id[0]].field_0x0); + } + return; + } + for (int i = 0; i < 8; i++) { + if (puVar9->m_id[i] != 0xffff) { + WallCorrectRpSort(param_0, puVar9->m_id[i]); + } + } } -#pragma pop /* 8007C808-8007C910 077148 0108+00 1/1 0/0 0/0 .text WallCorrectGrpRpSort__4dBgWFP9dBgS_Acchii */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::WallCorrectGrpRpSort(dBgS_Acch* param_0, int param_1, int param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/WallCorrectGrpRpSort__4dBgWFP9dBgS_Acchii.s" +bool dBgW::WallCorrectGrpRpSort(dBgS_Acch* param_0, int param_1, int param_2) { + if (!pm_grp[param_1].m_aab.Cross(param_0->GetWallBmdCylP())) { + return false; + } + + if (ChkGrpThrough(param_1, param_0->GetGrpPassChk(), param_2)) { + return false; + } + + if (pm_bgd->m_g_tbl[param_1].field_0x2e != 0xffff) { + WallCorrectRpSort(param_0, pm_bgd->m_g_tbl[param_1].field_0x2e); + } + + s32 uVar1 = pm_bgd->m_g_tbl[param_1].field_0x28; + while (true) { + if (uVar1 == 0xffff) { + break; + } + WallCorrectGrpRpSort(param_0, uVar1, param_2 + 1); + uVar1 = pm_bgd->m_g_tbl[uVar1].field_0x26; + } + + return false; } -#pragma pop /* 8007C910-8007D0DC 077250 07CC+00 1/0 1/0 0/0 .text WallCorrectSort__4dBgWFP9dBgS_Acch */ @@ -1594,35 +1749,93 @@ asm void dBgW::WallCorrectSort(dBgS_Acch* param_0) { /* 8007D0DC-8007D208 077A1C 012C+00 1/1 0/0 0/0 .text RwgRoofChk__4dBgWFUsP12dBgS_RoofChk */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::RwgRoofChk(u16 param_0, dBgS_RoofChk* param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/RwgRoofChk__4dBgWFUsP12dBgS_RoofChk.s" +bool dBgW::RwgRoofChk(u16 param_0, dBgS_RoofChk* param_1) { + bool rv = false; + f32 crossY; + while (true) { + if (pm_tri[param_0].m_plane.getCrossY(*param_1->GetPosP(), &crossY) && + crossY > param_1->GetPosP()->y && + crossY < param_1->GetNowY()) { + dzb_tri_data* tri_data = &pm_bgd->m_t_tbl[param_0]; + if (cM3d_CrossY_Tri(pm_vtx_tbl[tri_data->field_0x0], + pm_vtx_tbl[tri_data->field_0x2], + pm_vtx_tbl[tri_data->field_0x4], + pm_tri[param_0].m_plane, + (const Vec*)param_1->GetPosP())) { + if (!ChkPolyThrough(param_0, param_1->GetPolyPassChk())) { + param_1->SetNowY(crossY); + param_1->SetPolyIndex(param_0); + rv = true; + } + } + } + if (pm_rwg[param_0].field_0x0 == 0xffff) + break; + param_0 = pm_rwg[param_0].field_0x0; + } + return rv; } -#pragma pop /* 8007D208-8007D330 077B48 0128+00 1/1 0/0 0/0 .text RoofChkRp__4dBgWFP12dBgS_RoofChki */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::RoofChkRp(dBgS_RoofChk* param_0, int param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/RoofChkRp__4dBgWFP12dBgS_RoofChki.s" +bool dBgW::RoofChkRp(dBgS_RoofChk* param_0, int param_1) { + cBgW_NodeTree* tree = &pm_node_tree[param_1]; + if (!tree->CrossY(param_0->GetPosP()) || + !tree->UnderPlaneYUnder(param_0->GetNowY()) || + tree->TopPlaneYUnder(param_0->GetPosP()->y)) { + return false; + } + + dzb_tree_data* puVar9 = &pm_bgd->m_tree_tbl[param_1]; + if ((puVar9->field_0x0 & 1)) { + if (field_0xa4[puVar9->m_id[0]].field_0x0 != 0xffff && + RwgRoofChk(field_0xa4[puVar9->m_id[0]].field_0x0, param_0)) { + return true; + } + return false; + } + bool rv = false; + for (int i = 0; i < 8; i++) { + if (puVar9->m_id[i] != 0xffff && RoofChkRp(param_0, puVar9->m_id[i])) { + rv = true; + } + } + return rv; } -#pragma pop /* 8007D330-8007D470 077C70 0140+00 1/1 0/0 0/0 .text RoofChkGrpRp__4dBgWFP12dBgS_RoofChkii */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm bool dBgW::RoofChkGrpRp(dBgS_RoofChk* param_0, int param_1, int param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/RoofChkGrpRp__4dBgWFP12dBgS_RoofChkii.s" +bool dBgW::RoofChkGrpRp(dBgS_RoofChk* param_0, int param_1, int param_2) { + cBgW_GrpElm* grp = &pm_grp[param_1]; + if (!grp->m_aab.CrossY(param_0->GetPosP()) || + !grp->m_aab.UnderPlaneYUnder(param_0->GetNowY()) || + grp->m_aab.TopPlaneYUnder(param_0->GetPosP()->y)) { + return false; + } + + if (ChkGrpThrough(param_1, param_0->GetGrpPassChk(), param_2)) { + return false; + } + + bool uVar6 = false; + dzb_g_data* data = &pm_bgd->m_g_tbl[param_1]; + if (data->field_0x2e != 0xffff && + RoofChkRp(param_0, data->field_0x2e)) { + uVar6 = true; + } + + s32 uVar1 = data->field_0x28; + while (true) { + if (uVar1 == 0xffff) { + break; + } + if (RoofChkGrpRp(param_0, uVar1, param_2 + 1)) { + uVar6 = true; + } + uVar1 = pm_bgd->m_g_tbl[uVar1].field_0x26; + } + + return uVar6; } -#pragma pop /* 8007D470-8007D498 077DB0 0028+00 1/0 1/0 0/0 .text RoofChk__4dBgWFP12dBgS_RoofChk */ bool dBgW::RoofChk(dBgS_RoofChk* pchk) { @@ -1630,34 +1843,92 @@ bool dBgW::RoofChk(dBgS_RoofChk* pchk) { } /* 8007D498-8007D5C4 077DD8 012C+00 1/1 0/0 0/0 .text RwgSplGrpChk__4dBgWFUsP14dBgS_SplGrpChk */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::RwgSplGrpChk(u16 param_0, dBgS_SplGrpChk* param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/RwgSplGrpChk__4dBgWFUsP14dBgS_SplGrpChk.s" +bool dBgW::RwgSplGrpChk(u16 param_0, dBgS_SplGrpChk* param_1) { + bool rv = false; + f32 crossY; + while (true) { + if (pm_tri[param_0].m_plane.getCrossY(param_1->GetPosP(), &crossY) && + crossY < param_1->GetRoof() && + crossY > param_1->GetHeight()) { + dzb_tri_data* tri_data = &pm_bgd->m_t_tbl[param_0]; + if (cM3d_CrossY_Tri(pm_vtx_tbl[tri_data->field_0x0], + pm_vtx_tbl[tri_data->field_0x2], + pm_vtx_tbl[tri_data->field_0x4], + pm_tri[param_0].m_plane, + (const Vec*)¶m_1->GetPosP())) { + if (!ChkPolyThrough(param_0, param_1->GetPolyPassChk())) { + param_1->SetHeight(crossY); + param_1->SetPolyIndex(param_0); + rv = true; + } + } + } + if (pm_rwg[param_0].field_0x0 == 0xffff) + break; + param_0 = pm_rwg[param_0].field_0x0; + } + return rv; } -#pragma pop /* 8007D5C4-8007D6F0 077F04 012C+00 1/1 0/0 0/0 .text SplGrpChkRp__4dBgWFP14dBgS_SplGrpChki */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::SplGrpChkRp(dBgS_SplGrpChk* param_0, int param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/SplGrpChkRp__4dBgWFP14dBgS_SplGrpChki.s" +bool dBgW::SplGrpChkRp(dBgS_SplGrpChk* param_0, int param_1) { + cBgW_NodeTree* tree = &pm_node_tree[param_1]; + if (!tree->CrossY(¶m_0->GetPosP()) || + !tree->UnderPlaneYUnder(param_0->GetRoof()) || + tree->TopPlaneYUnder(param_0->GetHeight())) { + return false; + } + + dzb_tree_data* puVar9 = &pm_bgd->m_tree_tbl[param_1]; + if ((puVar9->field_0x0 & 1)) { + if (field_0xa4[puVar9->m_id[0]].field_0x4 != 0xffff && + RwgSplGrpChk(field_0xa4[puVar9->m_id[0]].field_0x4, param_0)) { + return true; + } + return false; + } + bool rv = false; + for (int i = 0; i < 8; i++) { + if (puVar9->m_id[i] != 0xffff && SplGrpChkRp(param_0, puVar9->m_id[i])) { + rv = true; + } + } + return rv; } -#pragma pop /* 8007D6F0-8007D830 078030 0140+00 1/1 0/0 0/0 .text SplGrpChkGrpRp__4dBgWFP14dBgS_SplGrpChkii */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm bool dBgW::SplGrpChkGrpRp(dBgS_SplGrpChk* param_0, int param_1, int param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/SplGrpChkGrpRp__4dBgWFP14dBgS_SplGrpChkii.s" +bool dBgW::SplGrpChkGrpRp(dBgS_SplGrpChk* param_0, int param_1, int param_2) { + cBgW_GrpElm* grp = &pm_grp[param_1]; + if (!grp->m_aab.CrossY(¶m_0->GetPosP()) || + !grp->m_aab.UnderPlaneYUnder(param_0->GetRoof()) || + grp->m_aab.TopPlaneYUnder(param_0->GetHeight())) { + return false; + } + + if (ChkGrpThrough(param_1, param_0->GetGrpPassChk(), param_2)) { + return false; + } + + bool uVar6 = false; + dzb_g_data* data = &pm_bgd->m_g_tbl[param_1]; + if (data->field_0x2e != 0xffff && + SplGrpChkRp(param_0, data->field_0x2e)) { + uVar6 = true; + } + + s32 uVar1 = data->field_0x28; + while (true) { + if (uVar1 == 0xffff) { + break; + } + if (SplGrpChkGrpRp(param_0, uVar1, param_2 + 1)) { + uVar6 = true; + } + uVar1 = pm_bgd->m_g_tbl[uVar1].field_0x26; + } + + return uVar6; } -#pragma pop /* 8007D830-8007D858 078170 0028+00 1/0 1/0 0/0 .text SplGrpChk__4dBgWFP14dBgS_SplGrpChk */ @@ -1666,35 +1937,76 @@ bool dBgW::SplGrpChk(dBgS_SplGrpChk* pchk) { } /* 8007D858-8007D8E8 078198 0090+00 1/1 0/0 0/0 .text RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::RwgCaptPoly(int param_0, dBgS_CaptPoly& param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/RwgCaptPoly__4dBgWFiR13dBgS_CaptPoly.s" +void dBgW::RwgCaptPoly(int param_0, dBgS_CaptPoly& param_1) { + while (true) { + cBgW_RwgElm* puVar2 = &pm_rwg[param_0]; + param_1.m_callback( + param_1, pm_vtx_tbl, + pm_bgd->m_t_tbl[param_0].field_0x0, + pm_bgd->m_t_tbl[param_0].field_0x2, + pm_bgd->m_t_tbl[param_0].field_0x4, + &pm_tri[param_0].m_plane); + if (puVar2->field_0x0 == 0xffff) + break; + param_0 = puVar2->field_0x0; + } } -#pragma pop /* 8007D8E8-8007DA04 078228 011C+00 1/1 0/0 0/0 .text CaptPolyRp__4dBgWFR13dBgS_CaptPolyi */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::CaptPolyRp(dBgS_CaptPoly& param_0, int param_1) { - nofralloc -#include "asm/d/bg/d_bg_w/CaptPolyRp__4dBgWFR13dBgS_CaptPolyi.s" +void dBgW::CaptPolyRp(dBgS_CaptPoly& param_0, int param_1) { + if (!pm_node_tree[param_1].Cross(param_0.GetBndP())) { + return; + } + + dzb_tree_data* tree_data = &pm_bgd->m_tree_tbl[param_1]; + if (tree_data->field_0x0 & 1) { + if (field_0xa4[tree_data->m_id[0]].field_0x2 != 0xffff) { + RwgCaptPoly(field_0xa4[tree_data->m_id[0]].field_0x2, param_0); + } + if (field_0xa4[tree_data->m_id[0]].field_0x0 != 0xffff) { + RwgCaptPoly(field_0xa4[tree_data->m_id[0]].field_0x0, param_0); + } + if (field_0xa4[tree_data->m_id[0]].field_0x4 != 0xffff) { + RwgCaptPoly(field_0xa4[tree_data->m_id[0]].field_0x4, param_0); + } + return; + } + + for (int i = 0; i < 8; i++) { + if (tree_data->m_id[i] == 0xffff) { + continue; + } + CaptPolyRp(param_0, tree_data->m_id[i]); + } } -#pragma pop /* 8007DA04-8007DAF8 078344 00F4+00 1/1 0/0 0/0 .text CaptPolyGrpRp__4dBgWFR13dBgS_CaptPolyii */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::CaptPolyGrpRp(dBgS_CaptPoly& param_0, int param_1, int param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/CaptPolyGrpRp__4dBgWFR13dBgS_CaptPolyii.s" +void dBgW::CaptPolyGrpRp(dBgS_CaptPoly& param_0, int param_1, int param_2) { + cBgW_GrpElm* grp = &pm_grp[param_1]; + if (!grp->m_aab.Cross(param_0.GetBndP())) { + return; + } + + if (ChkGrpThrough(param_1, param_0.GetGrpPassChk(), param_2)) { + return; + } + + dzb_g_data* data = &pm_bgd->m_g_tbl[param_1]; + if (pm_bgd->m_g_tbl[param_1].field_0x2e != 0xffff) { + CaptPolyRp(param_0, pm_bgd->m_g_tbl[param_1].field_0x2e); + } + + s32 uVar1 = pm_bgd->m_g_tbl[param_1].field_0x28; + while (true) { + if (uVar1 == 0xffff) { + break; + } + CaptPolyGrpRp(param_0, uVar1, param_2 + 1); + uVar1 = pm_bgd->m_g_tbl[uVar1].field_0x26; + } } -#pragma pop + /* 8007DAF8-8007DB20 078438 0028+00 1/0 1/0 0/0 .text CaptPoly__4dBgWFR13dBgS_CaptPoly */ void dBgW::CaptPoly(dBgS_CaptPoly& poly) { @@ -1703,35 +2015,112 @@ void dBgW::CaptPoly(dBgS_CaptPoly& poly) { /* 8007DB20-8007DC70 078460 0150+00 1/1 0/0 0/0 .text RwgSphChk__4dBgWFUsP11dBgS_SphChkPv */ +// vtable order +#ifdef NONMATCHING +bool dBgW::RwgSphChk(u16 param_0, dBgS_SphChk* param_1, void* param_2) { + cM3dGTri acStack_50; + cBgW_RwgElm* puVar4; + dzb_tri_data* puVar5; + bool uVar3 = false; + while (true) { + puVar4 = &pm_rwg[param_0]; + if (!ChkPolyThrough(param_0, param_1->GetPolyPassChk())) { + puVar5 = &pm_bgd->m_t_tbl[param_0]; + acStack_50.setBg(&pm_vtx_tbl[puVar5->field_0x0], + &pm_vtx_tbl[puVar5->field_0x2], + &pm_vtx_tbl[puVar5->field_0x4], + &pm_tri[param_0].m_plane); + if (param_1->cross(&acStack_50)) { + param_1->mCallback(param_1, pm_vtx_tbl, puVar5->field_0x0, + puVar5->field_0x2, puVar5->field_0x4, + &pm_tri[param_0].m_plane, param_2); + param_1->SetPolyIndex(param_0); + uVar3 = true; + } + } + if (puVar4->field_0x0 == 0xffff) + break; + param_0 = puVar4->field_0x0; + } + return uVar3; +} +#else #pragma push #pragma optimization_level 0 #pragma optimizewithasm off -asm void dBgW::RwgSphChk(u16 param_0, dBgS_SphChk* param_1, void* param_2) { +asm bool dBgW::RwgSphChk(u16 param_0, dBgS_SphChk* param_1, void* param_2) { nofralloc #include "asm/d/bg/d_bg_w/RwgSphChk__4dBgWFUsP11dBgS_SphChkPv.s" } #pragma pop +#endif /* 8007DC70-8007DDE0 0785B0 0170+00 1/1 0/0 0/0 .text SphChkRp__4dBgWFP11dBgS_SphChkPvi */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::SphChkRp(dBgS_SphChk* param_0, void* param_1, int param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/SphChkRp__4dBgWFP11dBgS_SphChkPvi.s" +bool dBgW::SphChkRp(dBgS_SphChk* param_0, void* param_1, int param_2) { + if (!pm_node_tree[param_2].Cross(param_0)) { + return false; + } + + dzb_tree_data* tree_data = &pm_bgd->m_tree_tbl[param_2]; + bool rv = false; + if (tree_data->field_0x0 & 1) { + if (field_0xa4[tree_data->m_id[0]].field_0x4 != 0xffff && + RwgSphChk(field_0xa4[tree_data->m_id[0]].field_0x4, param_0, param_1)) { + rv = true; + } + if (field_0xa4[tree_data->m_id[0]].field_0x0 != 0xffff && + RwgSphChk(field_0xa4[tree_data->m_id[0]].field_0x0, param_0, param_1)) { + rv = true; + } + if (field_0xa4[tree_data->m_id[0]].field_0x2 != 0xffff && + RwgSphChk(field_0xa4[tree_data->m_id[0]].field_0x2, param_0, param_1)) { + rv = true; + } + return rv; + } + + for (int i = 0; i < 8; i++) { + if (tree_data->m_id[i] == 0xffff) { + continue; + } + if (SphChkRp(param_0, param_1, tree_data->m_id[i])) { + rv = true; + } + } + return rv; } -#pragma pop /* 8007DDE0-8007DF00 078720 0120+00 1/1 0/0 0/0 .text SphChkGrpRp__4dBgWFP11dBgS_SphChkPvii */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm bool dBgW::SphChkGrpRp(dBgS_SphChk* param_0, void* param_1, int param_2, int param_3) { - nofralloc -#include "asm/d/bg/d_bg_w/SphChkGrpRp__4dBgWFP11dBgS_SphChkPvii.s" +bool dBgW::SphChkGrpRp(dBgS_SphChk* param_0, void* param_1, int param_2, int param_3) { + if (!pm_grp[param_2].m_aab.Cross(param_0)) { + return false; + } + + if (ChkGrpThrough(param_2, param_0->GetGrpPassChk(), param_3)) { + return false; + } + + bool uVar6 = false; + dzb_g_data* data = &pm_bgd->m_g_tbl[param_2]; + if (data->field_0x2e != 0xffff && + SphChkRp(param_0, param_1, data->field_0x2e)) { + uVar6 = true; + } + + s32 uVar1 = data->field_0x28; + while (true) { + if (uVar1 == 0xffff) { + break; + } + if (SphChkGrpRp(param_0, param_1, uVar1, param_3 + 1)) { + uVar6 = true; + } + uVar1 = pm_bgd->m_g_tbl[uVar1].field_0x26; + } + + return uVar6; } -#pragma pop /* 8007DF00-8007DF28 078840 0028+00 1/0 1/0 0/0 .text SphChk__4dBgWFP11dBgS_SphChkPv */ bool dBgW::SphChk(dBgS_SphChk* pchk, void* param_1) { @@ -1751,39 +2140,28 @@ u8 dBgW::GetGrpSoundId(cBgS_PolyInfo const& poly) { /* 8007DF88-8007DFC4 0788C8 003C+00 1/0 0/0 0/0 .text * CrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::CrrPos(cBgS_PolyInfo const& param_0, void* param_1, bool param_2, cXyz* param_3, - csXyz* param_4, csXyz* param_5) { - nofralloc -#include "asm/d/bg/d_bg_w/CrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s" +void dBgW::CrrPos(cBgS_PolyInfo const& param_0, void* param_1, bool param_2, cXyz* param_3, + csXyz* param_4, csXyz* param_5) { + if (m_crr_func) { + m_crr_func(this, param_1, param_0, param_2, param_3, param_4, param_5); + } } -#pragma pop /* 8007DFC4-8007E000 078904 003C+00 1/0 0/0 0/0 .text * TransPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::TransPos(cBgS_PolyInfo const& param_0, void* param_1, bool param_2, cXyz* param_3, +void dBgW::TransPos(cBgS_PolyInfo const& param_0, void* param_1, bool param_2, cXyz* param_3, csXyz* param_4, csXyz* param_5) { - nofralloc -#include "asm/d/bg/d_bg_w/TransPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s" + if (m_crr_func) { + m_crr_func(this, param_1, param_0, param_2, param_3, param_4, param_5); + } } -#pragma pop /* 8007E000-8007E02C 078940 002C+00 1/0 0/0 0/0 .text * MatrixCrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::MatrixCrrPos(cBgS_PolyInfo const& param_0, void* param_1, bool param_2, +void dBgW::MatrixCrrPos(cBgS_PolyInfo const& param_0, void* param_1, bool param_2, cXyz* param_3, csXyz* param_4, csXyz* param_5) { - nofralloc -#include "asm/d/bg/d_bg_w/MatrixCrrPos__4dBgWFRC13cBgS_PolyInfoPvbP4cXyzP5csXyzP5csXyz.s" + CrrPos(param_0, param_1, param_2, param_3, param_4, param_5); } -#pragma pop /* 8007E02C-8007E360 07896C 0334+00 1/0 1/0 0/0 .text ChkPolyThrough__4dBgWFiP16cBgS_PolyPassChk */ @@ -1878,14 +2256,20 @@ bool dBgW::ChkShdwDrawThrough(int poly_index, cBgS_PolyPassChk*) { } /* 8007E3D8-8007E444 078D18 006C+00 1/0 1/0 0/0 .text ChkGrpThrough__4dBgWFiP15cBgS_GrpPassChki */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm bool dBgW::ChkGrpThrough(int param_0, cBgS_GrpPassChk* param_1, int param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/ChkGrpThrough__4dBgWFiP15cBgS_GrpPassChki.s" +bool dBgW::ChkGrpThrough(int param_0, cBgS_GrpPassChk* param_1, int param_2) { + if (param_2 != 2 || param_1 == NULL) { + return false; + } + if ((pm_bgd->m_g_tbl[param_0].m_info & 0x100) == 0 && ((dBgS_GrpPassChk*)param_1)->MaskNormalGrp()) { + return false; + } + + if ((pm_bgd->m_g_tbl[param_0].m_info & 0x100) && ((dBgS_GrpPassChk*)param_1)->MaskWaterGrp()) { + return false; + } + + return true; } -#pragma pop /* 8007E444-8007E474 078D84 0030+00 1/0 1/0 0/0 .text * CallRideCallBack__4dBgWFP10fopAc_ac_cP10fopAc_ac_c */ @@ -1897,14 +2281,11 @@ void dBgW::CallRideCallBack(fopAc_ac_c* param_0, fopAc_ac_c* param_1) { /* 8007E474-8007E4A4 078DB4 0030+00 1/0 1/0 0/0 .text * CallArrowStickCallBack__4dBgWFP10fopAc_ac_cP10fopAc_ac_cR4cXyz */ -#pragma push -#pragma optimization_level 0 -#pragma optimizewithasm off -asm void dBgW::CallArrowStickCallBack(fopAc_ac_c* param_0, fopAc_ac_c* param_1, cXyz& param_2) { - nofralloc -#include "asm/d/bg/d_bg_w/CallArrowStickCallBack__4dBgWFP10fopAc_ac_cP10fopAc_ac_cR4cXyz.s" +void dBgW::CallArrowStickCallBack(fopAc_ac_c* param_0, fopAc_ac_c* param_1, cXyz& param_2) { + if (m_arrow_stick_callback) { + m_arrow_stick_callback(this, param_0, param_1, param_2); + } } -#pragma pop /* 8007E4A4-8007E4B4 078DE4 0010+00 1/0 1/0 0/0 .text OffMoveFlag__4dBgWFv */ void dBgW::OffMoveFlag() { diff --git a/src/d/bg/d_bg_w_sv.cpp b/src/d/bg/d_bg_w_sv.cpp index 5d292313b02..584d8644ed0 100644 --- a/src/d/bg/d_bg_w_sv.cpp +++ b/src/d/bg/d_bg_w_sv.cpp @@ -4,6 +4,7 @@ // #include "d/bg/d_bg_w_sv.h" +#include "SSystem/SComponent/c_bg_s_chk.h" #include "dol2asm.h" //