mirror of https://github.com/zeldaret/tp.git
53 lines
2.2 KiB
ArmAsm
53 lines
2.2 KiB
ArmAsm
.include "macros.inc"
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.section .text, "ax" # 80280d28
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.global __dt__Q26JStage6TLightFv
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__dt__Q26JStage6TLightFv:
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/* 80280D28 0027DC68 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80280D2C 0027DC6C 7C 08 02 A6 */ mflr r0
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/* 80280D30 0027DC70 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80280D34 0027DC74 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 80280D38 0027DC78 93 C1 00 08 */ stw r30, 8(r1)
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/* 80280D3C 0027DC7C 7C 7E 1B 79 */ or. r30, r3, r3
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/* 80280D40 0027DC80 7C 9F 23 78 */ mr r31, r4
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/* 80280D44 0027DC84 41 82 00 28 */ beq lbl_80280D6C
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/* 80280D48 0027DC88 3C 80 80 3C */ lis r4, lbl_803C4778@ha
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/* 80280D4C 0027DC8C 38 04 47 78 */ addi r0, r4, lbl_803C4778@l
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/* 80280D50 0027DC90 90 1E 00 00 */ stw r0, 0(r30)
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/* 80280D54 0027DC94 38 80 00 00 */ li r4, 0
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/* 80280D58 0027DC98 48 00 00 7D */ bl __dt__Q26JStage7TObjectFv
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/* 80280D5C 0027DC9C 7F E0 07 35 */ extsh. r0, r31
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/* 80280D60 0027DCA0 40 81 00 0C */ ble lbl_80280D6C
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/* 80280D64 0027DCA4 7F C3 F3 78 */ mr r3, r30
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/* 80280D68 0027DCA8 48 04 DF D5 */ bl __dl__FPv
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lbl_80280D6C:
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/* 80280D6C 0027DCAC 7F C3 F3 78 */ mr r3, r30
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/* 80280D70 0027DCB0 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 80280D74 0027DCB4 83 C1 00 08 */ lwz r30, 8(r1)
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/* 80280D78 0027DCB8 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80280D7C 0027DCBC 7C 08 03 A6 */ mtlr r0
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/* 80280D80 0027DCC0 38 21 00 10 */ addi r1, r1, 0x10
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/* 80280D84 0027DCC4 4E 80 00 20 */ blr
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/* 80280D88 0027DCC8 38 60 00 05 */ li r3, 5
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/* 80280D8C 0027DCCC 4E 80 00 20 */ blr
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/* 80280D90 0027DCD0 38 60 00 01 */ li r3, 1
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/* 80280D94 0027DCD4 4E 80 00 20 */ blr
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/* 80280D98 0027DCD8 4E 80 00 20 */ blr
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/* 80280D9C 0027DCDC 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80280DA0 0027DCE0 80 62 B9 E8 */ lwz r3, lbl_804553E8-_SDA2_BASE_(r2)
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/* 80280DA4 0027DCE4 90 61 00 08 */ stw r3, 8(r1)
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/* 80280DA8 0027DCE8 38 21 00 10 */ addi r1, r1, 0x10
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/* 80280DAC 0027DCEC 4E 80 00 20 */ blr
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/* 80280DB0 0027DCF0 4E 80 00 20 */ blr
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/* 80280DB4 0027DCF4 4E 80 00 20 */ blr
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/* 80280DB8 0027DCF8 4E 80 00 20 */ blr
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/* 80280DBC 0027DCFC 4E 80 00 20 */ blr
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/* 80280DC0 0027DD00 4E 80 00 20 */ blr
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/* 80280DC4 0027DD04 4E 80 00 20 */ blr
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/* 80280DC8 0027DD08 4E 80 00 20 */ blr
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/* 80280DCC 0027DD0C 4E 80 00 20 */ blr
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/* 80280DD0 0027DD10 4E 80 00 20 */ blr
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