mirror of https://github.com/zeldaret/tp.git
131 lines
6.7 KiB
ArmAsm
131 lines
6.7 KiB
ArmAsm
/* 80015310 00012250 94 21 FF D0 */ stwu r1, -0x30(r1)
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/* 80015314 00012254 7C 08 02 A6 */ mflr r0
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/* 80015318 00012258 90 01 00 34 */ stw r0, 0x34(r1)
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/* 8001531C 0001225C 39 61 00 30 */ addi r11, r1, 0x30
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/* 80015320 00012260 48 34 CE BD */ bl _savegpr_29
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/* 80015324 00012264 7C 7D 1B 78 */ mr r29, r3
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/* 80015328 00012268 7C 9E 23 78 */ mr r30, r4
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/* 8001532C 0001226C 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
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/* 80015330 00012270 3B E3 61 C0 */ addi r31, r3, g_dComIfG_gameInfo@l
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/* 80015334 00012274 80 7F 61 B0 */ lwz r3, 0x61b0(r31)
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/* 80015338 00012278 28 03 00 00 */ cmplwi r3, 0
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/* 8001533C 0001227C 40 82 00 18 */ bne lbl_80015354
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/* 80015340 00012280 C0 02 81 84 */ lfs f0, lbl_80451B84-_SDA2_BASE_(r2)
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/* 80015344 00012284 D0 1E 00 00 */ stfs f0, 0(r30)
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/* 80015348 00012288 D0 1E 00 04 */ stfs f0, 4(r30)
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/* 8001534C 0001228C D0 1E 00 08 */ stfs f0, 8(r30)
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/* 80015350 00012290 48 00 01 84 */ b lbl_800154D4
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lbl_80015354:
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/* 80015354 00012294 38 63 01 A0 */ addi r3, r3, 0x1a0
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/* 80015358 00012298 7F A4 EB 78 */ mr r4, r29
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/* 8001535C 0001229C 38 A1 00 08 */ addi r5, r1, 8
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/* 80015360 000122A0 48 33 1A 0D */ bl PSMTXMultVec
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/* 80015364 000122A4 80 7F 61 B0 */ lwz r3, 0x61b0(r31)
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/* 80015368 000122A8 C0 83 01 DC */ lfs f4, 0x1dc(r3)
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/* 8001536C 000122AC C0 3D 00 08 */ lfs f1, 8(r29)
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/* 80015370 000122B0 C0 03 01 D8 */ lfs f0, 0x1d8(r3)
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/* 80015374 000122B4 EC 61 00 32 */ fmuls f3, f1, f0
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/* 80015378 000122B8 C0 3D 00 00 */ lfs f1, 0(r29)
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/* 8001537C 000122BC C0 03 01 D0 */ lfs f0, 0x1d0(r3)
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/* 80015380 000122C0 EC 41 00 32 */ fmuls f2, f1, f0
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/* 80015384 000122C4 C0 3D 00 04 */ lfs f1, 4(r29)
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/* 80015388 000122C8 C0 03 01 D4 */ lfs f0, 0x1d4(r3)
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/* 8001538C 000122CC EC 01 00 32 */ fmuls f0, f1, f0
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/* 80015390 000122D0 EC 02 00 2A */ fadds f0, f2, f0
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/* 80015394 000122D4 EC 03 00 2A */ fadds f0, f3, f0
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/* 80015398 000122D8 EC 44 00 2A */ fadds f2, f4, f0
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/* 8001539C 000122DC C0 21 00 10 */ lfs f1, 0x10(r1)
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/* 800153A0 000122E0 C0 02 81 84 */ lfs f0, lbl_80451B84-_SDA2_BASE_(r2)
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/* 800153A4 000122E4 FC 01 00 40 */ fcmpo cr0, f1, f0
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/* 800153A8 000122E8 4C 41 13 82 */ cror 2, 1, 2
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/* 800153AC 000122EC 40 82 00 08 */ bne lbl_800153B4
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/* 800153B0 000122F0 D0 01 00 10 */ stfs f0, 0x10(r1)
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lbl_800153B4:
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/* 800153B4 000122F4 C0 02 81 84 */ lfs f0, lbl_80451B84-_SDA2_BASE_(r2)
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/* 800153B8 000122F8 FC 02 00 40 */ fcmpo cr0, f2, f0
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/* 800153BC 000122FC 4C 40 13 82 */ cror 2, 0, 2
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/* 800153C0 00012300 40 82 00 3C */ bne lbl_800153FC
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/* 800153C4 00012304 FC 00 10 00 */ fcmpu cr0, f0, f2
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/* 800153C8 00012308 40 82 00 18 */ bne lbl_800153E0
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/* 800153CC 0001230C C0 22 81 88 */ lfs f1, lbl_80451B88-_SDA2_BASE_(r2)
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/* 800153D0 00012310 C0 01 00 10 */ lfs f0, 0x10(r1)
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/* 800153D4 00012314 EC 01 00 32 */ fmuls f0, f1, f0
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/* 800153D8 00012318 D0 1E 00 08 */ stfs f0, 8(r30)
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/* 800153DC 0001231C 48 00 00 18 */ b lbl_800153F4
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lbl_800153E0:
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/* 800153E0 00012320 C0 21 00 10 */ lfs f1, 0x10(r1)
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/* 800153E4 00012324 C0 02 81 8C */ lfs f0, lbl_80451B8C-_SDA2_BASE_(r2)
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/* 800153E8 00012328 EC 00 10 24 */ fdivs f0, f0, f2
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/* 800153EC 0001232C EC 01 00 32 */ fmuls f0, f1, f0
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/* 800153F0 00012330 D0 1E 00 08 */ stfs f0, 8(r30)
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lbl_800153F4:
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/* 800153F4 00012334 C0 62 81 88 */ lfs f3, lbl_80451B88-_SDA2_BASE_(r2)
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/* 800153F8 00012338 48 00 00 18 */ b lbl_80015410
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lbl_800153FC:
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/* 800153FC 0001233C C0 02 81 8C */ lfs f0, lbl_80451B8C-_SDA2_BASE_(r2)
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/* 80015400 00012340 EC 60 10 24 */ fdivs f3, f0, f2
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/* 80015404 00012344 C0 01 00 10 */ lfs f0, 0x10(r1)
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/* 80015408 00012348 EC 00 00 F2 */ fmuls f0, f0, f3
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/* 8001540C 0001234C D0 1E 00 08 */ stfs f0, 8(r30)
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lbl_80015410:
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/* 80015410 00012350 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha
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/* 80015414 00012354 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l
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/* 80015418 00012358 80 63 61 AC */ lwz r3, 0x61ac(r3)
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/* 8001541C 0001235C C0 02 81 84 */ lfs f0, lbl_80451B84-_SDA2_BASE_(r2)
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/* 80015420 00012360 C0 23 00 00 */ lfs f1, 0(r3)
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/* 80015424 00012364 FC 00 08 00 */ fcmpu cr0, f0, f1
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/* 80015428 00012368 41 82 00 2C */ beq lbl_80015454
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/* 8001542C 0001236C C0 42 81 8C */ lfs f2, lbl_80451B8C-_SDA2_BASE_(r2)
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/* 80015430 00012370 C0 02 81 90 */ lfs f0, lbl_80451B90-_SDA2_BASE_(r2)
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/* 80015434 00012374 EC 20 00 72 */ fmuls f1, f0, f1
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/* 80015438 00012378 C0 03 00 08 */ lfs f0, 8(r3)
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/* 8001543C 0001237C EC 01 00 2A */ fadds f0, f1, f0
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/* 80015440 00012380 EC 22 00 32 */ fmuls f1, f2, f0
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/* 80015444 00012384 C0 02 81 94 */ lfs f0, lbl_80451B94-_SDA2_BASE_(r2)
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/* 80015448 00012388 EC 81 00 28 */ fsubs f4, f1, f0
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/* 8001544C 0001238C C0 C2 81 98 */ lfs f6, lbl_80451B98-_SDA2_BASE_(r2)
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/* 80015450 00012390 48 00 00 0C */ b lbl_8001545C
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lbl_80015454:
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/* 80015454 00012394 FC 80 08 90 */ fmr f4, f1
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/* 80015458 00012398 C0 C3 00 08 */ lfs f6, 8(r3)
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lbl_8001545C:
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/* 8001545C 0001239C C0 02 81 84 */ lfs f0, lbl_80451B84-_SDA2_BASE_(r2)
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/* 80015460 000123A0 C0 23 00 04 */ lfs f1, 4(r3)
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/* 80015464 000123A4 FC 00 08 00 */ fcmpu cr0, f0, f1
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/* 80015468 000123A8 41 82 00 2C */ beq lbl_80015494
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/* 8001546C 000123AC C0 42 81 8C */ lfs f2, lbl_80451B8C-_SDA2_BASE_(r2)
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/* 80015470 000123B0 C0 02 81 90 */ lfs f0, lbl_80451B90-_SDA2_BASE_(r2)
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/* 80015474 000123B4 EC 20 00 72 */ fmuls f1, f0, f1
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/* 80015478 000123B8 C0 03 00 0C */ lfs f0, 0xc(r3)
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/* 8001547C 000123BC EC 01 00 2A */ fadds f0, f1, f0
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/* 80015480 000123C0 EC 22 00 32 */ fmuls f1, f2, f0
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/* 80015484 000123C4 C0 02 81 9C */ lfs f0, lbl_80451B9C-_SDA2_BASE_(r2)
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/* 80015488 000123C8 EC A1 00 28 */ fsubs f5, f1, f0
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/* 8001548C 000123CC C0 E2 81 A0 */ lfs f7, lbl_80451BA0-_SDA2_BASE_(r2)
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/* 80015490 000123D0 48 00 00 0C */ b lbl_8001549C
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lbl_80015494:
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/* 80015494 000123D4 FC A0 08 90 */ fmr f5, f1
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/* 80015498 000123D8 C0 E3 00 0C */ lfs f7, 0xc(r3)
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lbl_8001549C:
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/* 8001549C 000123DC C0 42 81 8C */ lfs f2, lbl_80451B8C-_SDA2_BASE_(r2)
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/* 800154A0 000123E0 C0 01 00 08 */ lfs f0, 8(r1)
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/* 800154A4 000123E4 EC 00 00 F2 */ fmuls f0, f0, f3
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/* 800154A8 000123E8 EC 02 00 2A */ fadds f0, f2, f0
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/* 800154AC 000123EC EC 06 00 32 */ fmuls f0, f6, f0
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/* 800154B0 000123F0 EC 04 00 2A */ fadds f0, f4, f0
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/* 800154B4 000123F4 D0 1E 00 00 */ stfs f0, 0(r30)
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/* 800154B8 000123F8 C0 21 00 0C */ lfs f1, 0xc(r1)
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/* 800154BC 000123FC FC 00 18 50 */ fneg f0, f3
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/* 800154C0 00012400 EC 01 00 32 */ fmuls f0, f1, f0
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/* 800154C4 00012404 EC 02 00 2A */ fadds f0, f2, f0
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/* 800154C8 00012408 EC 07 00 32 */ fmuls f0, f7, f0
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/* 800154CC 0001240C EC 05 00 2A */ fadds f0, f5, f0
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/* 800154D0 00012410 D0 1E 00 04 */ stfs f0, 4(r30)
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lbl_800154D4:
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/* 800154D4 00012414 39 61 00 30 */ addi r11, r1, 0x30
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/* 800154D8 00012418 48 34 CD 51 */ bl _restgpr_29
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/* 800154DC 0001241C 80 01 00 34 */ lwz r0, 0x34(r1)
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/* 800154E0 00012420 7C 08 03 A6 */ mtlr r0
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/* 800154E4 00012424 38 21 00 30 */ addi r1, r1, 0x30
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/* 800154E8 00012428 4E 80 00 20 */ blr
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