tp/include/JSystem/JKernel/JKRAram/asm/func_802D2248.s

42 lines
2.2 KiB
ArmAsm

/* checkOkAddress__7JKRAramFPUcUlP12JKRAramBlockUl __ct__7JKRAramFUlUll::checkOkAddress(unsigned char *, unsigned long, JKRAramBlock *, unsigned long) */
/* JKRAram_NS_checkOkAddress */
/* 802D2248 002CF188 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 802D224C 002CF18C 7C 08 02 A6 */ mflr r0
/* 802D2250 002CF190 90 01 00 14 */ stw r0, 0x14(r1)
/* 802D2254 002CF194 93 E1 00 0C */ stw r31, 0xc(r1)
/* 802D2258 002CF198 93 C1 00 08 */ stw r30, 8(r1)
/* 802D225C 002CF19C 7C BE 2B 78 */ mr r30, r5
/* 802D2260 002CF1A0 7C DF 33 78 */ mr r31, r6
/* 802D2264 002CF1A4 54 60 06 FF */ clrlwi. r0, r3, 0x1b
/* 802D2268 002CF1A8 41 82 00 28 */ beq lbl_802D2290
/* 802D226C 002CF1AC 54 80 06 FF */ clrlwi. r0, r4, 0x1b
/* 802D2270 002CF1B0 41 82 00 20 */ beq lbl_802D2290
/* 802D2274 002CF1B4 3C 60 80 3A */ lis r3, lbl_8039D078@ha
/* 802D2278 002CF1B8 38 63 D0 78 */ addi r3, r3, lbl_8039D078@l
/* 802D227C 002CF1BC 38 80 00 DB */ li r4, 0xdb
/* 802D2280 002CF1C0 38 A3 00 0C */ addi r5, r3, 0xc
/* 802D2284 002CF1C4 38 C3 00 0F */ addi r6, r3, 0xf
/* 802D2288 002CF1C8 4C C6 31 82 */ crclr 6
/* 802D228C 002CF1CC 48 00 FF 71 */ bl JUTException_NS_panic_f
lbl_802D2290:
/* 802D2290 002CF1D0 28 1E 00 00 */ cmplwi r30, 0
/* 802D2294 002CF1D4 41 82 00 30 */ beq lbl_802D22C4
/* 802D2298 002CF1D8 80 1E 00 14 */ lwz r0, 0x14(r30)
/* 802D229C 002CF1DC 7C 1F 02 14 */ add r0, r31, r0
/* 802D22A0 002CF1E0 54 00 06 FF */ clrlwi. r0, r0, 0x1b
/* 802D22A4 002CF1E4 41 82 00 20 */ beq lbl_802D22C4
/* 802D22A8 002CF1E8 3C 60 80 3A */ lis r3, lbl_8039D078@ha
/* 802D22AC 002CF1EC 38 63 D0 78 */ addi r3, r3, lbl_8039D078@l
/* 802D22B0 002CF1F0 38 80 00 E3 */ li r4, 0xe3
/* 802D22B4 002CF1F4 38 A3 00 0C */ addi r5, r3, 0xc
/* 802D22B8 002CF1F8 38 C3 00 0F */ addi r6, r3, 0xf
/* 802D22BC 002CF1FC 4C C6 31 82 */ crclr 6
/* 802D22C0 002CF200 48 00 FF 3D */ bl JUTException_NS_panic_f
lbl_802D22C4:
/* 802D22C4 002CF204 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 802D22C8 002CF208 83 C1 00 08 */ lwz r30, 8(r1)
/* 802D22CC 002CF20C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 802D22D0 002CF210 7C 08 03 A6 */ mtlr r0
/* 802D22D4 002CF214 38 21 00 10 */ addi r1, r1, 0x10
/* 802D22D8 002CF218 4E 80 00 20 */ blr