mirror of https://github.com/zeldaret/tp.git
110 lines
5.3 KiB
ArmAsm
110 lines
5.3 KiB
ArmAsm
/* 80035360 000322A0 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80035364 000322A4 7C 08 02 A6 */ mflr r0
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/* 80035368 000322A8 90 01 00 14 */ stw r0, 0x14(r1)
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/* 8003536C 000322AC 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 80035370 000322B0 93 C1 00 08 */ stw r30, 8(r1)
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/* 80035374 000322B4 7C 7E 1B 78 */ mr r30, r3
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/* 80035378 000322B8 7C 9F 23 78 */ mr r31, r4
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/* 8003537C 000322BC 2C 1F FF FF */ cmpwi r31, -1
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/* 80035380 000322C0 41 82 00 0C */ beq lbl_8003538C
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/* 80035384 000322C4 2C 1F 00 FF */ cmpwi r31, 0xff
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/* 80035388 000322C8 40 82 00 0C */ bne lbl_80035394
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lbl_8003538C:
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/* 8003538C 000322CC 38 60 00 00 */ li r3, 0
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/* 80035390 000322D0 48 00 00 84 */ b lbl_80035414
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lbl_80035394:
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/* 80035394 000322D4 2C 1F 00 80 */ cmpwi r31, 0x80
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/* 80035398 000322D8 40 80 00 10 */ bge lbl_800353A8
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/* 8003539C 000322DC 38 7E 09 58 */ addi r3, r30, 0x958
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/* 800353A0 000322E0 4B FF F4 C1 */ bl isSwitch__12dSv_memBit_cCFi
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/* 800353A4 000322E4 48 00 00 70 */ b lbl_80035414
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lbl_800353A8:
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/* 800353A8 000322E8 2C 1F 00 C0 */ cmpwi r31, 0xc0
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/* 800353AC 000322EC 40 80 00 14 */ bge lbl_800353C0
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/* 800353B0 000322F0 38 7E 09 78 */ addi r3, r30, 0x978
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/* 800353B4 000322F4 38 9F FF 80 */ addi r4, r31, -128
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/* 800353B8 000322F8 4B FF F8 31 */ bl isSwitch__12dSv_danBit_cCFi
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/* 800353BC 000322FC 48 00 00 58 */ b lbl_80035414
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lbl_800353C0:
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/* 800353C0 00032300 7C A3 2B 78 */ mr r3, r5
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/* 800353C4 00032304 4B FF 85 ED */ bl dStage_roomControl_c_NS_getZoneNo
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/* 800353C8 00032308 2C 03 00 00 */ cmpwi r3, 0
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/* 800353CC 0003230C 41 80 00 0C */ blt lbl_800353D8
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/* 800353D0 00032310 2C 03 00 20 */ cmpwi r3, 0x20
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/* 800353D4 00032314 41 80 00 0C */ blt lbl_800353E0
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lbl_800353D8:
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/* 800353D8 00032318 38 60 00 00 */ li r3, 0
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/* 800353DC 0003231C 48 00 00 38 */ b lbl_80035414
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lbl_800353E0:
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/* 800353E0 00032320 2C 1F 00 E0 */ cmpwi r31, 0xe0
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/* 800353E4 00032324 40 80 00 1C */ bge lbl_80035400
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/* 800353E8 00032328 54 63 28 34 */ slwi r3, r3, 5
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/* 800353EC 0003232C 38 63 09 B6 */ addi r3, r3, 0x9b6
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/* 800353F0 00032330 7C 7E 1A 14 */ add r3, r30, r3
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/* 800353F4 00032334 38 9F FF 40 */ addi r4, r31, -192
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/* 800353F8 00032338 4B FF F9 59 */ bl isSwitch__13dSv_zoneBit_cCFi
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/* 800353FC 0003233C 48 00 00 18 */ b lbl_80035414
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lbl_80035400:
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/* 80035400 00032340 54 63 28 34 */ slwi r3, r3, 5
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/* 80035404 00032344 38 63 09 B6 */ addi r3, r3, 0x9b6
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/* 80035408 00032348 7C 7E 1A 14 */ add r3, r30, r3
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/* 8003540C 0003234C 38 9F FF 20 */ addi r4, r31, -224
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/* 80035410 00032350 4B FF F9 D1 */ bl isOneSwitch__13dSv_zoneBit_cCFi
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lbl_80035414:
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/* 80035414 00032354 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 80035418 00032358 83 C1 00 08 */ lwz r30, 8(r1)
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/* 8003541C 0003235C 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80035420 00032360 7C 08 03 A6 */ mtlr r0
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/* 80035424 00032364 38 21 00 10 */ addi r1, r1, 0x10
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/* 80035428 00032368 4E 80 00 20 */ blr
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/* 8003542C 0003236C 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80035430 00032370 7C 08 02 A6 */ mflr r0
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/* 80035434 00032374 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80035438 00032378 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 8003543C 0003237C 93 C1 00 08 */ stw r30, 8(r1)
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/* 80035440 00032380 7C 7E 1B 78 */ mr r30, r3
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/* 80035444 00032384 7C 9F 23 78 */ mr r31, r4
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/* 80035448 00032388 2C 1F FF FF */ cmpwi r31, -1
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/* 8003544C 0003238C 41 82 00 0C */ beq lbl_80035458
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/* 80035450 00032390 2C 1F 00 FF */ cmpwi r31, 0xff
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/* 80035454 00032394 40 82 00 0C */ bne lbl_80035460
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lbl_80035458:
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/* 80035458 00032398 38 60 00 00 */ li r3, 0
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/* 8003545C 0003239C 48 00 00 6C */ b lbl_800354C8
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lbl_80035460:
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/* 80035460 000323A0 2C 1F 00 80 */ cmpwi r31, 0x80
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/* 80035464 000323A4 40 80 00 10 */ bge lbl_80035474
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/* 80035468 000323A8 38 7E 09 58 */ addi r3, r30, 0x958
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/* 8003546C 000323AC 4B FF F4 21 */ bl revSwitch__12dSv_memBit_cFi
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/* 80035470 000323B0 48 00 00 58 */ b lbl_800354C8
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lbl_80035474:
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/* 80035474 000323B4 2C 1F 00 C0 */ cmpwi r31, 0xc0
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/* 80035478 000323B8 40 80 00 14 */ bge lbl_8003548C
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/* 8003547C 000323BC 38 7E 09 78 */ addi r3, r30, 0x978
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/* 80035480 000323C0 38 9F FF 80 */ addi r4, r31, -128
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/* 80035484 000323C4 4B FF F7 91 */ bl revSwitch__12dSv_danBit_cFi
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/* 80035488 000323C8 48 00 00 40 */ b lbl_800354C8
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lbl_8003548C:
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/* 8003548C 000323CC 7C A3 2B 78 */ mr r3, r5
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/* 80035490 000323D0 4B FF 85 21 */ bl dStage_roomControl_c_NS_getZoneNo
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/* 80035494 000323D4 2C 1F 00 E0 */ cmpwi r31, 0xe0
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/* 80035498 000323D8 40 80 00 1C */ bge lbl_800354B4
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/* 8003549C 000323DC 54 63 28 34 */ slwi r3, r3, 5
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/* 800354A0 000323E0 38 63 09 B6 */ addi r3, r3, 0x9b6
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/* 800354A4 000323E4 7C 7E 1A 14 */ add r3, r30, r3
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/* 800354A8 000323E8 38 9F FF 40 */ addi r4, r31, -192
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/* 800354AC 000323EC 4B FF F8 CD */ bl revSwitch__13dSv_zoneBit_cFi
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/* 800354B0 000323F0 48 00 00 18 */ b lbl_800354C8
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lbl_800354B4:
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/* 800354B4 000323F4 54 63 28 34 */ slwi r3, r3, 5
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/* 800354B8 000323F8 38 63 09 B6 */ addi r3, r3, 0x9b6
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/* 800354BC 000323FC 7C 7E 1A 14 */ add r3, r30, r3
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/* 800354C0 00032400 38 9F FF 20 */ addi r4, r31, -224
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/* 800354C4 00032404 4B FF F9 39 */ bl revOneSwitch__13dSv_zoneBit_cFi
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lbl_800354C8:
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/* 800354C8 00032408 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 800354CC 0003240C 83 C1 00 08 */ lwz r30, 8(r1)
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/* 800354D0 00032410 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 800354D4 00032414 7C 08 03 A6 */ mtlr r0
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/* 800354D8 00032418 38 21 00 10 */ addi r1, r1, 0x10
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/* 800354DC 0003241C 4E 80 00 20 */ blr |