mirror of https://github.com/zeldaret/tp.git
851 lines
39 KiB
ArmAsm
851 lines
39 KiB
ArmAsm
.include "macros.inc"
|
|
|
|
.section .text, "ax" # 8033fe90
|
|
|
|
|
|
.global WriteSramCallback
|
|
WriteSramCallback:
|
|
/* 8033FE90 0033CDD0 7C 08 02 A6 */ mflr r0
|
|
/* 8033FE94 0033CDD4 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 8033FE98 0033CDD8 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 8033FE9C 0033CDDC 94 21 FF E8 */ stwu r1, -0x18(r1)
|
|
/* 8033FEA0 0033CDE0 93 E1 00 14 */ stw r31, 0x14(r1)
|
|
/* 8033FEA4 0033CDE4 3B E3 BB 20 */ addi r31, r3, lbl_8044BB20@l
|
|
/* 8033FEA8 0033CDE8 93 C1 00 10 */ stw r30, 0x10(r1)
|
|
/* 8033FEAC 0033CDEC 3B DF 00 40 */ addi r30, r31, 0x40
|
|
/* 8033FEB0 0033CDF0 80 9F 00 40 */ lwz r4, 0x40(r31)
|
|
/* 8033FEB4 0033CDF4 7C 7F 22 14 */ add r3, r31, r4
|
|
/* 8033FEB8 0033CDF8 20 A4 00 40 */ subfic r5, r4, 0x40
|
|
/* 8033FEBC 0033CDFC 48 00 00 35 */ bl WriteSram
|
|
/* 8033FEC0 0033CE00 90 7F 00 4C */ stw r3, 0x4c(r31)
|
|
/* 8033FEC4 0033CE04 80 1F 00 4C */ lwz r0, 0x4c(r31)
|
|
/* 8033FEC8 0033CE08 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 8033FECC 0033CE0C 41 82 00 0C */ beq lbl_8033FED8
|
|
/* 8033FED0 0033CE10 38 00 00 40 */ li r0, 0x40
|
|
/* 8033FED4 0033CE14 90 1E 00 00 */ stw r0, 0(r30)
|
|
lbl_8033FED8:
|
|
/* 8033FED8 0033CE18 80 01 00 1C */ lwz r0, 0x1c(r1)
|
|
/* 8033FEDC 0033CE1C 83 E1 00 14 */ lwz r31, 0x14(r1)
|
|
/* 8033FEE0 0033CE20 83 C1 00 10 */ lwz r30, 0x10(r1)
|
|
/* 8033FEE4 0033CE24 38 21 00 18 */ addi r1, r1, 0x18
|
|
/* 8033FEE8 0033CE28 7C 08 03 A6 */ mtlr r0
|
|
/* 8033FEEC 0033CE2C 4E 80 00 20 */ blr
|
|
|
|
.global WriteSram
|
|
WriteSram:
|
|
/* 8033FEF0 0033CE30 7C 08 02 A6 */ mflr r0
|
|
.global WriteSramCallback
|
|
/* 8033FEF4 0033CE34 3C C0 80 34 */ lis r6, WriteSramCallback@ha
|
|
/* 8033FEF8 0033CE38 90 01 00 04 */ stw r0, 4(r1)
|
|
.global WriteSramCallback
|
|
/* 8033FEFC 0033CE3C 38 06 FE 90 */ addi r0, r6, WriteSramCallback@l
|
|
/* 8033FF00 0033CE40 94 21 FF D8 */ stwu r1, -0x28(r1)
|
|
/* 8033FF04 0033CE44 93 E1 00 24 */ stw r31, 0x24(r1)
|
|
/* 8033FF08 0033CE48 3B E4 00 00 */ addi r31, r4, 0
|
|
/* 8033FF0C 0033CE4C 38 80 00 01 */ li r4, 1
|
|
/* 8033FF10 0033CE50 93 C1 00 20 */ stw r30, 0x20(r1)
|
|
/* 8033FF14 0033CE54 3B C5 00 00 */ addi r30, r5, 0
|
|
/* 8033FF18 0033CE58 7C 05 03 78 */ mr r5, r0
|
|
/* 8033FF1C 0033CE5C 93 A1 00 1C */ stw r29, 0x1c(r1)
|
|
/* 8033FF20 0033CE60 3B A3 00 00 */ addi r29, r3, 0
|
|
/* 8033FF24 0033CE64 38 60 00 00 */ li r3, 0
|
|
/* 8033FF28 0033CE68 48 00 41 01 */ bl EXILock
|
|
/* 8033FF2C 0033CE6C 2C 03 00 00 */ cmpwi r3, 0
|
|
/* 8033FF30 0033CE70 40 82 00 0C */ bne lbl_8033FF3C
|
|
/* 8033FF34 0033CE74 38 60 00 00 */ li r3, 0
|
|
/* 8033FF38 0033CE78 48 00 00 B4 */ b lbl_8033FFEC
|
|
lbl_8033FF3C:
|
|
/* 8033FF3C 0033CE7C 38 60 00 00 */ li r3, 0
|
|
/* 8033FF40 0033CE80 38 80 00 01 */ li r4, 1
|
|
/* 8033FF44 0033CE84 38 A0 00 03 */ li r5, 3
|
|
/* 8033FF48 0033CE88 48 00 39 21 */ bl EXISelect
|
|
/* 8033FF4C 0033CE8C 2C 03 00 00 */ cmpwi r3, 0
|
|
/* 8033FF50 0033CE90 40 82 00 14 */ bne lbl_8033FF64
|
|
/* 8033FF54 0033CE94 38 60 00 00 */ li r3, 0
|
|
/* 8033FF58 0033CE98 48 00 41 C5 */ bl EXIUnlock
|
|
/* 8033FF5C 0033CE9C 38 60 00 00 */ li r3, 0
|
|
/* 8033FF60 0033CEA0 48 00 00 8C */ b lbl_8033FFEC
|
|
lbl_8033FF64:
|
|
/* 8033FF64 0033CEA4 57 FF 30 32 */ slwi r31, r31, 6
|
|
/* 8033FF68 0033CEA8 38 1F 01 00 */ addi r0, r31, 0x100
|
|
/* 8033FF6C 0033CEAC 64 00 A0 00 */ oris r0, r0, 0xa000
|
|
/* 8033FF70 0033CEB0 90 01 00 14 */ stw r0, 0x14(r1)
|
|
/* 8033FF74 0033CEB4 38 81 00 14 */ addi r4, r1, 0x14
|
|
/* 8033FF78 0033CEB8 38 60 00 00 */ li r3, 0
|
|
/* 8033FF7C 0033CEBC 38 A0 00 04 */ li r5, 4
|
|
/* 8033FF80 0033CEC0 38 C0 00 01 */ li r6, 1
|
|
/* 8033FF84 0033CEC4 38 E0 00 00 */ li r7, 0
|
|
/* 8033FF88 0033CEC8 48 00 2D 79 */ bl EXIImm
|
|
/* 8033FF8C 0033CECC 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 8033FF90 0033CED0 54 1F D9 7E */ srwi r31, r0, 5
|
|
/* 8033FF94 0033CED4 38 60 00 00 */ li r3, 0
|
|
/* 8033FF98 0033CED8 48 00 31 51 */ bl EXISync
|
|
/* 8033FF9C 0033CEDC 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 8033FFA0 0033CEE0 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 8033FFA4 0033CEE4 38 9D 00 00 */ addi r4, r29, 0
|
|
/* 8033FFA8 0033CEE8 38 BE 00 00 */ addi r5, r30, 0
|
|
/* 8033FFAC 0033CEEC 7F FF 03 78 */ or r31, r31, r0
|
|
/* 8033FFB0 0033CEF0 38 60 00 00 */ li r3, 0
|
|
/* 8033FFB4 0033CEF4 38 C0 00 01 */ li r6, 1
|
|
/* 8033FFB8 0033CEF8 48 00 2F A5 */ bl EXIImmEx
|
|
/* 8033FFBC 0033CEFC 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 8033FFC0 0033CF00 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 8033FFC4 0033CF04 7F FF 03 78 */ or r31, r31, r0
|
|
/* 8033FFC8 0033CF08 38 60 00 00 */ li r3, 0
|
|
/* 8033FFCC 0033CF0C 48 00 39 C9 */ bl EXIDeselect
|
|
/* 8033FFD0 0033CF10 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 8033FFD4 0033CF14 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 8033FFD8 0033CF18 7F FF 03 78 */ or r31, r31, r0
|
|
/* 8033FFDC 0033CF1C 38 60 00 00 */ li r3, 0
|
|
/* 8033FFE0 0033CF20 48 00 41 3D */ bl EXIUnlock
|
|
/* 8033FFE4 0033CF24 7F E0 00 34 */ cntlzw r0, r31
|
|
/* 8033FFE8 0033CF28 54 03 D9 7E */ srwi r3, r0, 5
|
|
lbl_8033FFEC:
|
|
/* 8033FFEC 0033CF2C 80 01 00 2C */ lwz r0, 0x2c(r1)
|
|
/* 8033FFF0 0033CF30 83 E1 00 24 */ lwz r31, 0x24(r1)
|
|
/* 8033FFF4 0033CF34 83 C1 00 20 */ lwz r30, 0x20(r1)
|
|
/* 8033FFF8 0033CF38 83 A1 00 1C */ lwz r29, 0x1c(r1)
|
|
/* 8033FFFC 0033CF3C 38 21 00 28 */ addi r1, r1, 0x28
|
|
/* 80340000 0033CF40 7C 08 03 A6 */ mtlr r0
|
|
/* 80340004 0033CF44 4E 80 00 20 */ blr
|
|
|
|
.global __OSInitSram
|
|
__OSInitSram:
|
|
/* 80340008 0033CF48 7C 08 02 A6 */ mflr r0
|
|
/* 8034000C 0033CF4C 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 80340010 0033CF50 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 80340014 0033CF54 38 80 00 40 */ li r4, 0x40
|
|
/* 80340018 0033CF58 94 21 FF E8 */ stwu r1, -0x18(r1)
|
|
/* 8034001C 0033CF5C 93 E1 00 14 */ stw r31, 0x14(r1)
|
|
/* 80340020 0033CF60 3B E0 00 00 */ li r31, 0
|
|
/* 80340024 0033CF64 93 C1 00 10 */ stw r30, 0x10(r1)
|
|
/* 80340028 0033CF68 3B C3 BB 20 */ addi r30, r3, lbl_8044BB20@l
|
|
/* 8034002C 0033CF6C 38 7E 00 00 */ addi r3, r30, 0
|
|
/* 80340030 0033CF70 93 FE 00 44 */ stw r31, 0x44(r30)
|
|
/* 80340034 0033CF74 93 FE 00 48 */ stw r31, 0x48(r30)
|
|
/* 80340038 0033CF78 4B FF B5 49 */ bl DCInvalidateRange
|
|
/* 8034003C 0033CF7C 38 60 00 00 */ li r3, 0
|
|
/* 80340040 0033CF80 38 80 00 01 */ li r4, 1
|
|
/* 80340044 0033CF84 38 A0 00 00 */ li r5, 0
|
|
/* 80340048 0033CF88 48 00 3F E1 */ bl EXILock
|
|
/* 8034004C 0033CF8C 2C 03 00 00 */ cmpwi r3, 0
|
|
/* 80340050 0033CF90 40 82 00 08 */ bne lbl_80340058
|
|
/* 80340054 0033CF94 48 00 00 C4 */ b lbl_80340118
|
|
lbl_80340058:
|
|
/* 80340058 0033CF98 38 60 00 00 */ li r3, 0
|
|
/* 8034005C 0033CF9C 38 80 00 01 */ li r4, 1
|
|
/* 80340060 0033CFA0 38 A0 00 03 */ li r5, 3
|
|
/* 80340064 0033CFA4 48 00 38 05 */ bl EXISelect
|
|
/* 80340068 0033CFA8 2C 03 00 00 */ cmpwi r3, 0
|
|
/* 8034006C 0033CFAC 40 82 00 10 */ bne lbl_8034007C
|
|
/* 80340070 0033CFB0 38 60 00 00 */ li r3, 0
|
|
/* 80340074 0033CFB4 48 00 40 A9 */ bl EXIUnlock
|
|
/* 80340078 0033CFB8 48 00 00 A0 */ b lbl_80340118
|
|
lbl_8034007C:
|
|
/* 8034007C 0033CFBC 3C 60 20 00 */ lis r3, 0x20000100@ha
|
|
/* 80340080 0033CFC0 38 03 01 00 */ addi r0, r3, 0x20000100@l
|
|
/* 80340084 0033CFC4 90 01 00 08 */ stw r0, 8(r1)
|
|
/* 80340088 0033CFC8 38 81 00 08 */ addi r4, r1, 8
|
|
/* 8034008C 0033CFCC 38 60 00 00 */ li r3, 0
|
|
/* 80340090 0033CFD0 38 A0 00 04 */ li r5, 4
|
|
/* 80340094 0033CFD4 38 C0 00 01 */ li r6, 1
|
|
/* 80340098 0033CFD8 38 E0 00 00 */ li r7, 0
|
|
/* 8034009C 0033CFDC 48 00 2C 65 */ bl EXIImm
|
|
/* 803400A0 0033CFE0 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 803400A4 0033CFE4 54 1F D9 7E */ srwi r31, r0, 5
|
|
/* 803400A8 0033CFE8 38 60 00 00 */ li r3, 0
|
|
/* 803400AC 0033CFEC 48 00 30 3D */ bl EXISync
|
|
/* 803400B0 0033CFF0 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 803400B4 0033CFF4 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 803400B8 0033CFF8 38 9E 00 00 */ addi r4, r30, 0
|
|
/* 803400BC 0033CFFC 7F FF 03 78 */ or r31, r31, r0
|
|
/* 803400C0 0033D000 38 60 00 00 */ li r3, 0
|
|
/* 803400C4 0033D004 38 A0 00 40 */ li r5, 0x40
|
|
/* 803400C8 0033D008 38 C0 00 00 */ li r6, 0
|
|
/* 803400CC 0033D00C 38 E0 00 00 */ li r7, 0
|
|
/* 803400D0 0033D010 48 00 2F 2D */ bl EXIDma
|
|
/* 803400D4 0033D014 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 803400D8 0033D018 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 803400DC 0033D01C 7F FF 03 78 */ or r31, r31, r0
|
|
/* 803400E0 0033D020 38 60 00 00 */ li r3, 0
|
|
/* 803400E4 0033D024 48 00 30 05 */ bl EXISync
|
|
/* 803400E8 0033D028 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 803400EC 0033D02C 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 803400F0 0033D030 7F FF 03 78 */ or r31, r31, r0
|
|
/* 803400F4 0033D034 38 60 00 00 */ li r3, 0
|
|
/* 803400F8 0033D038 48 00 38 9D */ bl EXIDeselect
|
|
/* 803400FC 0033D03C 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 80340100 0033D040 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 80340104 0033D044 7F FF 03 78 */ or r31, r31, r0
|
|
/* 80340108 0033D048 38 60 00 00 */ li r3, 0
|
|
/* 8034010C 0033D04C 48 00 40 11 */ bl EXIUnlock
|
|
/* 80340110 0033D050 7F E0 00 34 */ cntlzw r0, r31
|
|
/* 80340114 0033D054 54 1F D9 7E */ srwi r31, r0, 5
|
|
lbl_80340118:
|
|
/* 80340118 0033D058 93 FE 00 4C */ stw r31, 0x4c(r30)
|
|
/* 8034011C 0033D05C 38 00 00 40 */ li r0, 0x40
|
|
/* 80340120 0033D060 90 1E 00 40 */ stw r0, 0x40(r30)
|
|
/* 80340124 0033D064 48 00 07 D5 */ bl OSGetGbsMode
|
|
/* 80340128 0033D068 48 00 08 41 */ bl OSSetGbsMode
|
|
/* 8034012C 0033D06C 80 01 00 1C */ lwz r0, 0x1c(r1)
|
|
/* 80340130 0033D070 83 E1 00 14 */ lwz r31, 0x14(r1)
|
|
/* 80340134 0033D074 83 C1 00 10 */ lwz r30, 0x10(r1)
|
|
/* 80340138 0033D078 38 21 00 18 */ addi r1, r1, 0x18
|
|
/* 8034013C 0033D07C 7C 08 03 A6 */ mtlr r0
|
|
/* 80340140 0033D080 4E 80 00 20 */ blr
|
|
|
|
.global __OSLockSram
|
|
__OSLockSram:
|
|
/* 80340144 0033D084 7C 08 02 A6 */ mflr r0
|
|
/* 80340148 0033D088 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 8034014C 0033D08C 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 80340150 0033D090 94 21 FF F0 */ stwu r1, -0x10(r1)
|
|
/* 80340154 0033D094 93 E1 00 0C */ stw r31, 0xc(r1)
|
|
/* 80340158 0033D098 3B E3 BB 20 */ addi r31, r3, lbl_8044BB20@l
|
|
/* 8034015C 0033D09C 4B FF D5 99 */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 80340160 0033D0A0 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 80340164 0033D0A4 38 9F 00 48 */ addi r4, r31, 0x48
|
|
/* 80340168 0033D0A8 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 8034016C 0033D0AC 41 82 00 10 */ beq lbl_8034017C
|
|
/* 80340170 0033D0B0 4B FF D5 AD */ bl OSRestoreInterrupts
|
|
/* 80340174 0033D0B4 3B E0 00 00 */ li r31, 0
|
|
/* 80340178 0033D0B8 48 00 00 10 */ b lbl_80340188
|
|
lbl_8034017C:
|
|
/* 8034017C 0033D0BC 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 80340180 0033D0C0 38 00 00 01 */ li r0, 1
|
|
/* 80340184 0033D0C4 90 04 00 00 */ stw r0, 0(r4)
|
|
lbl_80340188:
|
|
/* 80340188 0033D0C8 7F E3 FB 78 */ mr r3, r31
|
|
/* 8034018C 0033D0CC 80 01 00 14 */ lwz r0, 0x14(r1)
|
|
/* 80340190 0033D0D0 83 E1 00 0C */ lwz r31, 0xc(r1)
|
|
/* 80340194 0033D0D4 38 21 00 10 */ addi r1, r1, 0x10
|
|
/* 80340198 0033D0D8 7C 08 03 A6 */ mtlr r0
|
|
/* 8034019C 0033D0DC 4E 80 00 20 */ blr
|
|
|
|
.global __OSLockSramEx
|
|
__OSLockSramEx:
|
|
/* 803401A0 0033D0E0 7C 08 02 A6 */ mflr r0
|
|
/* 803401A4 0033D0E4 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 803401A8 0033D0E8 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 803401AC 0033D0EC 94 21 FF F0 */ stwu r1, -0x10(r1)
|
|
/* 803401B0 0033D0F0 93 E1 00 0C */ stw r31, 0xc(r1)
|
|
/* 803401B4 0033D0F4 3B E3 BB 20 */ addi r31, r3, lbl_8044BB20@l
|
|
/* 803401B8 0033D0F8 4B FF D5 3D */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 803401BC 0033D0FC 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 803401C0 0033D100 38 9F 00 48 */ addi r4, r31, 0x48
|
|
/* 803401C4 0033D104 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 803401C8 0033D108 41 82 00 10 */ beq lbl_803401D8
|
|
/* 803401CC 0033D10C 4B FF D5 51 */ bl OSRestoreInterrupts
|
|
/* 803401D0 0033D110 38 60 00 00 */ li r3, 0
|
|
/* 803401D4 0033D114 48 00 00 14 */ b lbl_803401E8
|
|
lbl_803401D8:
|
|
/* 803401D8 0033D118 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 803401DC 0033D11C 38 00 00 01 */ li r0, 1
|
|
/* 803401E0 0033D120 38 7F 00 14 */ addi r3, r31, 0x14
|
|
/* 803401E4 0033D124 90 04 00 00 */ stw r0, 0(r4)
|
|
lbl_803401E8:
|
|
/* 803401E8 0033D128 80 01 00 14 */ lwz r0, 0x14(r1)
|
|
/* 803401EC 0033D12C 83 E1 00 0C */ lwz r31, 0xc(r1)
|
|
/* 803401F0 0033D130 38 21 00 10 */ addi r1, r1, 0x10
|
|
/* 803401F4 0033D134 7C 08 03 A6 */ mtlr r0
|
|
/* 803401F8 0033D138 4E 80 00 20 */ blr
|
|
|
|
.global UnlockSram
|
|
UnlockSram:
|
|
/* 803401FC 0033D13C 7C 08 02 A6 */ mflr r0
|
|
/* 80340200 0033D140 2C 03 00 00 */ cmpwi r3, 0
|
|
/* 80340204 0033D144 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 80340208 0033D148 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 8034020C 0033D14C 94 21 FF D0 */ stwu r1, -0x30(r1)
|
|
/* 80340210 0033D150 BF 61 00 1C */ stmw r27, 0x1c(r1)
|
|
/* 80340214 0033D154 3B E3 BB 20 */ addi r31, r3, lbl_8044BB20@l
|
|
/* 80340218 0033D158 41 82 02 F8 */ beq lbl_80340510
|
|
/* 8034021C 0033D15C 28 04 00 00 */ cmplwi r4, 0
|
|
/* 80340220 0033D160 40 82 01 B0 */ bne lbl_803403D0
|
|
/* 80340224 0033D164 88 7F 00 13 */ lbz r3, 0x13(r31)
|
|
/* 80340228 0033D168 54 60 07 BE */ clrlwi r0, r3, 0x1e
|
|
/* 8034022C 0033D16C 28 00 00 02 */ cmplwi r0, 2
|
|
/* 80340230 0033D170 40 81 00 0C */ ble lbl_8034023C
|
|
/* 80340234 0033D174 54 60 00 3A */ rlwinm r0, r3, 0, 0, 0x1d
|
|
/* 80340238 0033D178 98 1F 00 13 */ stb r0, 0x13(r31)
|
|
lbl_8034023C:
|
|
/* 8034023C 0033D17C 38 00 00 00 */ li r0, 0
|
|
/* 80340240 0033D180 B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 80340244 0033D184 38 BF 00 14 */ addi r5, r31, 0x14
|
|
/* 80340248 0033D188 38 DF 00 0C */ addi r6, r31, 0xc
|
|
/* 8034024C 0033D18C 38 65 00 01 */ addi r3, r5, 1
|
|
/* 80340250 0033D190 B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 80340254 0033D194 7C 66 18 50 */ subf r3, r6, r3
|
|
/* 80340258 0033D198 7C 06 28 40 */ cmplw r6, r5
|
|
/* 8034025C 0033D19C 54 63 F8 7E */ srwi r3, r3, 1
|
|
/* 80340260 0033D1A0 40 80 01 70 */ bge lbl_803403D0
|
|
/* 80340264 0033D1A4 54 60 E8 FF */ rlwinm. r0, r3, 0x1d, 3, 0x1f
|
|
/* 80340268 0033D1A8 7C 09 03 A6 */ mtctr r0
|
|
/* 8034026C 0033D1AC 41 82 01 34 */ beq lbl_803403A0
|
|
lbl_80340270:
|
|
/* 80340270 0033D1B0 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
/* 80340274 0033D1B4 A0 06 00 00 */ lhz r0, 0(r6)
|
|
/* 80340278 0033D1B8 7C 05 02 14 */ add r0, r5, r0
|
|
/* 8034027C 0033D1BC B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 80340280 0033D1C0 A0 06 00 00 */ lhz r0, 0(r6)
|
|
/* 80340284 0033D1C4 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
/* 80340288 0033D1C8 7C 00 00 F8 */ nor r0, r0, r0
|
|
/* 8034028C 0033D1CC 7C 05 02 14 */ add r0, r5, r0
|
|
/* 80340290 0033D1D0 B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 80340294 0033D1D4 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
/* 80340298 0033D1D8 A0 06 00 02 */ lhz r0, 2(r6)
|
|
/* 8034029C 0033D1DC 7C 05 02 14 */ add r0, r5, r0
|
|
/* 803402A0 0033D1E0 B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 803402A4 0033D1E4 A0 06 00 02 */ lhz r0, 2(r6)
|
|
/* 803402A8 0033D1E8 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
/* 803402AC 0033D1EC 7C 00 00 F8 */ nor r0, r0, r0
|
|
/* 803402B0 0033D1F0 7C 05 02 14 */ add r0, r5, r0
|
|
/* 803402B4 0033D1F4 B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 803402B8 0033D1F8 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
/* 803402BC 0033D1FC A0 06 00 04 */ lhz r0, 4(r6)
|
|
/* 803402C0 0033D200 7C 05 02 14 */ add r0, r5, r0
|
|
/* 803402C4 0033D204 B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 803402C8 0033D208 A0 06 00 04 */ lhz r0, 4(r6)
|
|
/* 803402CC 0033D20C A0 BF 00 02 */ lhz r5, 2(r31)
|
|
/* 803402D0 0033D210 7C 00 00 F8 */ nor r0, r0, r0
|
|
/* 803402D4 0033D214 7C 05 02 14 */ add r0, r5, r0
|
|
/* 803402D8 0033D218 B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 803402DC 0033D21C A0 BF 00 00 */ lhz r5, 0(r31)
|
|
/* 803402E0 0033D220 A0 06 00 06 */ lhz r0, 6(r6)
|
|
/* 803402E4 0033D224 7C 05 02 14 */ add r0, r5, r0
|
|
/* 803402E8 0033D228 B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 803402EC 0033D22C A0 06 00 06 */ lhz r0, 6(r6)
|
|
/* 803402F0 0033D230 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
/* 803402F4 0033D234 7C 00 00 F8 */ nor r0, r0, r0
|
|
/* 803402F8 0033D238 7C 05 02 14 */ add r0, r5, r0
|
|
/* 803402FC 0033D23C B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 80340300 0033D240 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
/* 80340304 0033D244 A0 06 00 08 */ lhz r0, 8(r6)
|
|
/* 80340308 0033D248 7C 05 02 14 */ add r0, r5, r0
|
|
/* 8034030C 0033D24C B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 80340310 0033D250 A0 06 00 08 */ lhz r0, 8(r6)
|
|
/* 80340314 0033D254 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
/* 80340318 0033D258 7C 00 00 F8 */ nor r0, r0, r0
|
|
/* 8034031C 0033D25C 7C 05 02 14 */ add r0, r5, r0
|
|
/* 80340320 0033D260 B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 80340324 0033D264 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
/* 80340328 0033D268 A0 06 00 0A */ lhz r0, 0xa(r6)
|
|
/* 8034032C 0033D26C 7C 05 02 14 */ add r0, r5, r0
|
|
/* 80340330 0033D270 B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 80340334 0033D274 A0 06 00 0A */ lhz r0, 0xa(r6)
|
|
/* 80340338 0033D278 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
/* 8034033C 0033D27C 7C 00 00 F8 */ nor r0, r0, r0
|
|
/* 80340340 0033D280 7C 05 02 14 */ add r0, r5, r0
|
|
/* 80340344 0033D284 B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 80340348 0033D288 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
/* 8034034C 0033D28C A0 06 00 0C */ lhz r0, 0xc(r6)
|
|
/* 80340350 0033D290 7C 05 02 14 */ add r0, r5, r0
|
|
/* 80340354 0033D294 B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 80340358 0033D298 A0 06 00 0C */ lhz r0, 0xc(r6)
|
|
/* 8034035C 0033D29C A0 BF 00 02 */ lhz r5, 2(r31)
|
|
/* 80340360 0033D2A0 7C 00 00 F8 */ nor r0, r0, r0
|
|
/* 80340364 0033D2A4 7C 05 02 14 */ add r0, r5, r0
|
|
/* 80340368 0033D2A8 B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 8034036C 0033D2AC A0 BF 00 00 */ lhz r5, 0(r31)
|
|
/* 80340370 0033D2B0 A0 06 00 0E */ lhz r0, 0xe(r6)
|
|
/* 80340374 0033D2B4 7C 05 02 14 */ add r0, r5, r0
|
|
/* 80340378 0033D2B8 B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 8034037C 0033D2BC A0 06 00 0E */ lhz r0, 0xe(r6)
|
|
/* 80340380 0033D2C0 38 C6 00 10 */ addi r6, r6, 0x10
|
|
/* 80340384 0033D2C4 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
/* 80340388 0033D2C8 7C 00 00 F8 */ nor r0, r0, r0
|
|
/* 8034038C 0033D2CC 7C 05 02 14 */ add r0, r5, r0
|
|
/* 80340390 0033D2D0 B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 80340394 0033D2D4 42 00 FE DC */ bdnz lbl_80340270
|
|
/* 80340398 0033D2D8 70 63 00 07 */ andi. r3, r3, 7
|
|
/* 8034039C 0033D2DC 41 82 00 34 */ beq lbl_803403D0
|
|
lbl_803403A0:
|
|
/* 803403A0 0033D2E0 7C 69 03 A6 */ mtctr r3
|
|
lbl_803403A4:
|
|
/* 803403A4 0033D2E4 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
/* 803403A8 0033D2E8 A0 06 00 00 */ lhz r0, 0(r6)
|
|
/* 803403AC 0033D2EC 7C 05 02 14 */ add r0, r5, r0
|
|
/* 803403B0 0033D2F0 B0 1F 00 00 */ sth r0, 0(r31)
|
|
/* 803403B4 0033D2F4 A0 06 00 00 */ lhz r0, 0(r6)
|
|
/* 803403B8 0033D2F8 38 C6 00 02 */ addi r6, r6, 2
|
|
/* 803403BC 0033D2FC A0 BF 00 02 */ lhz r5, 2(r31)
|
|
/* 803403C0 0033D300 7C 00 00 F8 */ nor r0, r0, r0
|
|
/* 803403C4 0033D304 7C 05 02 14 */ add r0, r5, r0
|
|
/* 803403C8 0033D308 B0 1F 00 02 */ sth r0, 2(r31)
|
|
/* 803403CC 0033D30C 42 00 FF D8 */ bdnz lbl_803403A4
|
|
lbl_803403D0:
|
|
/* 803403D0 0033D310 3B DF 00 40 */ addi r30, r31, 0x40
|
|
/* 803403D4 0033D314 80 1F 00 40 */ lwz r0, 0x40(r31)
|
|
/* 803403D8 0033D318 7C 04 00 40 */ cmplw r4, r0
|
|
/* 803403DC 0033D31C 40 80 00 08 */ bge lbl_803403E4
|
|
/* 803403E0 0033D320 90 9E 00 00 */ stw r4, 0(r30)
|
|
lbl_803403E4:
|
|
/* 803403E4 0033D324 80 1E 00 00 */ lwz r0, 0(r30)
|
|
/* 803403E8 0033D328 28 00 00 14 */ cmplwi r0, 0x14
|
|
/* 803403EC 0033D32C 41 81 00 2C */ bgt lbl_80340418
|
|
/* 803403F0 0033D330 38 9F 00 14 */ addi r4, r31, 0x14
|
|
/* 803403F4 0033D334 A0 7F 00 3C */ lhz r3, 0x3c(r31)
|
|
/* 803403F8 0033D338 54 60 04 6A */ rlwinm r0, r3, 0, 0x11, 0x15
|
|
/* 803403FC 0033D33C 28 00 50 00 */ cmplwi r0, 0x5000
|
|
/* 80340400 0033D340 41 82 00 10 */ beq lbl_80340410
|
|
/* 80340404 0033D344 54 60 06 32 */ rlwinm r0, r3, 0, 0x18, 0x19
|
|
/* 80340408 0033D348 28 00 00 C0 */ cmplwi r0, 0xc0
|
|
/* 8034040C 0033D34C 40 82 00 0C */ bne lbl_80340418
|
|
lbl_80340410:
|
|
/* 80340410 0033D350 38 00 00 00 */ li r0, 0
|
|
/* 80340414 0033D354 B0 04 00 28 */ sth r0, 0x28(r4)
|
|
lbl_80340418:
|
|
/* 80340418 0033D358 83 BE 00 00 */ lwz r29, 0(r30)
|
|
.global WriteSramCallback
|
|
/* 8034041C 0033D35C 3C 60 80 34 */ lis r3, WriteSramCallback@ha
|
|
.global WriteSramCallback
|
|
/* 80340420 0033D360 38 A3 FE 90 */ addi r5, r3, WriteSramCallback@l
|
|
/* 80340424 0033D364 23 7D 00 40 */ subfic r27, r29, 0x40
|
|
/* 80340428 0033D368 7F 9F EA 14 */ add r28, r31, r29
|
|
/* 8034042C 0033D36C 38 60 00 00 */ li r3, 0
|
|
/* 80340430 0033D370 38 80 00 01 */ li r4, 1
|
|
/* 80340434 0033D374 48 00 3B F5 */ bl EXILock
|
|
/* 80340438 0033D378 2C 03 00 00 */ cmpwi r3, 0
|
|
/* 8034043C 0033D37C 40 82 00 0C */ bne lbl_80340448
|
|
/* 80340440 0033D380 38 00 00 00 */ li r0, 0
|
|
/* 80340444 0033D384 48 00 00 B4 */ b lbl_803404F8
|
|
lbl_80340448:
|
|
/* 80340448 0033D388 38 60 00 00 */ li r3, 0
|
|
/* 8034044C 0033D38C 38 80 00 01 */ li r4, 1
|
|
/* 80340450 0033D390 38 A0 00 03 */ li r5, 3
|
|
/* 80340454 0033D394 48 00 34 15 */ bl EXISelect
|
|
/* 80340458 0033D398 2C 03 00 00 */ cmpwi r3, 0
|
|
/* 8034045C 0033D39C 40 82 00 14 */ bne lbl_80340470
|
|
/* 80340460 0033D3A0 38 60 00 00 */ li r3, 0
|
|
/* 80340464 0033D3A4 48 00 3C B9 */ bl EXIUnlock
|
|
/* 80340468 0033D3A8 38 00 00 00 */ li r0, 0
|
|
/* 8034046C 0033D3AC 48 00 00 8C */ b lbl_803404F8
|
|
lbl_80340470:
|
|
/* 80340470 0033D3B0 57 A3 30 32 */ slwi r3, r29, 6
|
|
/* 80340474 0033D3B4 38 03 01 00 */ addi r0, r3, 0x100
|
|
/* 80340478 0033D3B8 64 00 A0 00 */ oris r0, r0, 0xa000
|
|
/* 8034047C 0033D3BC 90 01 00 10 */ stw r0, 0x10(r1)
|
|
/* 80340480 0033D3C0 38 81 00 10 */ addi r4, r1, 0x10
|
|
/* 80340484 0033D3C4 38 60 00 00 */ li r3, 0
|
|
/* 80340488 0033D3C8 38 A0 00 04 */ li r5, 4
|
|
/* 8034048C 0033D3CC 38 C0 00 01 */ li r6, 1
|
|
/* 80340490 0033D3D0 38 E0 00 00 */ li r7, 0
|
|
/* 80340494 0033D3D4 48 00 28 6D */ bl EXIImm
|
|
/* 80340498 0033D3D8 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 8034049C 0033D3DC 54 1D D9 7E */ srwi r29, r0, 5
|
|
/* 803404A0 0033D3E0 38 60 00 00 */ li r3, 0
|
|
/* 803404A4 0033D3E4 48 00 2C 45 */ bl EXISync
|
|
/* 803404A8 0033D3E8 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 803404AC 0033D3EC 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 803404B0 0033D3F0 38 9C 00 00 */ addi r4, r28, 0
|
|
/* 803404B4 0033D3F4 38 BB 00 00 */ addi r5, r27, 0
|
|
/* 803404B8 0033D3F8 7F BD 03 78 */ or r29, r29, r0
|
|
/* 803404BC 0033D3FC 38 60 00 00 */ li r3, 0
|
|
/* 803404C0 0033D400 38 C0 00 01 */ li r6, 1
|
|
/* 803404C4 0033D404 48 00 2A 99 */ bl EXIImmEx
|
|
/* 803404C8 0033D408 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 803404CC 0033D40C 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 803404D0 0033D410 7F BD 03 78 */ or r29, r29, r0
|
|
/* 803404D4 0033D414 38 60 00 00 */ li r3, 0
|
|
/* 803404D8 0033D418 48 00 34 BD */ bl EXIDeselect
|
|
/* 803404DC 0033D41C 7C 60 00 34 */ cntlzw r0, r3
|
|
/* 803404E0 0033D420 54 00 D9 7E */ srwi r0, r0, 5
|
|
/* 803404E4 0033D424 7F BD 03 78 */ or r29, r29, r0
|
|
/* 803404E8 0033D428 38 60 00 00 */ li r3, 0
|
|
/* 803404EC 0033D42C 48 00 3C 31 */ bl EXIUnlock
|
|
/* 803404F0 0033D430 7F A0 00 34 */ cntlzw r0, r29
|
|
/* 803404F4 0033D434 54 00 D9 7E */ srwi r0, r0, 5
|
|
lbl_803404F8:
|
|
/* 803404F8 0033D438 90 1F 00 4C */ stw r0, 0x4c(r31)
|
|
/* 803404FC 0033D43C 80 1F 00 4C */ lwz r0, 0x4c(r31)
|
|
/* 80340500 0033D440 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 80340504 0033D444 41 82 00 0C */ beq lbl_80340510
|
|
/* 80340508 0033D448 38 00 00 40 */ li r0, 0x40
|
|
/* 8034050C 0033D44C 90 1E 00 00 */ stw r0, 0(r30)
|
|
lbl_80340510:
|
|
/* 80340510 0033D450 38 00 00 00 */ li r0, 0
|
|
/* 80340514 0033D454 90 1F 00 48 */ stw r0, 0x48(r31)
|
|
/* 80340518 0033D458 80 7F 00 44 */ lwz r3, 0x44(r31)
|
|
/* 8034051C 0033D45C 4B FF D2 01 */ bl OSRestoreInterrupts
|
|
/* 80340520 0033D460 80 7F 00 4C */ lwz r3, 0x4c(r31)
|
|
/* 80340524 0033D464 BB 61 00 1C */ lmw r27, 0x1c(r1)
|
|
/* 80340528 0033D468 80 01 00 34 */ lwz r0, 0x34(r1)
|
|
/* 8034052C 0033D46C 38 21 00 30 */ addi r1, r1, 0x30
|
|
/* 80340530 0033D470 7C 08 03 A6 */ mtlr r0
|
|
/* 80340534 0033D474 4E 80 00 20 */ blr
|
|
|
|
.global __OSUnlockSram
|
|
__OSUnlockSram:
|
|
/* 80340538 0033D478 7C 08 02 A6 */ mflr r0
|
|
/* 8034053C 0033D47C 38 80 00 00 */ li r4, 0
|
|
/* 80340540 0033D480 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 80340544 0033D484 94 21 FF F8 */ stwu r1, -8(r1)
|
|
/* 80340548 0033D488 4B FF FC B5 */ bl UnlockSram
|
|
/* 8034054C 0033D48C 80 01 00 0C */ lwz r0, 0xc(r1)
|
|
/* 80340550 0033D490 38 21 00 08 */ addi r1, r1, 8
|
|
/* 80340554 0033D494 7C 08 03 A6 */ mtlr r0
|
|
/* 80340558 0033D498 4E 80 00 20 */ blr
|
|
|
|
.global __OSUnlockSramEx
|
|
__OSUnlockSramEx:
|
|
/* 8034055C 0033D49C 7C 08 02 A6 */ mflr r0
|
|
/* 80340560 0033D4A0 38 80 00 14 */ li r4, 0x14
|
|
/* 80340564 0033D4A4 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 80340568 0033D4A8 94 21 FF F8 */ stwu r1, -8(r1)
|
|
/* 8034056C 0033D4AC 4B FF FC 91 */ bl UnlockSram
|
|
/* 80340570 0033D4B0 80 01 00 0C */ lwz r0, 0xc(r1)
|
|
/* 80340574 0033D4B4 38 21 00 08 */ addi r1, r1, 8
|
|
/* 80340578 0033D4B8 7C 08 03 A6 */ mtlr r0
|
|
/* 8034057C 0033D4BC 4E 80 00 20 */ blr
|
|
|
|
.global __OSSyncSram
|
|
__OSSyncSram:
|
|
/* 80340580 0033D4C0 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 80340584 0033D4C4 38 63 BB 20 */ addi r3, r3, lbl_8044BB20@l
|
|
/* 80340588 0033D4C8 80 63 00 4C */ lwz r3, 0x4c(r3)
|
|
/* 8034058C 0033D4CC 4E 80 00 20 */ blr
|
|
|
|
.global OSGetSoundMode
|
|
OSGetSoundMode:
|
|
/* 80340590 0033D4D0 7C 08 02 A6 */ mflr r0
|
|
/* 80340594 0033D4D4 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 80340598 0033D4D8 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 8034059C 0033D4DC 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
/* 803405A0 0033D4E0 93 E1 00 1C */ stw r31, 0x1c(r1)
|
|
/* 803405A4 0033D4E4 3B E3 BB 20 */ addi r31, r3, lbl_8044BB20@l
|
|
/* 803405A8 0033D4E8 4B FF D1 4D */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 803405AC 0033D4EC 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 803405B0 0033D4F0 38 9F 00 48 */ addi r4, r31, 0x48
|
|
/* 803405B4 0033D4F4 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 803405B8 0033D4F8 41 82 00 10 */ beq lbl_803405C8
|
|
/* 803405BC 0033D4FC 4B FF D1 61 */ bl OSRestoreInterrupts
|
|
/* 803405C0 0033D500 3B E0 00 00 */ li r31, 0
|
|
/* 803405C4 0033D504 48 00 00 10 */ b lbl_803405D4
|
|
lbl_803405C8:
|
|
/* 803405C8 0033D508 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 803405CC 0033D50C 38 00 00 01 */ li r0, 1
|
|
/* 803405D0 0033D510 90 04 00 00 */ stw r0, 0(r4)
|
|
lbl_803405D4:
|
|
/* 803405D4 0033D514 88 1F 00 13 */ lbz r0, 0x13(r31)
|
|
/* 803405D8 0033D518 54 00 07 7B */ rlwinm. r0, r0, 0, 0x1d, 0x1d
|
|
/* 803405DC 0033D51C 41 82 00 0C */ beq lbl_803405E8
|
|
/* 803405E0 0033D520 3B E0 00 01 */ li r31, 1
|
|
/* 803405E4 0033D524 48 00 00 08 */ b lbl_803405EC
|
|
lbl_803405E8:
|
|
/* 803405E8 0033D528 3B E0 00 00 */ li r31, 0
|
|
lbl_803405EC:
|
|
/* 803405EC 0033D52C 38 60 00 00 */ li r3, 0
|
|
/* 803405F0 0033D530 38 80 00 00 */ li r4, 0
|
|
/* 803405F4 0033D534 4B FF FC 09 */ bl UnlockSram
|
|
/* 803405F8 0033D538 7F E3 FB 78 */ mr r3, r31
|
|
/* 803405FC 0033D53C 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
/* 80340600 0033D540 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
|
/* 80340604 0033D544 38 21 00 20 */ addi r1, r1, 0x20
|
|
/* 80340608 0033D548 7C 08 03 A6 */ mtlr r0
|
|
/* 8034060C 0033D54C 4E 80 00 20 */ blr
|
|
|
|
.global OSSetSoundMode
|
|
OSSetSoundMode:
|
|
/* 80340610 0033D550 7C 08 02 A6 */ mflr r0
|
|
/* 80340614 0033D554 3C 80 80 45 */ lis r4, lbl_8044BB20@ha
|
|
/* 80340618 0033D558 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 8034061C 0033D55C 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
/* 80340620 0033D560 93 E1 00 1C */ stw r31, 0x1c(r1)
|
|
/* 80340624 0033D564 3B E4 BB 20 */ addi r31, r4, lbl_8044BB20@l
|
|
/* 80340628 0033D568 93 C1 00 18 */ stw r30, 0x18(r1)
|
|
/* 8034062C 0033D56C 54 7E 17 7A */ rlwinm r30, r3, 2, 0x1d, 0x1d
|
|
/* 80340630 0033D570 4B FF D0 C5 */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 80340634 0033D574 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 80340638 0033D578 38 9F 00 48 */ addi r4, r31, 0x48
|
|
/* 8034063C 0033D57C 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 80340640 0033D580 41 82 00 10 */ beq lbl_80340650
|
|
/* 80340644 0033D584 4B FF D0 D9 */ bl OSRestoreInterrupts
|
|
/* 80340648 0033D588 3B E0 00 00 */ li r31, 0
|
|
/* 8034064C 0033D58C 48 00 00 10 */ b lbl_8034065C
|
|
lbl_80340650:
|
|
/* 80340650 0033D590 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 80340654 0033D594 38 00 00 01 */ li r0, 1
|
|
/* 80340658 0033D598 90 04 00 00 */ stw r0, 0(r4)
|
|
lbl_8034065C:
|
|
/* 8034065C 0033D59C 88 7F 00 13 */ lbz r3, 0x13(r31)
|
|
/* 80340660 0033D5A0 54 60 07 7A */ rlwinm r0, r3, 0, 0x1d, 0x1d
|
|
/* 80340664 0033D5A4 7C 1E 00 40 */ cmplw r30, r0
|
|
/* 80340668 0033D5A8 40 82 00 14 */ bne lbl_8034067C
|
|
/* 8034066C 0033D5AC 38 60 00 00 */ li r3, 0
|
|
/* 80340670 0033D5B0 38 80 00 00 */ li r4, 0
|
|
/* 80340674 0033D5B4 4B FF FB 89 */ bl UnlockSram
|
|
/* 80340678 0033D5B8 48 00 00 24 */ b lbl_8034069C
|
|
lbl_8034067C:
|
|
/* 8034067C 0033D5BC 54 60 07 B8 */ rlwinm r0, r3, 0, 0x1e, 0x1c
|
|
/* 80340680 0033D5C0 98 1F 00 13 */ stb r0, 0x13(r31)
|
|
/* 80340684 0033D5C4 38 60 00 01 */ li r3, 1
|
|
/* 80340688 0033D5C8 38 80 00 00 */ li r4, 0
|
|
/* 8034068C 0033D5CC 88 1F 00 13 */ lbz r0, 0x13(r31)
|
|
/* 80340690 0033D5D0 7C 00 F3 78 */ or r0, r0, r30
|
|
/* 80340694 0033D5D4 98 1F 00 13 */ stb r0, 0x13(r31)
|
|
/* 80340698 0033D5D8 4B FF FB 65 */ bl UnlockSram
|
|
lbl_8034069C:
|
|
/* 8034069C 0033D5DC 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
/* 803406A0 0033D5E0 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
|
/* 803406A4 0033D5E4 83 C1 00 18 */ lwz r30, 0x18(r1)
|
|
/* 803406A8 0033D5E8 38 21 00 20 */ addi r1, r1, 0x20
|
|
/* 803406AC 0033D5EC 7C 08 03 A6 */ mtlr r0
|
|
/* 803406B0 0033D5F0 4E 80 00 20 */ blr
|
|
|
|
.global OSGetProgressiveMode
|
|
OSGetProgressiveMode:
|
|
/* 803406B4 0033D5F4 7C 08 02 A6 */ mflr r0
|
|
/* 803406B8 0033D5F8 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 803406BC 0033D5FC 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 803406C0 0033D600 94 21 FF E8 */ stwu r1, -0x18(r1)
|
|
/* 803406C4 0033D604 93 E1 00 14 */ stw r31, 0x14(r1)
|
|
/* 803406C8 0033D608 3B E3 BB 20 */ addi r31, r3, lbl_8044BB20@l
|
|
/* 803406CC 0033D60C 4B FF D0 29 */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 803406D0 0033D610 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 803406D4 0033D614 38 9F 00 48 */ addi r4, r31, 0x48
|
|
/* 803406D8 0033D618 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 803406DC 0033D61C 41 82 00 10 */ beq lbl_803406EC
|
|
/* 803406E0 0033D620 4B FF D0 3D */ bl OSRestoreInterrupts
|
|
/* 803406E4 0033D624 3B E0 00 00 */ li r31, 0
|
|
/* 803406E8 0033D628 48 00 00 10 */ b lbl_803406F8
|
|
lbl_803406EC:
|
|
/* 803406EC 0033D62C 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 803406F0 0033D630 38 00 00 01 */ li r0, 1
|
|
/* 803406F4 0033D634 90 04 00 00 */ stw r0, 0(r4)
|
|
lbl_803406F8:
|
|
/* 803406F8 0033D638 88 1F 00 13 */ lbz r0, 0x13(r31)
|
|
/* 803406FC 0033D63C 38 60 00 00 */ li r3, 0
|
|
/* 80340700 0033D640 38 80 00 00 */ li r4, 0
|
|
/* 80340704 0033D644 54 1F CF FE */ rlwinm r31, r0, 0x19, 0x1f, 0x1f
|
|
/* 80340708 0033D648 4B FF FA F5 */ bl UnlockSram
|
|
/* 8034070C 0033D64C 7F E3 FB 78 */ mr r3, r31
|
|
/* 80340710 0033D650 80 01 00 1C */ lwz r0, 0x1c(r1)
|
|
/* 80340714 0033D654 83 E1 00 14 */ lwz r31, 0x14(r1)
|
|
/* 80340718 0033D658 38 21 00 18 */ addi r1, r1, 0x18
|
|
/* 8034071C 0033D65C 7C 08 03 A6 */ mtlr r0
|
|
/* 80340720 0033D660 4E 80 00 20 */ blr
|
|
|
|
.global OSSetProgressiveMode
|
|
OSSetProgressiveMode:
|
|
/* 80340724 0033D664 7C 08 02 A6 */ mflr r0
|
|
/* 80340728 0033D668 3C 80 80 45 */ lis r4, lbl_8044BB20@ha
|
|
/* 8034072C 0033D66C 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 80340730 0033D670 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
/* 80340734 0033D674 93 E1 00 1C */ stw r31, 0x1c(r1)
|
|
/* 80340738 0033D678 3B E4 BB 20 */ addi r31, r4, lbl_8044BB20@l
|
|
/* 8034073C 0033D67C 93 C1 00 18 */ stw r30, 0x18(r1)
|
|
/* 80340740 0033D680 54 7E 3E 30 */ rlwinm r30, r3, 7, 0x18, 0x18
|
|
/* 80340744 0033D684 4B FF CF B1 */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 80340748 0033D688 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 8034074C 0033D68C 38 9F 00 48 */ addi r4, r31, 0x48
|
|
/* 80340750 0033D690 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 80340754 0033D694 41 82 00 10 */ beq lbl_80340764
|
|
/* 80340758 0033D698 4B FF CF C5 */ bl OSRestoreInterrupts
|
|
/* 8034075C 0033D69C 3B E0 00 00 */ li r31, 0
|
|
/* 80340760 0033D6A0 48 00 00 10 */ b lbl_80340770
|
|
lbl_80340764:
|
|
/* 80340764 0033D6A4 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 80340768 0033D6A8 38 00 00 01 */ li r0, 1
|
|
/* 8034076C 0033D6AC 90 04 00 00 */ stw r0, 0(r4)
|
|
lbl_80340770:
|
|
/* 80340770 0033D6B0 88 7F 00 13 */ lbz r3, 0x13(r31)
|
|
/* 80340774 0033D6B4 54 60 06 30 */ rlwinm r0, r3, 0, 0x18, 0x18
|
|
/* 80340778 0033D6B8 7C 1E 00 40 */ cmplw r30, r0
|
|
/* 8034077C 0033D6BC 40 82 00 14 */ bne lbl_80340790
|
|
/* 80340780 0033D6C0 38 60 00 00 */ li r3, 0
|
|
/* 80340784 0033D6C4 38 80 00 00 */ li r4, 0
|
|
/* 80340788 0033D6C8 4B FF FA 75 */ bl UnlockSram
|
|
/* 8034078C 0033D6CC 48 00 00 24 */ b lbl_803407B0
|
|
lbl_80340790:
|
|
/* 80340790 0033D6D0 54 60 06 6E */ rlwinm r0, r3, 0, 0x19, 0x17
|
|
/* 80340794 0033D6D4 98 1F 00 13 */ stb r0, 0x13(r31)
|
|
/* 80340798 0033D6D8 38 60 00 01 */ li r3, 1
|
|
/* 8034079C 0033D6DC 38 80 00 00 */ li r4, 0
|
|
/* 803407A0 0033D6E0 88 1F 00 13 */ lbz r0, 0x13(r31)
|
|
/* 803407A4 0033D6E4 7C 00 F3 78 */ or r0, r0, r30
|
|
/* 803407A8 0033D6E8 98 1F 00 13 */ stb r0, 0x13(r31)
|
|
/* 803407AC 0033D6EC 4B FF FA 51 */ bl UnlockSram
|
|
lbl_803407B0:
|
|
/* 803407B0 0033D6F0 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
/* 803407B4 0033D6F4 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
|
/* 803407B8 0033D6F8 83 C1 00 18 */ lwz r30, 0x18(r1)
|
|
/* 803407BC 0033D6FC 38 21 00 20 */ addi r1, r1, 0x20
|
|
/* 803407C0 0033D700 7C 08 03 A6 */ mtlr r0
|
|
/* 803407C4 0033D704 4E 80 00 20 */ blr
|
|
|
|
.global OSGetWirelessID
|
|
OSGetWirelessID:
|
|
/* 803407C8 0033D708 7C 08 02 A6 */ mflr r0
|
|
/* 803407CC 0033D70C 3C 80 80 45 */ lis r4, lbl_8044BB20@ha
|
|
/* 803407D0 0033D710 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 803407D4 0033D714 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
/* 803407D8 0033D718 93 E1 00 1C */ stw r31, 0x1c(r1)
|
|
/* 803407DC 0033D71C 3B E4 BB 20 */ addi r31, r4, lbl_8044BB20@l
|
|
/* 803407E0 0033D720 93 C1 00 18 */ stw r30, 0x18(r1)
|
|
/* 803407E4 0033D724 3B C3 00 00 */ addi r30, r3, 0
|
|
/* 803407E8 0033D728 4B FF CF 0D */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 803407EC 0033D72C 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 803407F0 0033D730 38 9F 00 48 */ addi r4, r31, 0x48
|
|
/* 803407F4 0033D734 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 803407F8 0033D738 41 82 00 10 */ beq lbl_80340808
|
|
/* 803407FC 0033D73C 4B FF CF 21 */ bl OSRestoreInterrupts
|
|
/* 80340800 0033D740 38 60 00 00 */ li r3, 0
|
|
/* 80340804 0033D744 48 00 00 14 */ b lbl_80340818
|
|
lbl_80340808:
|
|
/* 80340808 0033D748 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 8034080C 0033D74C 38 00 00 01 */ li r0, 1
|
|
/* 80340810 0033D750 38 7F 00 14 */ addi r3, r31, 0x14
|
|
/* 80340814 0033D754 90 04 00 00 */ stw r0, 0(r4)
|
|
lbl_80340818:
|
|
/* 80340818 0033D758 57 C0 08 3C */ slwi r0, r30, 1
|
|
/* 8034081C 0033D75C 7C 63 02 14 */ add r3, r3, r0
|
|
/* 80340820 0033D760 A3 E3 00 1C */ lhz r31, 0x1c(r3)
|
|
/* 80340824 0033D764 38 60 00 00 */ li r3, 0
|
|
/* 80340828 0033D768 38 80 00 14 */ li r4, 0x14
|
|
/* 8034082C 0033D76C 4B FF F9 D1 */ bl UnlockSram
|
|
/* 80340830 0033D770 7F E3 FB 78 */ mr r3, r31
|
|
/* 80340834 0033D774 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
/* 80340838 0033D778 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
|
/* 8034083C 0033D77C 83 C1 00 18 */ lwz r30, 0x18(r1)
|
|
/* 80340840 0033D780 38 21 00 20 */ addi r1, r1, 0x20
|
|
/* 80340844 0033D784 7C 08 03 A6 */ mtlr r0
|
|
/* 80340848 0033D788 4E 80 00 20 */ blr
|
|
|
|
.global OSSetWirelessID
|
|
OSSetWirelessID:
|
|
/* 8034084C 0033D78C 7C 08 02 A6 */ mflr r0
|
|
/* 80340850 0033D790 3C A0 80 45 */ lis r5, lbl_8044BB20@ha
|
|
/* 80340854 0033D794 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 80340858 0033D798 94 21 FF D8 */ stwu r1, -0x28(r1)
|
|
/* 8034085C 0033D79C 93 E1 00 24 */ stw r31, 0x24(r1)
|
|
/* 80340860 0033D7A0 3B E5 BB 20 */ addi r31, r5, lbl_8044BB20@l
|
|
/* 80340864 0033D7A4 93 C1 00 20 */ stw r30, 0x20(r1)
|
|
/* 80340868 0033D7A8 3B C4 00 00 */ addi r30, r4, 0
|
|
/* 8034086C 0033D7AC 93 A1 00 1C */ stw r29, 0x1c(r1)
|
|
/* 80340870 0033D7B0 3B A3 00 00 */ addi r29, r3, 0
|
|
/* 80340874 0033D7B4 4B FF CE 81 */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 80340878 0033D7B8 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 8034087C 0033D7BC 38 9F 00 48 */ addi r4, r31, 0x48
|
|
/* 80340880 0033D7C0 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 80340884 0033D7C4 41 82 00 10 */ beq lbl_80340894
|
|
/* 80340888 0033D7C8 4B FF CE 95 */ bl OSRestoreInterrupts
|
|
/* 8034088C 0033D7CC 38 60 00 00 */ li r3, 0
|
|
/* 80340890 0033D7D0 48 00 00 14 */ b lbl_803408A4
|
|
lbl_80340894:
|
|
/* 80340894 0033D7D4 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 80340898 0033D7D8 38 00 00 01 */ li r0, 1
|
|
/* 8034089C 0033D7DC 38 7F 00 14 */ addi r3, r31, 0x14
|
|
/* 803408A0 0033D7E0 90 04 00 00 */ stw r0, 0(r4)
|
|
lbl_803408A4:
|
|
/* 803408A4 0033D7E4 57 A0 08 3C */ slwi r0, r29, 1
|
|
/* 803408A8 0033D7E8 7C 83 02 14 */ add r4, r3, r0
|
|
/* 803408AC 0033D7EC A4 64 00 1C */ lhzu r3, 0x1c(r4)
|
|
/* 803408B0 0033D7F0 57 C0 04 3E */ clrlwi r0, r30, 0x10
|
|
/* 803408B4 0033D7F4 7C 03 00 40 */ cmplw r3, r0
|
|
/* 803408B8 0033D7F8 41 82 00 18 */ beq lbl_803408D0
|
|
/* 803408BC 0033D7FC B3 C4 00 00 */ sth r30, 0(r4)
|
|
/* 803408C0 0033D800 38 60 00 01 */ li r3, 1
|
|
/* 803408C4 0033D804 38 80 00 14 */ li r4, 0x14
|
|
/* 803408C8 0033D808 4B FF F9 35 */ bl UnlockSram
|
|
/* 803408CC 0033D80C 48 00 00 10 */ b lbl_803408DC
|
|
lbl_803408D0:
|
|
/* 803408D0 0033D810 38 60 00 00 */ li r3, 0
|
|
/* 803408D4 0033D814 38 80 00 14 */ li r4, 0x14
|
|
/* 803408D8 0033D818 4B FF F9 25 */ bl UnlockSram
|
|
lbl_803408DC:
|
|
/* 803408DC 0033D81C 80 01 00 2C */ lwz r0, 0x2c(r1)
|
|
/* 803408E0 0033D820 83 E1 00 24 */ lwz r31, 0x24(r1)
|
|
/* 803408E4 0033D824 83 C1 00 20 */ lwz r30, 0x20(r1)
|
|
/* 803408E8 0033D828 83 A1 00 1C */ lwz r29, 0x1c(r1)
|
|
/* 803408EC 0033D82C 38 21 00 28 */ addi r1, r1, 0x28
|
|
/* 803408F0 0033D830 7C 08 03 A6 */ mtlr r0
|
|
/* 803408F4 0033D834 4E 80 00 20 */ blr
|
|
|
|
.global OSGetGbsMode
|
|
OSGetGbsMode:
|
|
/* 803408F8 0033D838 7C 08 02 A6 */ mflr r0
|
|
/* 803408FC 0033D83C 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 80340900 0033D840 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 80340904 0033D844 94 21 FF E8 */ stwu r1, -0x18(r1)
|
|
/* 80340908 0033D848 93 E1 00 14 */ stw r31, 0x14(r1)
|
|
/* 8034090C 0033D84C 3B E3 BB 20 */ addi r31, r3, lbl_8044BB20@l
|
|
/* 80340910 0033D850 4B FF CD E5 */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 80340914 0033D854 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 80340918 0033D858 38 9F 00 48 */ addi r4, r31, 0x48
|
|
/* 8034091C 0033D85C 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 80340920 0033D860 41 82 00 10 */ beq lbl_80340930
|
|
/* 80340924 0033D864 4B FF CD F9 */ bl OSRestoreInterrupts
|
|
/* 80340928 0033D868 38 60 00 00 */ li r3, 0
|
|
/* 8034092C 0033D86C 48 00 00 14 */ b lbl_80340940
|
|
lbl_80340930:
|
|
/* 80340930 0033D870 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 80340934 0033D874 38 00 00 01 */ li r0, 1
|
|
/* 80340938 0033D878 38 7F 00 14 */ addi r3, r31, 0x14
|
|
/* 8034093C 0033D87C 90 04 00 00 */ stw r0, 0(r4)
|
|
lbl_80340940:
|
|
/* 80340940 0033D880 A3 E3 00 28 */ lhz r31, 0x28(r3)
|
|
/* 80340944 0033D884 38 60 00 00 */ li r3, 0
|
|
/* 80340948 0033D888 38 80 00 14 */ li r4, 0x14
|
|
/* 8034094C 0033D88C 4B FF F8 B1 */ bl UnlockSram
|
|
/* 80340950 0033D890 7F E3 FB 78 */ mr r3, r31
|
|
/* 80340954 0033D894 80 01 00 1C */ lwz r0, 0x1c(r1)
|
|
/* 80340958 0033D898 83 E1 00 14 */ lwz r31, 0x14(r1)
|
|
/* 8034095C 0033D89C 38 21 00 18 */ addi r1, r1, 0x18
|
|
/* 80340960 0033D8A0 7C 08 03 A6 */ mtlr r0
|
|
/* 80340964 0033D8A4 4E 80 00 20 */ blr
|
|
|
|
.global OSSetGbsMode
|
|
OSSetGbsMode:
|
|
/* 80340968 0033D8A8 7C 08 02 A6 */ mflr r0
|
|
/* 8034096C 0033D8AC 54 64 04 3E */ clrlwi r4, r3, 0x10
|
|
/* 80340970 0033D8B0 90 01 00 04 */ stw r0, 4(r1)
|
|
/* 80340974 0033D8B4 54 60 04 6A */ rlwinm r0, r3, 0, 0x11, 0x15
|
|
/* 80340978 0033D8B8 28 00 50 00 */ cmplwi r0, 0x5000
|
|
/* 8034097C 0033D8BC 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
/* 80340980 0033D8C0 93 E1 00 1C */ stw r31, 0x1c(r1)
|
|
/* 80340984 0033D8C4 93 C1 00 18 */ stw r30, 0x18(r1)
|
|
/* 80340988 0033D8C8 3B C3 00 00 */ addi r30, r3, 0
|
|
/* 8034098C 0033D8CC 3C 60 80 45 */ lis r3, lbl_8044BB20@ha
|
|
/* 80340990 0033D8D0 3B E3 BB 20 */ addi r31, r3, lbl_8044BB20@l
|
|
/* 80340994 0033D8D4 41 82 00 10 */ beq lbl_803409A4
|
|
/* 80340998 0033D8D8 54 80 06 32 */ rlwinm r0, r4, 0, 0x18, 0x19
|
|
/* 8034099C 0033D8DC 28 00 00 C0 */ cmplwi r0, 0xc0
|
|
/* 803409A0 0033D8E0 40 82 00 08 */ bne lbl_803409A8
|
|
lbl_803409A4:
|
|
/* 803409A4 0033D8E4 3B C0 00 00 */ li r30, 0
|
|
lbl_803409A8:
|
|
/* 803409A8 0033D8E8 4B FF CD 4D */ bl __RAS_OSDisableInterrupts_begin
|
|
/* 803409AC 0033D8EC 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
/* 803409B0 0033D8F0 38 BF 00 48 */ addi r5, r31, 0x48
|
|
/* 803409B4 0033D8F4 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 803409B8 0033D8F8 41 82 00 10 */ beq lbl_803409C8
|
|
/* 803409BC 0033D8FC 4B FF CD 61 */ bl OSRestoreInterrupts
|
|
/* 803409C0 0033D900 38 80 00 00 */ li r4, 0
|
|
/* 803409C4 0033D904 48 00 00 14 */ b lbl_803409D8
|
|
lbl_803409C8:
|
|
/* 803409C8 0033D908 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
/* 803409CC 0033D90C 38 00 00 01 */ li r0, 1
|
|
/* 803409D0 0033D910 38 9F 00 14 */ addi r4, r31, 0x14
|
|
/* 803409D4 0033D914 90 05 00 00 */ stw r0, 0(r5)
|
|
lbl_803409D8:
|
|
/* 803409D8 0033D918 A0 04 00 28 */ lhz r0, 0x28(r4)
|
|
/* 803409DC 0033D91C 57 C3 04 3E */ clrlwi r3, r30, 0x10
|
|
/* 803409E0 0033D920 7C 03 00 40 */ cmplw r3, r0
|
|
/* 803409E4 0033D924 40 82 00 14 */ bne lbl_803409F8
|
|
/* 803409E8 0033D928 38 60 00 00 */ li r3, 0
|
|
/* 803409EC 0033D92C 38 80 00 14 */ li r4, 0x14
|
|
/* 803409F0 0033D930 4B FF F8 0D */ bl UnlockSram
|
|
/* 803409F4 0033D934 48 00 00 14 */ b lbl_80340A08
|
|
lbl_803409F8:
|
|
/* 803409F8 0033D938 B3 C4 00 28 */ sth r30, 0x28(r4)
|
|
/* 803409FC 0033D93C 38 60 00 01 */ li r3, 1
|
|
/* 80340A00 0033D940 38 80 00 14 */ li r4, 0x14
|
|
/* 80340A04 0033D944 4B FF F7 F9 */ bl UnlockSram
|
|
lbl_80340A08:
|
|
/* 80340A08 0033D948 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
/* 80340A0C 0033D94C 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
|
/* 80340A10 0033D950 83 C1 00 18 */ lwz r30, 0x18(r1)
|
|
/* 80340A14 0033D954 38 21 00 20 */ addi r1, r1, 0x20
|
|
/* 80340A18 0033D958 7C 08 03 A6 */ mtlr r0
|
|
/* 80340A1C 0033D95C 4E 80 00 20 */ blr
|