mirror of https://github.com/zeldaret/tp.git
369 lines
11 KiB
C
369 lines
11 KiB
C
//
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// Generated By: dol2asm
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// Translation Unit: ar
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//
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#include "dolphin/ar/ar.h"
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#include "MSL_C/string.h"
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#include "dol2asm.h"
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#include "dolphin/base/PPCArch.h"
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#include "dolphin/dsp/dsp.h"
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#include "dolphin/os/OS.h"
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void __ARHandler(s16 interrupt, OSContext* context);
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void __ARClearInterrupt();
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u16 __ARGetInterruptStatus();
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void __ARChecksize();
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/* ############################################################################################## */
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/* 804518B8-804518BC 000DB8 0004+00 3/3 0/0 0/0 .sbss __AR_Callback */
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static ARCallback __AR_Callback;
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/* 80350554-80350598 34AE94 0044+00 0/0 1/1 0/0 .text ARRegisterDMACallback */
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ARCallback ARRegisterDMACallback(ARCallback callback) {
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ARCallback oldCb;
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BOOL enabled;
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oldCb = __AR_Callback;
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enabled = OSDisableInterrupts();
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__AR_Callback = callback;
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OSRestoreInterrupts(enabled);
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return oldCb;
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}
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/* 80350598-803505D4 34AED8 003C+00 0/0 2/2 0/0 .text ARGetDMAStatus */
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u32 ARGetDMAStatus() {
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BOOL enabled;
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u32 val;
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enabled = OSDisableInterrupts();
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val = __DSPRegs[5] & 0x0200;
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OSRestoreInterrupts(enabled);
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return val;
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}
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/* 803505D4-803506C4 34AF14 00F0+00 0/0 5/5 0/0 .text ARStartDMA */
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void ARStartDMA(u32 type, u32 mainmem_addr, u32 aram_addr, u32 length) {
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BOOL enabled;
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enabled = OSDisableInterrupts();
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__DSPRegs[16] = (u16)(__DSPRegs[16] & ~0x3ff) | (u16)(mainmem_addr >> 16);
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__DSPRegs[17] = (u16)(__DSPRegs[17] & ~0xffe0) | (u16)(mainmem_addr & 0xffff);
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__DSPRegs[18] = (u16)(__DSPRegs[18] & ~0x3ff) | (u16)(aram_addr >> 16);
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__DSPRegs[19] = (u16)(__DSPRegs[19] & ~0xffe0) | (u16)(aram_addr & 0xffff);
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__DSPRegs[20] = (u16)((__DSPRegs[20] & ~0x8000) | (type << 15));
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__DSPRegs[20] = (u16)(__DSPRegs[20] & ~0x3ff) | (u16)(length >> 16);
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__DSPRegs[21] = (u16)(__DSPRegs[21] & ~0xffe0) | (u16)(length & 0xffff);
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OSRestoreInterrupts(enabled);
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}
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/* ############################################################################################## */
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/* 804518BC-804518C0 000DBC 0004+00 2/1 0/0 0/0 .sbss __AR_Size */
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static u32 __AR_Size;
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/* 804518C0-804518C4 000DC0 0004+00 1/1 0/0 0/0 .sbss __AR_InternalSize */
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static u32 __AR_InternalSize;
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/* 804518C4-804518C8 000DC4 0004+00 1/1 0/0 0/0 .sbss __AR_ExpansionSize */
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static u32 __AR_ExpansionSize;
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/* 804518C8-804518CC 000DC8 0004+00 2/2 0/0 0/0 .sbss __AR_StackPointer */
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static u32 __AR_StackPointer;
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/* 804518CC-804518D0 000DCC 0004+00 2/2 0/0 0/0 .sbss __AR_FreeBlocks */
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static u32 __AR_FreeBlocks;
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/* 804518D0-804518D4 000DD0 0004+00 2/2 0/0 0/0 .sbss __AR_BlockLength */
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static u32* __AR_BlockLength;
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/* 803506C4-8035072C 34B004 0068+00 0/0 1/1 0/0 .text ARAlloc */
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u32 ARAlloc(u32 length) {
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u32 tmp;
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BOOL enabled;
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enabled = OSDisableInterrupts();
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tmp = __AR_StackPointer;
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__AR_StackPointer += length;
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*__AR_BlockLength = length;
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__AR_BlockLength++;
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__AR_FreeBlocks--;
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OSRestoreInterrupts(enabled);
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return tmp;
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}
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/* ############################################################################################## */
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/* 803D1BE8-803D1C30 02ED08 0044+04 1/0 0/0 0/0 .data @1 */
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SECTION_DATA static char lit_1[] =
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"<< Dolphin SDK - AR\trelease build: Apr 5 2004 04:15:03 (0x2301) >>";
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/* 80450A48-80450A50 -00001 0004+04 1/1 0/0 0/0 .sdata __ARVersion */
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SECTION_SDATA static const char* __ARVersion = lit_1;
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/* 804518D4-804518D8 000DD4 0004+00 1/1 0/0 0/0 .sbss __AR_init_flag */
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static volatile BOOL __AR_init_flag;
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/* 8035072C-803507F0 34B06C 00C4+00 0/0 1/1 0/0 .text ARInit */
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u32 ARInit(u32* stack_index_addr, u32 num_entries) {
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BOOL old;
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u16 refresh;
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if (__AR_init_flag == TRUE) {
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return 0x4000;
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}
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OSRegisterVersion(__ARVersion);
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old = OSDisableInterrupts();
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__AR_Callback = NULL;
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__OSSetInterruptHandler(OS_INTR_DSP_ARAM, __ARHandler);
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__OSUnmaskInterrupts(OS_INTERRUPTMASK_DSP_ARAM);
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__AR_StackPointer = 0x4000;
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__AR_FreeBlocks = num_entries;
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__AR_BlockLength = stack_index_addr;
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refresh = (u16)(__DSPRegs[13] & 0x000000ff);
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__DSPRegs[13] = (u16)((__DSPRegs[13] & ~0x000000ff) | (refresh & 0x000000ff));
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__ARChecksize();
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__AR_init_flag = TRUE;
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OSRestoreInterrupts(old);
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return __AR_StackPointer;
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}
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/* 803507F0-803507F8 -00001 0008+00 0/0 0/0 0/0 .text ARGetSize */
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u32 ARGetSize(void) {
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return __AR_Size;
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}
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/* 803507F8-80350870 34B138 0078+00 1/1 0/0 0/0 .text __ARHandler */
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static void __ARHandler(s16 interrupt, OSContext* context) {
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OSContext exceptionContext;
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u16 tmp;
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tmp = __DSPRegs[5];
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tmp = (u16)((tmp & ~0x00000088) | 0x20);
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__DSPRegs[5] = tmp;
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OSClearContext(&exceptionContext);
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OSSetCurrentContext(&exceptionContext);
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if (__AR_Callback) {
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(*__AR_Callback)();
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}
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OSClearContext(&exceptionContext);
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OSSetCurrentContext(context);
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}
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/* 80350870-80350890 34B1B0 0020+00 0/0 2/2 0/0 .text __ARClearInterrupt */
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void __ARClearInterrupt(void) {
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u16 tmp;
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tmp = __DSPRegs[5];
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tmp = (u16)((tmp & ~(0x00000080 | 0x00000008)) | 0x00000020);
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__DSPRegs[5] = tmp;
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}
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/* 80350890-803508A0 34B1D0 0010+00 0/0 2/2 0/0 .text __ARGetInterruptStatus */
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u16 __ARGetInterruptStatus(void) {
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return ((u16)(__DSPRegs[5] & 0x0020));
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}
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#define RoundUP32(x) (((u32)(x) + 32 - 1) & ~(32 - 1))
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/* 803508A0-80352094 34B1E0 17F4+00 1/1 0/0 0/0 .text __ARChecksize */
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#ifdef NONMATCHING
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void __ARChecksize(void) {
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u8 test_data_pad[0x20 + 31];
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u8 dummy_data_pad[0x20 + 31];
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u8 buffer_pad[0x20 + 31];
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u8 save_pad_1[0x20 + 31];
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u8 save_pad_2[0x20 + 31];
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u8 save_pad_3[0x20 + 31];
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u8 save_pad_4[0x20 + 31];
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u8 save_pad_5[0x20 + 31];
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u16 dspreg9;
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u32* test_data;
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u32* dummy_data;
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u32* buffer;
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u32* save1;
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u32* save2;
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u32* save3;
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u32* save4;
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u32* save5;
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u16 ARAM_mode = 0;
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u32 ARAM_size = 0;
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u32 i;
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while (!(__DSPRegs[11] & 1))
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;
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ARAM_mode = 3;
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__DSPRegs[9] = (u16)((__DSPRegs[9] & ~(0x00000007 | 0x00000038)) | 0x20 | 2 | 1);
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ARAM_size = __AR_InternalSize = 0x1000000;
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test_data = (u32*)(RoundUP32((u32)(test_data_pad)));
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dummy_data = (u32*)(RoundUP32((u32)(dummy_data_pad)));
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buffer = (u32*)(RoundUP32((u32)(buffer_pad)));
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save1 = (u32*)(RoundUP32((u32)(save_pad_1)));
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save2 = (u32*)(RoundUP32((u32)(save_pad_2)));
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save3 = (u32*)(RoundUP32((u32)(save_pad_3)));
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save4 = (u32*)(RoundUP32((u32)(save_pad_4)));
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save5 = (u32*)(RoundUP32((u32)(save_pad_5)));
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for (i = 0; i < 8; i++) {
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*(test_data + i) = 0xdeadbeef;
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*(dummy_data + i) = 0xbad0bad0;
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}
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DCFlushRange((void*)test_data, 0x20);
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DCFlushRange((void*)dummy_data, 0x20);
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__AR_ExpansionSize = 0;
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DCInvalidateRange((void*)save1, 0x20);
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__ARReadDMA((u32)save1, ARAM_size + 0, 0x20);
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PPCSync();
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__ARWriteDMA((u32)test_data, ARAM_size + 0x0000000, 0x20);
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memset((void*)buffer, 0, 0x20);
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DCFlushRange((void*)buffer, 0x20);
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__ARReadDMA((u32)buffer, ARAM_size + 0x0000000, 0x20);
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PPCSync();
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if (buffer[0] == test_data[0]) {
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DCInvalidateRange((void*)save2, 0x20);
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__ARReadDMA((u32)save2, ARAM_size + 0x0200000, 0x20);
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PPCSync();
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DCInvalidateRange((void*)save3, 0x20);
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__ARReadDMA((u32)save3, ARAM_size + 0x1000000, 0x20);
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PPCSync();
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DCInvalidateRange((void*)save4, 0x20);
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__ARReadDMA((u32)save4, ARAM_size + 0x0000200, 0x20);
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PPCSync();
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DCInvalidateRange((void*)save5, 0x20);
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__ARReadDMA((u32)save5, ARAM_size + 0x0400000, 0x20);
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PPCSync();
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__ARWriteDMA((u32)dummy_data, ARAM_size + 0x0200000, 0x20);
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__ARWriteDMA((u32)test_data, ARAM_size + 0x0000000, 0x20);
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memset((void*)buffer, 0, 0x20);
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DCFlushRange((void*)buffer, 0x20);
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__ARReadDMA((u32)buffer, ARAM_size + 0x0200000, 0x20);
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PPCSync();
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if (buffer[0] == test_data[0]) {
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__ARWriteDMA((u32)save1, ARAM_size + 0x0000000, 0x20);
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ARAM_mode |= 0 << 1;
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ARAM_size += 0x0200000;
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__AR_ExpansionSize = 0x0200000;
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} else {
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__ARWriteDMA((u32)dummy_data, ARAM_size + 0x1000000, 0x20);
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__ARWriteDMA((u32)test_data, ARAM_size + 0x0000000, 0x20);
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memset((void*)buffer, 0, 0x20);
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DCFlushRange((void*)buffer, 0x20);
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__ARReadDMA((u32)buffer, ARAM_size + 0x1000000, 0x20);
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PPCSync();
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if (buffer[0] == test_data[0]) {
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__ARWriteDMA((u32)save1, ARAM_size + 0x0000000, 0x20);
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__ARWriteDMA((u32)save2, ARAM_size + 0x0200000, 0x20);
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ARAM_mode |= 4 << 1;
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ARAM_size += 0x0400000;
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__AR_ExpansionSize = 0x0400000;
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} else {
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__ARWriteDMA((u32)dummy_data, ARAM_size + 0x0000200, 0x20);
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__ARWriteDMA((u32)test_data, ARAM_size + 0x0000000, 0x20);
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memset((void*)buffer, 0, 0x20);
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DCFlushRange((void*)buffer, 0x20);
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__ARReadDMA((u32)buffer, ARAM_size + 0x0000200, 0x20);
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PPCSync();
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if (buffer[0] == test_data[0]) {
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__ARWriteDMA((u32)save1, ARAM_size + 0x0000000, 0x20);
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__ARWriteDMA((u32)save2, ARAM_size + 0x0200000, 0x20);
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__ARWriteDMA((u32)save3, ARAM_size + 0x1000000, 0x20);
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ARAM_mode |= 8 << 1;
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ARAM_size += 0x0800000;
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__AR_ExpansionSize = 0x0800000;
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} else {
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__ARWriteDMA((u32)dummy_data, ARAM_size + 0x0400000, 0x20);
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__ARWriteDMA((u32)test_data, ARAM_size + 0x0000000, 0x20);
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memset((void*)buffer, 0, 0x20);
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DCFlushRange((void*)buffer, 0x20);
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__ARReadDMA((u32)buffer, ARAM_size + 0x0400000, 0x20);
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PPCSync();
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if (buffer[0] == test_data[0]) {
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__ARWriteDMA((u32)save1, ARAM_size + 0x0000000, 0x20);
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__ARWriteDMA((u32)save2, ARAM_size + 0x0200000, 0x20);
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__ARWriteDMA((u32)save3, ARAM_size + 0x1000000, 0x20);
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__ARWriteDMA((u32)save4, ARAM_size + 0x0000200, 0x20);
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ARAM_mode |= 12 << 1;
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ARAM_size += 0x1000000;
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__AR_ExpansionSize = 0x1000000;
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} else {
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__ARWriteDMA((u32)save1, ARAM_size + 0x0000000, 0x20);
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__ARWriteDMA((u32)save2, ARAM_size + 0x0200000, 0x20);
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__ARWriteDMA((u32)save3, ARAM_size + 0x1000000, 0x20);
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__ARWriteDMA((u32)save4, ARAM_size + 0x0000200, 0x20);
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__ARWriteDMA((u32)save5, ARAM_size + 0x0400000, 0x20);
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ARAM_mode |= 16 << 1;
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ARAM_size += 0x2000000;
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__AR_ExpansionSize = 0x2000000;
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}
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}
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}
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}
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__DSPRegs[9] = (u16)((__DSPRegs[9] & ~(0x07 | 0x38)) | ARAM_mode);
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}
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*(u32*)OSPhysicalToUncached(0x00D0) = ARAM_size;
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__AR_Size = ARAM_size;
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}
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#else
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#pragma push
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#pragma optimization_level 0
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#pragma optimizewithasm off
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asm void __ARChecksize() {
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nofralloc
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#include "asm/dolphin/ar/ar/__ARChecksize.s"
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}
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#pragma pop
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#endif |