mirror of https://github.com/zeldaret/tp.git
54 lines
2.2 KiB
ArmAsm
54 lines
2.2 KiB
ArmAsm
lbl_802F8778:
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/* 802F8778 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 802F877C 7C 08 02 A6 */ mflr r0
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/* 802F8780 90 01 00 24 */ stw r0, 0x24(r1)
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/* 802F8784 39 61 00 20 */ addi r11, r1, 0x20
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/* 802F8788 48 06 9A 51 */ bl _savegpr_28
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/* 802F878C 7C 7C 1B 78 */ mr r28, r3
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/* 802F8790 7C 9D 23 78 */ mr r29, r4
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/* 802F8794 7C BE 2B 78 */ mr r30, r5
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/* 802F8798 7C DF 33 78 */ mr r31, r6
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/* 802F879C 48 00 00 99 */ bl checkSignature__9J2DScreenFP20JSURandomInputStream
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/* 802F87A0 54 60 06 3F */ clrlwi. r0, r3, 0x18
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/* 802F87A4 40 82 00 0C */ bne lbl_802F87B0
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/* 802F87A8 38 60 00 00 */ li r3, 0
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/* 802F87AC 48 00 00 70 */ b lbl_802F881C
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lbl_802F87B0:
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/* 802F87B0 7F 83 E3 78 */ mr r3, r28
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/* 802F87B4 7F A4 EB 78 */ mr r4, r29
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/* 802F87B8 48 00 00 DD */ bl getScreenInformation__9J2DScreenFP20JSURandomInputStream
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/* 802F87BC 54 60 06 3F */ clrlwi. r0, r3, 0x18
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/* 802F87C0 40 82 00 0C */ bne lbl_802F87CC
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/* 802F87C4 38 60 00 00 */ li r3, 0
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/* 802F87C8 48 00 00 54 */ b lbl_802F881C
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lbl_802F87CC:
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/* 802F87CC 7F 83 E3 78 */ mr r3, r28
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/* 802F87D0 7F 84 E3 78 */ mr r4, r28
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/* 802F87D4 7F A5 EB 78 */ mr r5, r29
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/* 802F87D8 7F C6 F3 78 */ mr r6, r30
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/* 802F87DC 7F E7 FB 78 */ mr r7, r31
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/* 802F87E0 48 00 01 B1 */ bl makeHierarchyPanes__9J2DScreenFP7J2DPaneP20JSURandomInputStreamUlP10JKRArchive
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/* 802F87E4 20 63 00 02 */ subfic r3, r3, 2
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/* 802F87E8 30 03 FF FF */ addic r0, r3, -1
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/* 802F87EC 7F E0 19 10 */ subfe r31, r0, r3
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/* 802F87F0 57 C0 02 DF */ rlwinm. r0, r30, 0, 0xb, 0xf
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/* 802F87F4 40 82 00 0C */ bne lbl_802F8800
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/* 802F87F8 7F 83 E3 78 */ mr r3, r28
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/* 802F87FC 4B FF FD AD */ bl clean__9J2DScreenFv
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lbl_802F8800:
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/* 802F8800 57 E0 06 3F */ clrlwi. r0, r31, 0x18
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/* 802F8804 41 82 00 14 */ beq lbl_802F8818
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/* 802F8808 88 1D 00 04 */ lbz r0, 4(r29)
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/* 802F880C 7C 00 00 34 */ cntlzw r0, r0
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/* 802F8810 54 03 D9 7E */ srwi r3, r0, 5
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/* 802F8814 48 00 00 08 */ b lbl_802F881C
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lbl_802F8818:
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/* 802F8818 38 60 00 00 */ li r3, 0
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lbl_802F881C:
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/* 802F881C 39 61 00 20 */ addi r11, r1, 0x20
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/* 802F8820 48 06 9A 05 */ bl _restgpr_28
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/* 802F8824 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 802F8828 7C 08 03 A6 */ mtlr r0
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/* 802F882C 38 21 00 20 */ addi r1, r1, 0x20
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/* 802F8830 4E 80 00 20 */ blr
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