mirror of https://github.com/zeldaret/tp.git
100 lines
4.2 KiB
ArmAsm
100 lines
4.2 KiB
ArmAsm
lbl_80280808:
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/* 80280808 94 21 FF D0 */ stwu r1, -0x30(r1)
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/* 8028080C 7C 08 02 A6 */ mflr r0
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/* 80280810 90 01 00 34 */ stw r0, 0x34(r1)
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/* 80280814 39 61 00 30 */ addi r11, r1, 0x30
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/* 80280818 48 0E 19 C1 */ bl _savegpr_28
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/* 8028081C 7C 7C 1B 78 */ mr r28, r3
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/* 80280820 7C 9D 23 78 */ mr r29, r4
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/* 80280824 7C BE 2B 78 */ mr r30, r5
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/* 80280828 7C DF 33 78 */ mr r31, r6
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/* 8028082C C0 43 00 20 */ lfs f2, 0x20(r3)
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/* 80280830 C0 23 00 10 */ lfs f1, 0x10(r3)
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/* 80280834 C0 03 00 00 */ lfs f0, 0(r3)
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/* 80280838 D0 01 00 08 */ stfs f0, 8(r1)
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/* 8028083C D0 21 00 0C */ stfs f1, 0xc(r1)
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/* 80280840 D0 41 00 10 */ stfs f2, 0x10(r1)
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/* 80280844 38 61 00 08 */ addi r3, r1, 8
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/* 80280848 48 0C 69 09 */ bl PSVECMag
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/* 8028084C D0 3E 00 00 */ stfs f1, 0(r30)
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/* 80280850 C0 5C 00 24 */ lfs f2, 0x24(r28)
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/* 80280854 C0 3C 00 14 */ lfs f1, 0x14(r28)
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/* 80280858 C0 1C 00 04 */ lfs f0, 4(r28)
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/* 8028085C D0 01 00 08 */ stfs f0, 8(r1)
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/* 80280860 D0 21 00 0C */ stfs f1, 0xc(r1)
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/* 80280864 D0 41 00 10 */ stfs f2, 0x10(r1)
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/* 80280868 38 61 00 08 */ addi r3, r1, 8
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/* 8028086C 48 0C 68 E5 */ bl PSVECMag
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/* 80280870 D0 3E 00 04 */ stfs f1, 4(r30)
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/* 80280874 C0 5C 00 28 */ lfs f2, 0x28(r28)
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/* 80280878 C0 3C 00 18 */ lfs f1, 0x18(r28)
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/* 8028087C C0 1C 00 08 */ lfs f0, 8(r28)
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/* 80280880 D0 01 00 08 */ stfs f0, 8(r1)
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/* 80280884 D0 21 00 0C */ stfs f1, 0xc(r1)
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/* 80280888 D0 41 00 10 */ stfs f2, 0x10(r1)
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/* 8028088C 38 61 00 08 */ addi r3, r1, 8
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/* 80280890 48 0C 68 C1 */ bl PSVECMag
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/* 80280894 D0 3E 00 08 */ stfs f1, 8(r30)
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/* 80280898 7F A3 EB 78 */ mr r3, r29
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/* 8028089C 48 0C 5B E9 */ bl PSMTXIdentity
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/* 802808A0 C0 02 B9 BC */ lfs f0, lit_2238(r2)
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/* 802808A4 C0 3E 00 00 */ lfs f1, 0(r30)
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/* 802808A8 FC 00 08 00 */ fcmpu cr0, f0, f1
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/* 802808AC 41 82 00 30 */ beq lbl_802808DC
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/* 802808B0 C0 02 B9 B8 */ lfs f0, lit_2193(r2)
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/* 802808B4 EC 20 08 24 */ fdivs f1, f0, f1
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/* 802808B8 C0 1C 00 00 */ lfs f0, 0(r28)
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/* 802808BC EC 00 00 72 */ fmuls f0, f0, f1
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/* 802808C0 D0 1D 00 00 */ stfs f0, 0(r29)
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/* 802808C4 C0 1C 00 10 */ lfs f0, 0x10(r28)
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/* 802808C8 EC 00 00 72 */ fmuls f0, f0, f1
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/* 802808CC D0 1D 00 10 */ stfs f0, 0x10(r29)
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/* 802808D0 C0 1C 00 20 */ lfs f0, 0x20(r28)
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/* 802808D4 EC 00 00 72 */ fmuls f0, f0, f1
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/* 802808D8 D0 1D 00 20 */ stfs f0, 0x20(r29)
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lbl_802808DC:
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/* 802808DC C0 02 B9 BC */ lfs f0, lit_2238(r2)
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/* 802808E0 C0 3E 00 04 */ lfs f1, 4(r30)
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/* 802808E4 FC 00 08 00 */ fcmpu cr0, f0, f1
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/* 802808E8 41 82 00 30 */ beq lbl_80280918
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/* 802808EC C0 02 B9 B8 */ lfs f0, lit_2193(r2)
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/* 802808F0 EC 20 08 24 */ fdivs f1, f0, f1
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/* 802808F4 C0 1C 00 04 */ lfs f0, 4(r28)
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/* 802808F8 EC 00 00 72 */ fmuls f0, f0, f1
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/* 802808FC D0 1D 00 04 */ stfs f0, 4(r29)
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/* 80280900 C0 1C 00 14 */ lfs f0, 0x14(r28)
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/* 80280904 EC 00 00 72 */ fmuls f0, f0, f1
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/* 80280908 D0 1D 00 14 */ stfs f0, 0x14(r29)
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/* 8028090C C0 1C 00 24 */ lfs f0, 0x24(r28)
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/* 80280910 EC 00 00 72 */ fmuls f0, f0, f1
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/* 80280914 D0 1D 00 24 */ stfs f0, 0x24(r29)
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lbl_80280918:
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/* 80280918 C0 02 B9 BC */ lfs f0, lit_2238(r2)
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/* 8028091C C0 3E 00 08 */ lfs f1, 8(r30)
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/* 80280920 FC 00 08 00 */ fcmpu cr0, f0, f1
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/* 80280924 41 82 00 30 */ beq lbl_80280954
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/* 80280928 C0 02 B9 B8 */ lfs f0, lit_2193(r2)
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/* 8028092C EC 20 08 24 */ fdivs f1, f0, f1
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/* 80280930 C0 1C 00 08 */ lfs f0, 8(r28)
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/* 80280934 EC 00 00 72 */ fmuls f0, f0, f1
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/* 80280938 D0 1D 00 08 */ stfs f0, 8(r29)
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/* 8028093C C0 1C 00 18 */ lfs f0, 0x18(r28)
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/* 80280940 EC 00 00 72 */ fmuls f0, f0, f1
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/* 80280944 D0 1D 00 18 */ stfs f0, 0x18(r29)
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/* 80280948 C0 1C 00 28 */ lfs f0, 0x28(r28)
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/* 8028094C EC 00 00 72 */ fmuls f0, f0, f1
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/* 80280950 D0 1D 00 28 */ stfs f0, 0x28(r29)
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lbl_80280954:
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/* 80280954 C0 5C 00 2C */ lfs f2, 0x2c(r28)
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/* 80280958 C0 3C 00 1C */ lfs f1, 0x1c(r28)
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/* 8028095C C0 1C 00 0C */ lfs f0, 0xc(r28)
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/* 80280960 D0 1F 00 00 */ stfs f0, 0(r31)
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/* 80280964 D0 3F 00 04 */ stfs f1, 4(r31)
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/* 80280968 D0 5F 00 08 */ stfs f2, 8(r31)
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/* 8028096C 39 61 00 30 */ addi r11, r1, 0x30
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/* 80280970 48 0E 18 B5 */ bl _restgpr_28
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/* 80280974 80 01 00 34 */ lwz r0, 0x34(r1)
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/* 80280978 7C 08 03 A6 */ mtlr r0
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/* 8028097C 38 21 00 30 */ addi r1, r1, 0x30
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/* 80280980 4E 80 00 20 */ blr
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