tp/asm/SSystem/SComponent/c_lib/cLib_addCalcPosXZ2__FP4cXyz...

138 lines
5.7 KiB
ArmAsm

lbl_80270350:
/* 80270350 94 21 FF 90 */ stwu r1, -0x70(r1)
/* 80270354 7C 08 02 A6 */ mflr r0
/* 80270358 90 01 00 74 */ stw r0, 0x74(r1)
/* 8027035C DB E1 00 60 */ stfd f31, 0x60(r1)
/* 80270360 F3 E1 00 68 */ psq_st f31, 104(r1), 0, 0 /* qr0 */
/* 80270364 DB C1 00 50 */ stfd f30, 0x50(r1)
/* 80270368 F3 C1 00 58 */ psq_st f30, 88(r1), 0, 0 /* qr0 */
/* 8027036C 93 E1 00 4C */ stw r31, 0x4c(r1)
/* 80270370 7C 7F 1B 78 */ mr r31, r3
/* 80270374 7C 85 23 78 */ mr r5, r4
/* 80270378 FF C0 08 90 */ fmr f30, f1
/* 8027037C FF E0 10 90 */ fmr f31, f2
/* 80270380 C0 23 00 00 */ lfs f1, 0(r3)
/* 80270384 C0 04 00 00 */ lfs f0, 0(r4)
/* 80270388 FC 01 00 00 */ fcmpu cr0, f1, f0
/* 8027038C 40 82 00 14 */ bne lbl_802703A0
/* 80270390 C0 3F 00 08 */ lfs f1, 8(r31)
/* 80270394 C0 05 00 08 */ lfs f0, 8(r5)
/* 80270398 FC 01 00 00 */ fcmpu cr0, f1, f0
/* 8027039C 41 82 01 80 */ beq lbl_8027051C
lbl_802703A0:
/* 802703A0 38 61 00 24 */ addi r3, r1, 0x24
/* 802703A4 7F E4 FB 78 */ mr r4, r31
/* 802703A8 4B FF 67 8D */ bl __mi__4cXyzCFRC3Vec
/* 802703AC 38 61 00 18 */ addi r3, r1, 0x18
/* 802703B0 38 81 00 24 */ addi r4, r1, 0x24
/* 802703B4 FC 20 F0 90 */ fmr f1, f30
/* 802703B8 4B FF 67 CD */ bl __ml__4cXyzCFf
/* 802703BC C0 41 00 18 */ lfs f2, 0x18(r1)
/* 802703C0 D0 41 00 30 */ stfs f2, 0x30(r1)
/* 802703C4 C0 01 00 1C */ lfs f0, 0x1c(r1)
/* 802703C8 D0 01 00 34 */ stfs f0, 0x34(r1)
/* 802703CC C0 21 00 20 */ lfs f1, 0x20(r1)
/* 802703D0 D0 21 00 38 */ stfs f1, 0x38(r1)
/* 802703D4 D0 41 00 0C */ stfs f2, 0xc(r1)
/* 802703D8 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 802703DC D0 01 00 10 */ stfs f0, 0x10(r1)
/* 802703E0 D0 21 00 14 */ stfs f1, 0x14(r1)
/* 802703E4 38 61 00 0C */ addi r3, r1, 0xc
/* 802703E8 48 0D 6D 51 */ bl PSVECSquareMag
/* 802703EC C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 802703F0 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 802703F4 40 81 00 58 */ ble lbl_8027044C
/* 802703F8 FC 00 08 34 */ frsqrte f0, f1
/* 802703FC C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 80270400 FC 44 00 32 */ fmul f2, f4, f0
/* 80270404 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 80270408 FC 00 00 32 */ fmul f0, f0, f0
/* 8027040C FC 01 00 32 */ fmul f0, f1, f0
/* 80270410 FC 03 00 28 */ fsub f0, f3, f0
/* 80270414 FC 02 00 32 */ fmul f0, f2, f0
/* 80270418 FC 44 00 32 */ fmul f2, f4, f0
/* 8027041C FC 00 00 32 */ fmul f0, f0, f0
/* 80270420 FC 01 00 32 */ fmul f0, f1, f0
/* 80270424 FC 03 00 28 */ fsub f0, f3, f0
/* 80270428 FC 02 00 32 */ fmul f0, f2, f0
/* 8027042C FC 44 00 32 */ fmul f2, f4, f0
/* 80270430 FC 00 00 32 */ fmul f0, f0, f0
/* 80270434 FC 01 00 32 */ fmul f0, f1, f0
/* 80270438 FC 03 00 28 */ fsub f0, f3, f0
/* 8027043C FC 02 00 32 */ fmul f0, f2, f0
/* 80270440 FC 21 00 32 */ fmul f1, f1, f0
/* 80270444 FC 20 08 18 */ frsp f1, f1
/* 80270448 48 00 00 88 */ b lbl_802704D0
lbl_8027044C:
/* 8027044C C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 80270450 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270454 40 80 00 10 */ bge lbl_80270464
/* 80270458 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 8027045C C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
/* 80270460 48 00 00 70 */ b lbl_802704D0
lbl_80270464:
/* 80270464 D0 21 00 08 */ stfs f1, 8(r1)
/* 80270468 80 81 00 08 */ lwz r4, 8(r1)
/* 8027046C 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 80270470 3C 00 7F 80 */ lis r0, 0x7f80
/* 80270474 7C 03 00 00 */ cmpw r3, r0
/* 80270478 41 82 00 14 */ beq lbl_8027048C
/* 8027047C 40 80 00 40 */ bge lbl_802704BC
/* 80270480 2C 03 00 00 */ cmpwi r3, 0
/* 80270484 41 82 00 20 */ beq lbl_802704A4
/* 80270488 48 00 00 34 */ b lbl_802704BC
lbl_8027048C:
/* 8027048C 54 80 02 7F */ clrlwi. r0, r4, 9
/* 80270490 41 82 00 0C */ beq lbl_8027049C
/* 80270494 38 00 00 01 */ li r0, 1
/* 80270498 48 00 00 28 */ b lbl_802704C0
lbl_8027049C:
/* 8027049C 38 00 00 02 */ li r0, 2
/* 802704A0 48 00 00 20 */ b lbl_802704C0
lbl_802704A4:
/* 802704A4 54 80 02 7F */ clrlwi. r0, r4, 9
/* 802704A8 41 82 00 0C */ beq lbl_802704B4
/* 802704AC 38 00 00 05 */ li r0, 5
/* 802704B0 48 00 00 10 */ b lbl_802704C0
lbl_802704B4:
/* 802704B4 38 00 00 03 */ li r0, 3
/* 802704B8 48 00 00 08 */ b lbl_802704C0
lbl_802704BC:
/* 802704BC 38 00 00 04 */ li r0, 4
lbl_802704C0:
/* 802704C0 2C 00 00 01 */ cmpwi r0, 1
/* 802704C4 40 82 00 0C */ bne lbl_802704D0
/* 802704C8 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 802704CC C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
lbl_802704D0:
/* 802704D0 FC 00 0A 10 */ fabs f0, f1
/* 802704D4 FC 40 00 18 */ frsp f2, f0
/* 802704D8 C0 02 B8 00 */ lfs f0, lit_2382(r2)
/* 802704DC FC 02 00 40 */ fcmpo cr0, f2, f0
/* 802704E0 41 80 00 3C */ blt lbl_8027051C
/* 802704E4 FC 01 F8 40 */ fcmpo cr0, f1, f31
/* 802704E8 40 81 00 14 */ ble lbl_802704FC
/* 802704EC 38 61 00 30 */ addi r3, r1, 0x30
/* 802704F0 7C 64 1B 78 */ mr r4, r3
/* 802704F4 EC 3F 08 24 */ fdivs f1, f31, f1
/* 802704F8 48 0D 6B E1 */ bl PSVECScale
lbl_802704FC:
/* 802704FC C0 3F 00 00 */ lfs f1, 0(r31)
/* 80270500 C0 01 00 30 */ lfs f0, 0x30(r1)
/* 80270504 EC 01 00 28 */ fsubs f0, f1, f0
/* 80270508 D0 1F 00 00 */ stfs f0, 0(r31)
/* 8027050C C0 3F 00 08 */ lfs f1, 8(r31)
/* 80270510 C0 01 00 38 */ lfs f0, 0x38(r1)
/* 80270514 EC 01 00 28 */ fsubs f0, f1, f0
/* 80270518 D0 1F 00 08 */ stfs f0, 8(r31)
lbl_8027051C:
/* 8027051C E3 E1 00 68 */ psq_l f31, 104(r1), 0, 0 /* qr0 */
/* 80270520 CB E1 00 60 */ lfd f31, 0x60(r1)
/* 80270524 E3 C1 00 58 */ psq_l f30, 88(r1), 0, 0 /* qr0 */
/* 80270528 CB C1 00 50 */ lfd f30, 0x50(r1)
/* 8027052C 83 E1 00 4C */ lwz r31, 0x4c(r1)
/* 80270530 80 01 00 74 */ lwz r0, 0x74(r1)
/* 80270534 7C 08 03 A6 */ mtlr r0
/* 80270538 38 21 00 70 */ addi r1, r1, 0x70
/* 8027053C 4E 80 00 20 */ blr