tp/asm/d/d_demo/getDemoIDData__13dDemo_acto...

94 lines
4.2 KiB
ArmAsm

lbl_80038338:
/* 80038338 94 21 FF A0 */ stwu r1, -0x60(r1)
/* 8003833C 7C 08 02 A6 */ mflr r0
/* 80038340 90 01 00 64 */ stw r0, 0x64(r1)
/* 80038344 39 61 00 60 */ addi r11, r1, 0x60
/* 80038348 48 32 9E 8D */ bl _savegpr_27
/* 8003834C 7C 9B 23 78 */ mr r27, r4
/* 80038350 7C BC 2B 78 */ mr r28, r5
/* 80038354 7C DD 33 78 */ mr r29, r6
/* 80038358 7C FE 3B 78 */ mr r30, r7
/* 8003835C 7D 1F 43 78 */ mr r31, r8
/* 80038360 80 03 00 50 */ lwz r0, 0x50(r3)
/* 80038364 90 01 00 14 */ stw r0, 0x14(r1)
/* 80038368 38 61 00 14 */ addi r3, r1, 0x14
/* 8003836C 38 81 00 30 */ addi r4, r1, 0x30
/* 80038370 48 25 17 11 */ bl getData__Q47JStudio3stb4data22TParse_TParagraph_dataCFPQ57JStudio3stb4data22TParse_TParagraph_data5TData
/* 80038374 88 0D 88 C8 */ lbz r0, struct_80450E48+0x0(r13)
/* 80038378 7C 00 07 75 */ extsb. r0, r0
/* 8003837C 40 82 00 24 */ bne lbl_800383A0
/* 80038380 38 00 00 00 */ li r0, 0
/* 80038384 90 01 00 0C */ stw r0, 0xc(r1)
/* 80038388 38 61 00 0C */ addi r3, r1, 0xc
/* 8003838C 3C 80 80 42 */ lis r4, dummy@ha /* 0x80424648@ha */
/* 80038390 38 84 46 48 */ addi r4, r4, dummy@l /* 0x80424648@l */
/* 80038394 48 25 16 ED */ bl getData__Q47JStudio3stb4data22TParse_TParagraph_dataCFPQ57JStudio3stb4data22TParse_TParagraph_data5TData
/* 80038398 38 00 00 01 */ li r0, 1
/* 8003839C 98 0D 88 C8 */ stb r0, struct_80450E48+0x0(r13)
lbl_800383A0:
/* 800383A0 88 0D 88 C9 */ lbz r0, struct_80450E48+0x1(r13)
/* 800383A4 7C 00 07 75 */ extsb. r0, r0
/* 800383A8 40 82 00 1C */ bne lbl_800383C4
/* 800383AC 3C 60 80 42 */ lis r3, dummy@ha /* 0x80424648@ha */
/* 800383B0 38 63 46 48 */ addi r3, r3, dummy@l /* 0x80424648@l */
/* 800383B4 80 03 00 0C */ lwz r0, 0xc(r3)
/* 800383B8 90 0D 88 CC */ stw r0, it(r13)
/* 800383BC 38 00 00 01 */ li r0, 1
/* 800383C0 98 0D 88 C9 */ stb r0, struct_80450E48+0x1(r13)
lbl_800383C4:
/* 800383C4 80 A1 00 3C */ lwz r5, 0x3c(r1)
/* 800383C8 90 A1 00 10 */ stw r5, 0x10(r1)
/* 800383CC 80 01 00 38 */ lwz r0, 0x38(r1)
/* 800383D0 54 00 10 3A */ slwi r0, r0, 2
/* 800383D4 7C 05 02 14 */ add r0, r5, r0
/* 800383D8 90 01 00 10 */ stw r0, 0x10(r1)
/* 800383DC 90 01 00 24 */ stw r0, 0x24(r1)
/* 800383E0 90 01 00 28 */ stw r0, 0x28(r1)
/* 800383E4 80 8D 88 CC */ lwz r4, it(r13)
/* 800383E8 90 81 00 08 */ stw r4, 8(r1)
/* 800383EC 90 81 00 2C */ stw r4, 0x2c(r1)
/* 800383F0 7C 04 00 40 */ cmplw r4, r0
/* 800383F4 40 82 00 1C */ bne lbl_80038410
/* 800383F8 3C 60 80 42 */ lis r3, dummy@ha /* 0x80424648@ha */
/* 800383FC 38 63 46 48 */ addi r3, r3, dummy@l /* 0x80424648@l */
/* 80038400 80 03 00 0C */ lwz r0, 0xc(r3)
/* 80038404 90 0D 88 CC */ stw r0, it(r13)
/* 80038408 38 60 00 00 */ li r3, 0
/* 8003840C 48 00 00 6C */ b lbl_80038478
lbl_80038410:
/* 80038410 3C 60 80 42 */ lis r3, dummy@ha /* 0x80424648@ha */
/* 80038414 38 63 46 48 */ addi r3, r3, dummy@l /* 0x80424648@l */
/* 80038418 80 03 00 0C */ lwz r0, 0xc(r3)
/* 8003841C 90 01 00 18 */ stw r0, 0x18(r1)
/* 80038420 90 01 00 1C */ stw r0, 0x1c(r1)
/* 80038424 90 81 00 20 */ stw r4, 0x20(r1)
/* 80038428 7C 04 00 40 */ cmplw r4, r0
/* 8003842C 40 82 00 08 */ bne lbl_80038434
/* 80038430 90 AD 88 CC */ stw r5, it(r13)
lbl_80038434:
/* 80038434 80 6D 88 CC */ lwz r3, it(r13)
/* 80038438 80 63 00 00 */ lwz r3, 0(r3)
/* 8003843C 54 60 17 BE */ srwi r0, r3, 0x1e
/* 80038440 90 1B 00 00 */ stw r0, 0(r27)
/* 80038444 54 60 47 3E */ rlwinm r0, r3, 8, 0x1c, 0x1f
/* 80038448 90 1C 00 00 */ stw r0, 0(r28)
/* 8003844C 54 60 87 3E */ rlwinm r0, r3, 0x10, 0x1c, 0x1f
/* 80038450 90 1D 00 00 */ stw r0, 0(r29)
/* 80038454 B0 7E 00 00 */ sth r3, 0(r30)
/* 80038458 28 1F 00 00 */ cmplwi r31, 0
/* 8003845C 41 82 00 0C */ beq lbl_80038468
/* 80038460 54 60 4F FE */ rlwinm r0, r3, 9, 0x1f, 0x1f
/* 80038464 98 1F 00 00 */ stb r0, 0(r31)
lbl_80038468:
/* 80038468 80 6D 88 CC */ lwz r3, it(r13)
/* 8003846C 38 03 00 04 */ addi r0, r3, 4
/* 80038470 90 0D 88 CC */ stw r0, it(r13)
/* 80038474 38 60 00 01 */ li r3, 1
lbl_80038478:
/* 80038478 39 61 00 60 */ addi r11, r1, 0x60
/* 8003847C 48 32 9D A5 */ bl _restgpr_27
/* 80038480 80 01 00 64 */ lwz r0, 0x64(r1)
/* 80038484 7C 08 03 A6 */ mtlr r0
/* 80038488 38 21 00 60 */ addi r1, r1, 0x60
/* 8003848C 4E 80 00 20 */ blr