mirror of https://github.com/zeldaret/tp.git
71 lines
2.9 KiB
ArmAsm
71 lines
2.9 KiB
ArmAsm
lbl_80255658:
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/* 80255658 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 8025565C 7C 87 07 34 */ extsh r7, r4
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/* 80255660 7C A3 07 34 */ extsh r3, r5
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/* 80255664 7C 07 18 00 */ cmpw r7, r3
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/* 80255668 41 81 00 0C */ bgt lbl_80255674
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/* 8025566C C0 22 B4 B8 */ lfs f1, lit_3692(r2)
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/* 80255670 48 00 00 E0 */ b lbl_80255750
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lbl_80255674:
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/* 80255674 54 C0 06 3E */ clrlwi r0, r6, 0x18
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/* 80255678 2C 00 00 02 */ cmpwi r0, 2
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/* 8025567C 41 82 00 54 */ beq lbl_802556D0
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/* 80255680 40 80 00 94 */ bge lbl_80255714
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/* 80255684 2C 00 00 01 */ cmpwi r0, 1
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/* 80255688 40 80 00 08 */ bge lbl_80255690
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/* 8025568C 48 00 00 88 */ b lbl_80255714
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lbl_80255690:
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/* 80255690 7C 03 19 D6 */ mullw r0, r3, r3
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/* 80255694 C8 42 B4 C0 */ lfd f2, lit_3694(r2)
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/* 80255698 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 8025569C 90 01 00 0C */ stw r0, 0xc(r1)
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/* 802556A0 3C 60 43 30 */ lis r3, 0x4330
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/* 802556A4 90 61 00 08 */ stw r3, 8(r1)
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/* 802556A8 C8 01 00 08 */ lfd f0, 8(r1)
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/* 802556AC EC 20 10 28 */ fsubs f1, f0, f2
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/* 802556B0 7C 07 39 D6 */ mullw r0, r7, r7
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/* 802556B4 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 802556B8 90 01 00 14 */ stw r0, 0x14(r1)
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/* 802556BC 90 61 00 10 */ stw r3, 0x10(r1)
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/* 802556C0 C8 01 00 10 */ lfd f0, 0x10(r1)
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/* 802556C4 EC 00 10 28 */ fsubs f0, f0, f2
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/* 802556C8 EC 21 00 24 */ fdivs f1, f1, f0
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/* 802556CC 48 00 00 84 */ b lbl_80255750
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lbl_802556D0:
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/* 802556D0 7C 03 38 50 */ subf r0, r3, r7
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/* 802556D4 7C 00 01 D6 */ mullw r0, r0, r0
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/* 802556D8 C8 42 B4 C0 */ lfd f2, lit_3694(r2)
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/* 802556DC 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 802556E0 90 01 00 14 */ stw r0, 0x14(r1)
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/* 802556E4 3C 60 43 30 */ lis r3, 0x4330
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/* 802556E8 90 61 00 10 */ stw r3, 0x10(r1)
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/* 802556EC C8 01 00 10 */ lfd f0, 0x10(r1)
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/* 802556F0 EC 20 10 28 */ fsubs f1, f0, f2
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/* 802556F4 7C 07 39 D6 */ mullw r0, r7, r7
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/* 802556F8 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 802556FC 90 01 00 0C */ stw r0, 0xc(r1)
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/* 80255700 90 61 00 08 */ stw r3, 8(r1)
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/* 80255704 C8 01 00 08 */ lfd f0, 8(r1)
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/* 80255708 EC 00 10 28 */ fsubs f0, f0, f2
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/* 8025570C EC 21 00 24 */ fdivs f1, f1, f0
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/* 80255710 48 00 00 40 */ b lbl_80255750
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lbl_80255714:
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/* 80255714 7C A0 07 34 */ extsh r0, r5
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/* 80255718 C8 42 B4 C0 */ lfd f2, lit_3694(r2)
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/* 8025571C 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 80255720 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80255724 3C 60 43 30 */ lis r3, 0x4330
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/* 80255728 90 61 00 10 */ stw r3, 0x10(r1)
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/* 8025572C C8 01 00 10 */ lfd f0, 0x10(r1)
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/* 80255730 EC 20 10 28 */ fsubs f1, f0, f2
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/* 80255734 7C 80 07 34 */ extsh r0, r4
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/* 80255738 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 8025573C 90 01 00 0C */ stw r0, 0xc(r1)
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/* 80255740 90 61 00 08 */ stw r3, 8(r1)
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/* 80255744 C8 01 00 08 */ lfd f0, 8(r1)
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/* 80255748 EC 00 10 28 */ fsubs f0, f0, f2
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/* 8025574C EC 21 00 24 */ fdivs f1, f1, f0
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lbl_80255750:
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/* 80255750 38 21 00 20 */ addi r1, r1, 0x20
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/* 80255754 4E 80 00 20 */ blr
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