mirror of https://github.com/zeldaret/tp.git
55 lines
2.3 KiB
ArmAsm
55 lines
2.3 KiB
ArmAsm
lbl_803472C8:
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/* 803472C8 7C 08 02 A6 */ mflr r0
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/* 803472CC 90 01 00 04 */ stw r0, 4(r1)
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/* 803472D0 94 21 FF C8 */ stwu r1, -0x38(r1)
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/* 803472D4 93 E1 00 34 */ stw r31, 0x34(r1)
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/* 803472D8 93 C1 00 30 */ stw r30, 0x30(r1)
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/* 803472DC 7C 9E 23 78 */ mr r30, r4
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/* 803472E0 7C BF 2B 78 */ mr r31, r5
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/* 803472E4 C0 03 00 00 */ lfs f0, 0(r3)
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/* 803472E8 FC 00 00 50 */ fneg f0, f0
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/* 803472EC D0 01 00 20 */ stfs f0, 0x20(r1)
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/* 803472F0 C0 03 00 04 */ lfs f0, 4(r3)
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/* 803472F4 FC 00 00 50 */ fneg f0, f0
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/* 803472F8 D0 01 00 24 */ stfs f0, 0x24(r1)
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/* 803472FC C0 03 00 08 */ lfs f0, 8(r3)
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/* 80347300 38 61 00 20 */ addi r3, r1, 0x20
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/* 80347304 7C 64 1B 78 */ mr r4, r3
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/* 80347308 FC 00 00 50 */ fneg f0, f0
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/* 8034730C D0 01 00 28 */ stfs f0, 0x28(r1)
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/* 80347310 4B FF FD E5 */ bl PSVECNormalize
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/* 80347314 7F C3 F3 78 */ mr r3, r30
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/* 80347318 38 81 00 14 */ addi r4, r1, 0x14
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/* 8034731C 4B FF FD D9 */ bl PSVECNormalize
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/* 80347320 38 61 00 20 */ addi r3, r1, 0x20
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/* 80347324 38 81 00 14 */ addi r4, r1, 0x14
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/* 80347328 4B FF FE 6D */ bl PSVECDotProduct
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/* 8034732C C0 62 CB 4C */ lfs f3, lit_161(r2)
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/* 80347330 7F E3 FB 78 */ mr r3, r31
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/* 80347334 C0 41 00 14 */ lfs f2, 0x14(r1)
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/* 80347338 7F E4 FB 78 */ mr r4, r31
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/* 8034733C C0 01 00 20 */ lfs f0, 0x20(r1)
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/* 80347340 EC 43 00 B2 */ fmuls f2, f3, f2
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/* 80347344 EC 42 00 72 */ fmuls f2, f2, f1
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/* 80347348 EC 02 00 28 */ fsubs f0, f2, f0
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/* 8034734C D0 1F 00 00 */ stfs f0, 0(r31)
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/* 80347350 C0 41 00 18 */ lfs f2, 0x18(r1)
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/* 80347354 C0 01 00 24 */ lfs f0, 0x24(r1)
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/* 80347358 EC 43 00 B2 */ fmuls f2, f3, f2
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/* 8034735C EC 42 00 72 */ fmuls f2, f2, f1
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/* 80347360 EC 02 00 28 */ fsubs f0, f2, f0
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/* 80347364 D0 1F 00 04 */ stfs f0, 4(r31)
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/* 80347368 C0 41 00 1C */ lfs f2, 0x1c(r1)
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/* 8034736C C0 01 00 28 */ lfs f0, 0x28(r1)
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/* 80347370 EC 43 00 B2 */ fmuls f2, f3, f2
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/* 80347374 EC 22 00 72 */ fmuls f1, f2, f1
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/* 80347378 EC 01 00 28 */ fsubs f0, f1, f0
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/* 8034737C D0 1F 00 08 */ stfs f0, 8(r31)
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/* 80347380 4B FF FD 75 */ bl PSVECNormalize
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/* 80347384 80 01 00 3C */ lwz r0, 0x3c(r1)
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/* 80347388 83 E1 00 34 */ lwz r31, 0x34(r1)
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/* 8034738C 83 C1 00 30 */ lwz r30, 0x30(r1)
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/* 80347390 38 21 00 38 */ addi r1, r1, 0x38
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/* 80347394 7C 08 03 A6 */ mtlr r0
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/* 80347398 4E 80 00 20 */ blr
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