mirror of https://github.com/zeldaret/tp.git
525 lines
17 KiB
C
525 lines
17 KiB
C
#ifndef _REVOLUTION_GD_GEOMETRY_H_
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#define _REVOLUTION_GD_GEOMETRY_H_
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#include <revolution/gx/GXStruct.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Command processor register IDs
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#define CP_REG_MTXIDXA_ID 0x30 // Matrix index A
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#define CP_REG_MTXIDXB_ID 0x40 // Matrix index B
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#define CP_REG_VCD_LO_ID 0x50 // Vertex descriptor (lo)
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#define CP_REG_VCD_HI_ID 0x60 // Vertex descriptor (hi)
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#define CP_REG_VAT_GRP0_ID 0x70 // Vertex attribute table (group 0)
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#define CP_REG_VAT_GRP1_ID 0x80 // Vertex attribute table (group 1)
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#define CP_REG_VAT_GRP2_ID 0x90 // Vertex attribute table (group 2)
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#define CP_REG_ARRAYBASE_ID 0xA0 // Vertex array start/base
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#define CP_REG_ARRAYSTRIDE_ID 0xB0 // Vertex array stride
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// XF locators for textures
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// Projection type [30-30]
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#define GX_XF_TEX_PROJTYPE_ST 30
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#define GX_XF_TEX_PROJTYPE_END 30
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// Input format [29-29]
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#define GX_XF_TEX_INPUTFORM_ST 29
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#define GX_XF_TEX_INPUTFORM_END 29
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// Texture gen type [25-27]
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#define GX_XF_TEX_TEXGENTYPE_ST 25
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#define GX_XF_TEX_TEXGENTYPE_END 27
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// Source row [20-24]
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#define GX_XF_TEX_SRCROW_ST 20
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#define GX_XF_TEX_SRCROW_END 24
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// Bump source texture [17-19]
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#define GX_XF_TEX_BUMPSRCTEX_ST 17
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#define GX_XF_TEX_BUMPSRCTEX_END 19
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// Bump source light [14-16]
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#define GX_XF_TEX_BUMPSRCLIGHT_ST 14
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#define GX_XF_TEX_BUMPSRCLIGHT_END 16
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// Blitting processor registers.
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#define GX_BP_REG_GENMODE 0x0 // gen mode
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// display copy filters
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#define GX_BP_REG_DISPCOPYFILTER0 0x1 // display copy filter 0
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#define GX_BP_REG_DISPCOPYFILTER1 0x2 // display copy filter 1
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#define GX_BP_REG_DISPCOPYFILTER2 0x3 // display copy filter 2
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#define GX_BP_REG_DISPCOPYFILTER3 0x4 // display copy filter 3
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// indirect matrices
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#define GX_BP_REG_INDMTX0A 0x6 // indirect matrix 0A
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#define GX_BP_REG_INDMTX0B 0x7 // indirect matrix 0B
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#define GX_BP_REG_INDMTX0C 0x8 // indirect matrix 0C
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#define GX_BP_REG_INDMTX1A 0x9 // indirect matrix 1A
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#define GX_BP_REG_INDMTX1B 0xA // indirect matrix 1B
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#define GX_BP_REG_INDMTX1C 0xB // indirect matrix 1C
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#define GX_BP_REG_INDMTX2A 0xC // indirect matrix 2A
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#define GX_BP_REG_INDMTX2B 0xD // indirect matrix 2B
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#define GX_BP_REG_INDMTX2C 0xE // indirect matrix 2C
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#define GX_BP_REG_INDIMASK 0xF // indirect mask
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// indirect TEV stages
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#define GX_BP_REG_INDTEVSTAGE0 0x10 // indirect TEV stage 0
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#define GX_BP_REG_INDTEVSTAGE1 0x11 // indirect TEV stage 1
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#define GX_BP_REG_INDTEVSTAGE2 0x12 // indirect TEV stage 2
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#define GX_BP_REG_INDTEVSTAGE3 0x13 // indirect TEV stage 3
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#define GX_BP_REG_INDTEVSTAGE4 0x14 // indirect TEV stage 4
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#define GX_BP_REG_INDTEVSTAGE5 0x15 // indirect TEV stage 5
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#define GX_BP_REG_INDTEVSTAGE6 0x16 // indirect TEV stage 6
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#define GX_BP_REG_INDTEVSTAGE7 0x17 // indirect TEV stage 7
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#define GX_BP_REG_INDTEVSTAGE8 0x18 // indirect TEV stage 8
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#define GX_BP_REG_INDTEVSTAGE9 0x19 // indirect TEV stage 9
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#define GX_BP_REG_INDTEVSTAGE10 0x1A // indirect TEV stage 10
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#define GX_BP_REG_INDTEVSTAGE11 0x1B // indirect TEV stage 11
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#define GX_BP_REG_INDTEVSTAGE12 0x1C // indirect TEV stage 12
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#define GX_BP_REG_INDTEVSTAGE13 0x1D // indirect TEV stage 13
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#define GX_BP_REG_INDTEVSTAGE14 0x1E // indirect TEV stage 14
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#define GX_BP_REG_INDTEVSTAGE15 0x1F // indirect TEV stage 15
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// performance manips
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#define GX_BP_REG_SCISSORTL 0x20 // scissor top left
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#define GX_BP_REG_SCISSORBR 0x21 // scissor bottom right
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#define GX_BP_REG_LINEPTWIDTH 0x22 // line point width
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#define GX_BP_REG_PERF0TRI 0x23 // performance 0 (triangle)
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#define GX_BP_REG_PERF0QUAD 0x24 // performance 0 (quad)
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// rasters
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#define GX_BP_REG_RAS1_SS0 0x25
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#define GX_BP_REG_RAS1_SS1 0x26
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#define GX_BP_REG_RAS1_IREF 0x27
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#define GX_BP_REG_RAS1_TREF0 0x28
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#define GX_BP_REG_RAS1_TREF1 0x29
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#define GX_BP_REG_RAS1_TREF2 0x2A
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#define GX_BP_REG_RAS1_TREF3 0x2B
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#define GX_BP_REG_RAS1_TREF4 0x2C
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#define GX_BP_REG_RAS1_TREF5 0x2D
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#define GX_BP_REG_RAS1_TREF6 0x2E
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#define GX_BP_REG_RAS1_TREF7 0x2F
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// setup sizes
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#define GX_BP_REG_SU_SSIZE0 0x30
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#define GX_BP_REG_SU_TSIZE0 0x31
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#define GX_BP_REG_SU_SSIZE1 0x32
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#define GX_BP_REG_SU_TSIZE1 0x33
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#define GX_BP_REG_SU_SSIZE2 0x34
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#define GX_BP_REG_SU_TSIZE2 0x35
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#define GX_BP_REG_SU_SSIZE3 0x36
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#define GX_BP_REG_SU_TSIZE3 0x37
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#define GX_BP_REG_SU_SSIZE4 0x38
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#define GX_BP_REG_SU_TSIZE4 0x39
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#define GX_BP_REG_SU_SSIZE5 0x3A
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#define GX_BP_REG_SU_TSIZE5 0x3B
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#define GX_BP_REG_SU_SSIZE6 0x3C
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#define GX_BP_REG_SU_TSIZE6 0x3D
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#define GX_BP_REG_SU_SSIZE7 0x3E
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#define GX_BP_REG_SU_TSIZE7 0x3F
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// Z and blend controls
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#define GX_BP_REG_ZMODE 0x40
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#define GX_BP_REG_BLENDMODE 0x41
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#define GX_BP_REG_DSTALPHA 0x42
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#define GX_BP_REG_ZCONTROL 0x43
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#define GX_BP_REG_FIELDMASK 0x44
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#define GX_BP_REG_DRAWDONE 0x45
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#define GX_BP_REG_PETOKEN 0x47
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#define GX_BP_REG_PETOKENINT 0x48
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// copying
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#define GX_BP_REG_TEXCOPYSRCXY 0x49
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#define GX_BP_REG_TEXCOPYSRCWH 0x4A
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#define GX_BP_REG_TEXCOPYDST 0x4B
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#define GX_BP_REG_DISPCOPYSTRIDE 0x4D
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#define GX_BP_REG_DISPCOPYSCALEY 0x4E
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#define GX_BP_REG_COPYCLEARAR 0x4F
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#define GX_BP_REG_COPYCLEARGB 0x50
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#define GX_BP_REG_COPYCLEARZ 0x51
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#define GX_BP_REG_COPYFILTER0 0x53
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#define GX_BP_REG_COPYFILTER1 0x54
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//
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#define GX_BP_REG_BOUNDINGBOX0 0x55
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#define GX_BP_REG_BOUNDINGBOX1 0x56
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#define GX_BP_REG_SCISSOROFFSET 0x59
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// texture memory
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#define GX_BP_REG_TMEMPRELOADADDR 0x60
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#define GX_BP_REG_TMEMPRELOADEVEN 0x61
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#define GX_BP_REG_TMEMPRELOADODD 0x62
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#define GX_BP_REG_TMEMPRELOADMODE 0x63
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#define GX_BP_REG_TMEMTLUTSRC 0x64
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#define GX_BP_REG_TMEMTLUTDST 0x65
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#define GX_BP_REG_TMEMTEXINVALIDATE 0x66
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// performance 1
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#define GX_BP_REG_PERF1 0x67
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#define GX_BP_REG_FIELDMODE 0x68
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// set modes
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#define GX_BP_REG_SETMODE0_TEX0 0x80
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#define GX_BP_REG_SETMODE0_TEX1 0x81
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#define GX_BP_REG_SETMODE0_TEX2 0x82
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#define GX_BP_REG_SETMODE0_TEX3 0x83
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#define GX_BP_REG_SETMODE1_TEX0 0x84
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#define GX_BP_REG_SETMODE1_TEX1 0x85
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#define GX_BP_REG_SETMODE1_TEX2 0x86
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#define GX_BP_REG_SETMODE1_TEX3 0x87
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// set images
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#define GX_BP_REG_SETIMAGE0_TEX0 0x88
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#define GX_BP_REG_SETIMAGE0_TEX1 0x89
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#define GX_BP_REG_SETIMAGE0_TEX2 0x8A
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#define GX_BP_REG_SETIMAGE0_TEX3 0x8B
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#define GX_BP_REG_SETIMAGE1_TEX0 0x8C
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#define GX_BP_REG_SETIMAGE1_TEX1 0x8D
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#define GX_BP_REG_SETIMAGE1_TEX2 0x8E
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#define GX_BP_REG_SETIMAGE1_TEX3 0x8F
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#define GX_BP_REG_SETIMAGE2_TEX0 0x90
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#define GX_BP_REG_SETIMAGE2_TEX1 0x91
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#define GX_BP_REG_SETIMAGE2_TEX2 0x92
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#define GX_BP_REG_SETIMAGE2_TEX3 0x93
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#define GX_BP_REG_SETIMAGE3_TEX0 0x94
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#define GX_BP_REG_SETIMAGE3_TEX1 0x95
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#define GX_BP_REG_SETIMAGE3_TEX2 0x96
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#define GX_BP_REG_SETIMAGE3_TEX3 0x97
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// set texture lookups
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#define GX_BP_REG_SETTLUT_TEX0 0x98
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#define GX_BP_REG_SETTLUT_TEX1 0x99
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#define GX_BP_REG_SETTLUT_TEX2 0x9A
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#define GX_BP_REG_SETTLUT_TEX3 0x9B
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// set modes continued
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#define GX_BP_REG_SETMODE0_TEX4 0xA0
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#define GX_BP_REG_SETMODE0_TEX5 0xA1
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#define GX_BP_REG_SETMODE0_TEX6 0xA2
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#define GX_BP_REG_SETMODE0_TEX7 0xA3
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#define GX_BP_REG_SETMODE1_TEX4 0xA4
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#define GX_BP_REG_SETMODE1_TEX5 0xA5
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#define GX_BP_REG_SETMODE1_TEX6 0xA6
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#define GX_BP_REG_SETMODE1_TEX7 0xA7
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// set images continued
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#define GX_BP_REG_SETIMAGE0_TEX4 0xA8
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#define GX_BP_REG_SETIMAGE0_TEX5 0xA9
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#define GX_BP_REG_SETIMAGE0_TEX6 0xAA
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#define GX_BP_REG_SETIMAGE0_TEX7 0xAB
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#define GX_BP_REG_SETIMAGE1_TEX4 0xAC
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#define GX_BP_REG_SETIMAGE1_TEX5 0xAD
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#define GX_BP_REG_SETIMAGE1_TEX6 0xAE
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#define GX_BP_REG_SETIMAGE1_TEX7 0xAF
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#define GX_BP_REG_SETIMAGE2_TEX4 0xB0
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#define GX_BP_REG_SETIMAGE2_TEX5 0xB1
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#define GX_BP_REG_SETIMAGE2_TEX6 0xB2
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#define GX_BP_REG_SETIMAGE2_TEX7 0xB3
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#define GX_BP_REG_SETIMAGE3_TEX4 0xB4
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#define GX_BP_REG_SETIMAGE3_TEX5 0xB5
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#define GX_BP_REG_SETIMAGE3_TEX6 0xB6
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#define GX_BP_REG_SETIMAGE3_TEX7 0xB7
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// set texture lookups continued
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#define GX_BP_REG_SETTLUT_TEX4 0xB8
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#define GX_BP_REG_SETTLUT_TEX5 0xB9
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#define GX_BP_REG_SETTLUT_TEX6 0xBA
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#define GX_BP_REG_SETTLUT_TEX7 0xBB
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// TEV color manips
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#define GX_BP_REG_TEVCOLORCOMBINER0 0xC0
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#define GX_BP_REG_TEVALPHACOMBINER0 0xC1
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#define GX_BP_REG_TEVCOLORCOMBINER1 0xC2
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#define GX_BP_REG_TEVALPHACOMBINER1 0xC3
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#define GX_BP_REG_TEVCOLORCOMBINER2 0xC4
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#define GX_BP_REG_TEVALPHACOMBINER2 0xC5
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#define GX_BP_REG_TEVCOLORCOMBINER3 0xC6
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#define GX_BP_REG_TEVALPHACOMBINER3 0xC7
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#define GX_BP_REG_TEVCOLORCOMBINER4 0xC8
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#define GX_BP_REG_TEVALPHACOMBINER4 0xC9
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#define GX_BP_REG_TEVCOLORCOMBINER5 0xCA
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#define GX_BP_REG_TEVALPHACOMBINER5 0xCB
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#define GX_BP_REG_TEVCOLORCOMBINER6 0xCC
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#define GX_BP_REG_TEVALPHACOMBINER6 0xCD
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#define GX_BP_REG_TEVCOLORCOMBINER7 0xCE
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#define GX_BP_REG_TEVALPHACOMBINER7 0xCF
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#define GX_BP_REG_TEVCOLORCOMBINER8 0xD0
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#define GX_BP_REG_TEVALPHACOMBINER8 0xD1
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#define GX_BP_REG_TEVCOLORCOMBINER9 0xD2
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#define GX_BP_REG_TEVALPHACOMBINER9 0xD3
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#define GX_BP_REG_TEVCOLORCOMBINER10 0xD4
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#define GX_BP_REG_TEVALPHACOMBINER10 0xD5
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#define GX_BP_REG_TEVCOLORCOMBINER11 0xD6
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#define GX_BP_REG_TEVALPHACOMBINER11 0xD7
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#define GX_BP_REG_TEVCOLORCOMBINER12 0xD8
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#define GX_BP_REG_TEVALPHACOMBINER12 0xD9
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#define GX_BP_REG_TEVCOLORCOMBINER13 0xDA
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#define GX_BP_REG_TEVALPHACOMBINER13 0xDB
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#define GX_BP_REG_TEVCOLORCOMBINER14 0xDC
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#define GX_BP_REG_TEVALPHACOMBINER14 0xDD
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#define GX_BP_REG_TEVCOLORCOMBINER15 0xDE
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#define GX_BP_REG_TEVALPHACOMBINER15 0xDF
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// TEV registers
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#define GX_BP_REG_TEVREG0LO 0xE0
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#define GX_BP_REG_TEVREG0HI 0xE1
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#define GX_BP_REG_TEVREG1LO 0xE2
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#define GX_BP_REG_TEVREG1HI 0xE3
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#define GX_BP_REG_TEVREG2LO 0xE4
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#define GX_BP_REG_TEVREG2HI 0xE5
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#define GX_BP_REG_TEVREG3LO 0xE6
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#define GX_BP_REG_TEVREG3HI 0xE7
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// fog registers
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#define GX_BP_REG_FOGRANGE 0xE8
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#define GX_BP_REG_FOGRANGEK0 0xE9
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#define GX_BP_REG_FOGRANGEK1 0xEA
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#define GX_BP_REG_FOGRANGEK2 0xEB
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#define GX_BP_REG_FOGRANGEK3 0xEC
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#define GX_BP_REG_FOGRANGEK4 0xED
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#define GX_BP_REG_FOGPARAM0 0xEE
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#define GX_BP_REG_FOGPARAM1 0xEF
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#define GX_BP_REG_FOGPARAM2 0xF0
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#define GX_BP_REG_FOGPARAM3 0xF1
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#define GX_BP_REG_FOGCOLOR 0xF2
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// performance manip registers
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#define GX_BP_REG_ALPHACOMPARE 0xF3
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#define GX_BP_REG_ZTEXTURE0 0xF4
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#define GX_BP_REG_ZTEXTURE1 0xF5
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// TEV K selectors
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#define GX_BP_REG_TEVKSEL0 0xF6
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#define GX_BP_REG_TEVKSEL1 0xF7
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#define GX_BP_REG_TEVKSEL2 0xF8
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#define GX_BP_REG_TEVKSEL3 0xF9
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#define GX_BP_REG_TEVKSEL4 0xFA
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#define GX_BP_REG_TEVKSEL5 0xFB
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#define GX_BP_REG_TEVKSEL6 0xFC
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#define GX_BP_REG_TEVKSEL7 0xFD
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// SS mask
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#define GX_BP_REG_SSMASK 0xFE
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// Transform Unit Registers
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#define GX_XF_REG_ERROR 0x1000
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#define GX_XF_REG_DIAGNOSTICS 0x1001
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#define GX_XF_REG_STATE0 0x1002
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#define GX_XF_REG_STATE1 0x1003
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#define GX_XF_REG_CLOCK 0x1004
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#define GX_XF_REG_CLIPDISABLE 0x1005
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#define GX_XF_REG_PERF0 0x1006
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#define GX_XF_REG_PERF1 0x1007
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#define GX_XF_REG_INVERTEXSPEC 0x1008
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#define GX_XF_REG_NUMCOLORS 0x1009
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#define GX_XF_REG_AMBIENT0 0x100A
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#define GX_XF_REG_AMBIENT1 0x100B
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#define GX_XF_REG_MATERIAL0 0x100C
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#define GX_XF_REG_MATERIAL1 0x100D
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#define GX_XF_REG_COLOR0CNTRL 0x100E
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#define GX_XF_REG_COLOR1CNTRL 0x100F
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#define GX_XF_REG_ALPHA0CNTRL 0x1010
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#define GX_XF_REG_ALPHA1CNTRL 0x1011
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#define GX_XF_REG_DUALTEXTRAN 0x1012
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#define GX_XF_REG_MATRIXINDEX0 0x1018
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#define GX_XF_REG_MATRIXINDEX1 0x1019
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#define GX_XF_REG_SCALEX 0x101A
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#define GX_XF_REG_SCALEY 0x101B
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#define GX_XF_REG_SCALEZ 0x101C
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#define GX_XF_REG_OFFSETX 0x101D
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#define GX_XF_REG_OFFSETY 0x101E
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#define GX_XF_REG_OFFSETZ 0x101F
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#define GX_XF_REG_PROJECTIONA 0x1020
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#define GX_XF_REG_PROJECTIONB 0x1021
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#define GX_XF_REG_PROJECTIONC 0x1022
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#define GX_XF_REG_PROJECTIOND 0x1023
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#define GX_XF_REG_PROJECTIONE 0x1024
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#define GX_XF_REG_PROJECTIONF 0x1025
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#define GX_XF_REG_PROJECTORTHO 0x1026
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#define GX_XF_REG_NUMTEX 0x103F
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#define GX_XF_REG_TEX0 0x1040
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#define GX_XF_REG_TEX1 0x1041
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#define GX_XF_REG_TEX2 0x1042
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#define GX_XF_REG_TEX3 0x1043
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#define GX_XF_REG_TEX4 0x1044
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#define GX_XF_REG_TEX5 0x1045
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#define GX_XF_REG_TEX6 0x1046
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#define GX_XF_REG_TEX7 0x1047
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#define GX_XF_REG_DUALTEX0 0x1050
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#define GX_XF_REG_DUALTEX1 0x1051
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#define GX_XF_REG_DUALTEX2 0x1052
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#define GX_XF_REG_DUALTEX3 0x1053
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#define GX_XF_REG_DUALTEX4 0x1054
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#define GX_XF_REG_DUALTEX5 0x1055
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#define GX_XF_REG_DUALTEX6 0x1056
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#define GX_XF_REG_DUALTEX7 0x1057
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#define CP_REG_VCD_LO(pnMtxIdx, txMtxIdxMask, posn, norm, col0, col1) \
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( \
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(pnMtxIdx) << 0 | \
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(txMtxIdxMask) << 1 | \
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(posn) << 9 | \
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(norm) << 11 | \
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(col0) << 13 | \
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(col1) << 15 \
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)
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#define CP_REG_VCD_HI(tex0, tex1, tex2, tex3, tex4, tex5, tex6, tex7) \
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( \
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(tex0) << 0 | \
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(tex1) << 2 | \
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(tex2) << 4 | \
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(tex3) << 6 | \
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(tex4) << 8 | \
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(tex5) << 10 | \
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(tex6) << 12 | \
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(tex7) << 14 \
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)
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#define CP_REG_VAT_GRP0(posCnt, posType, posFrac, nrmCnt, nrmType, c0Cnt, c0Type, c1Cnt, c1Type, tx0Cnt, tx0Type, tx0Frac, p12, nrmIdx3) \
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( \
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(posCnt) << 0 | \
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(posType) << 1 | \
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(posFrac) << 4 | \
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(nrmCnt) << 9 | \
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(nrmType) << 10 | \
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(c0Cnt) << 13 | \
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(c0Type) << 14 | \
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(c1Cnt) << 17 | \
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(c1Type) << 18 | \
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(tx0Cnt) << 21 | \
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(tx0Type) << 22 | \
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(tx0Frac) << 25 | \
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(p12) << 30 | \
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(nrmIdx3) << 31 \
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)
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#define CP_REG_VAT_GRP1(tx1Cnt, tx1Type, tx1Frac, tx2Cnt, tx2Type, tx2Frac, tx3Cnt, tx3Type, tx3Frac, tx4Cnt, tx4Type, p11) \
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( \
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(tx1Cnt) << 0 | \
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(tx1Type) << 1 | \
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(tx1Frac) << 4 | \
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(tx2Cnt) << 9 | \
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(tx2Type) << 10 | \
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(tx2Frac) << 13 | \
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(tx3Cnt) << 18 | \
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(tx3Type) << 19 | \
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(tx3Frac) << 22 | \
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(tx4Cnt) << 27 | \
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(tx4Type) << 28 | \
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p11 << 31 \
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)
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#define CP_REG_VAT_GRP2(tx4Frac, tx5Cnt, tx5Type, tx5Frac, tx6Cnt, tx6Type, tx6Frac, tx7Cnt, tx7Type, tx7Frac) \
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( \
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(tx4Frac) << 0 | \
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(tx5Cnt) << 5 | \
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(tx5Type) << 6 | \
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(tx5Frac) << 9 | \
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(tx6Cnt) << 14 | \
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(tx6Type) << 15 | \
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(tx6Frac) << 18 | \
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(tx7Cnt) << 23 | \
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(tx7Type) << 24 | \
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(tx7Frac) << 27 \
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)
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// Transform unit register IDs
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#define XF_REG_ERROR_ID 0x1000
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#define XF_REG_DIAGNOSTICS_ID 0x1001
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#define XF_REG_STATE0_ID 0x1002
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#define XF_REG_STATE1_ID 0x1003
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#define XF_REG_CLOCK_ID 0x1004
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#define XF_REG_CLIPDISABLE_ID 0x1005
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#define XF_REG_PERF0_ID 0x1006
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#define XF_REG_PERF1_ID 0x1007
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#define XF_REG_INVERTEXSPEC_ID 0x1008
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#define XF_REG_NUMCOLORS_ID 0x1009
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#define XF_REG_DUALTEXTRAN_ID 0x1012
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#define XF_REG_SCALEX_ID 0x101A
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#define XF_REG_SCALEY_ID 0x101B
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#define XF_REG_SCALEZ_ID 0x101C
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#define XF_REG_OFFSETX_ID 0x101D
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#define XF_REG_OFFSETY_ID 0x101E
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#define XF_REG_OFFSETZ_ID 0x101F
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#define XF_REG_NUMTEX_ID 0x103F
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#define XF_REG_TEX0_ID 0x1040
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#define XF_REG_TEX1_ID 0x1041
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#define XF_REG_TEX2_ID 0x1042
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#define XF_REG_TEX3_ID 0x1043
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#define XF_REG_TEX4_ID 0x1044
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#define XF_REG_TEX5_ID 0x1045
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#define XF_REG_TEX6_ID 0x1046
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#define XF_REG_TEX7_ID 0x1047
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#define XF_REG_DUALTEX0_ID 0x1050
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#define XF_REG_DUALTEX1_ID 0x1051
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#define XF_REG_DUALTEX2_ID 0x1052
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#define XF_REG_DUALTEX3_ID 0x1053
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#define XF_REG_DUALTEX4_ID 0x1054
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#define XF_REG_DUALTEX5_ID 0x1055
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#define XF_REG_DUALTEX6_ID 0x1056
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#define XF_REG_DUALTEX7_ID 0x1057
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#define XF_REG_INVTXSPEC(ncols, nnorms, ntexs) \
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( \
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(ncols) << 0 | \
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(nnorms) << 2 | \
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(ntexs) << 4 \
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)
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#define XF_REG_TEX(proj, form, tgType, row, embossRow, embossLit) \
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( \
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(proj) << 1 | \
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(form) << 2 | \
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(tgType) << 4 | \
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(row) << 7 | \
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(embossRow) << 12 | \
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(embossLit) << 15 \
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)
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#define XF_REG_DUALTEX(mtx, normalize) \
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( \
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(mtx) << 0 | \
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(normalize) << 8 \
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)
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#define BP_GEN_MODE(nTexGens, nChans, nTevs, p4, nInds) \
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( \
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(u32)(nTexGens) << 0 | \
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(u32)(nChans) << 4 | \
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(u32)(nTevs) << 10 | \
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(u32)(p4) << 14 | \
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(u32)(nInds) << 16 \
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)
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#define BP_LP_SIZE(lineWidth, pointSize, lineOffset, pointOffset, lineHalfAspect, p5) \
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( \
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(u32)(lineWidth) << 0 | \
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(u32)(pointSize) << 8 | \
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(u32)(lineOffset) << 16 | \
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(u32)(pointOffset) << 19 | \
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(u32)(lineHalfAspect) << 22 | \
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(u32)(p5) << 24 \
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)
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void GDSetVtxDescv(const GXVtxDescList* attrPtr);
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void GDSetVtxAttrFmtv(GXVtxFmt vtxfmt, const GXVtxAttrFmtList* list);
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void GDSetArray(GXAttr attr, void* base_ptr, u8 stride);
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void GDSetArrayRaw(GXAttr attr, u32 base_ptr_raw, u8 stride);
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void GDPatchArrayPtr(void* base_ptr);
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void GDSetTexCoordGen(GXTexCoordID dst_coord, GXTexGenType func, GXTexGenSrc src_param, u8 normalize, u32 postmtx);
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void GDSetCullMode(GXCullMode mode);
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void GDSetGenMode(u8 nTexGens, u8 nChans, u8 nTevs);
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void GDSetGenMode2(u8 nTexGens, u8 nChans, u8 nTevs, u8 nInds, GXCullMode cm);
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void GDSetLPSize(u8 lineWidth, u8 pointSize, GXTexOffset lineOffset, GXTexOffset pointOffset, u8 lineHalfAspect);
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void GDSetCoPlanar(u8 enable);
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#ifdef __cplusplus
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}
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#endif
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#endif
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