diff --git a/cores/Oric/build/Makefile b/cores/Oric/build/Makefile
index c937d1e..4e78a20 100644
--- a/cores/Oric/build/Makefile
+++ b/cores/Oric/build/Makefile
@@ -1,5 +1,8 @@
+
 all:
 	time -p ./makemy.sh |tee out
+my:
+	time -p ./makenew.sh |tee out
 clean:
 	rm -rf COREn.ZX1 _impact.cmd _impact.log makemy.sh~ _ngo oric.bgn oric.bit oric_bitgen.xwbt \
         oric.bld oric.drc ORIC.lso oric_map.map oric_map.mrp oric_map.ncd oric_map.ngm ORIC_map.xrpt \
diff --git a/cores/Oric/build/makenew.sh b/cores/Oric/build/makenew.sh
new file mode 100755
index 0000000..05f6162
--- /dev/null
+++ b/cores/Oric/build/makenew.sh
@@ -0,0 +1,9 @@
+#!/bin/bash
+export machine=oric
+export speed=3
+export ruta_ucf=../source/oric
+export ruta_bat=../../
+"$ruta_bat"genxst.sh
+#"$ruta_bat"generar.sh v2_v3 ZZ3
+"$ruta_bat"generar.sh v4_my ZX1
+#"$ruta_bat"generar.sh Ap ZZA
diff --git a/cores/Oric/source/dos8rom.vhd b/cores/Oric/source/dos8rom.vhd
index a0efb9f..bb4f4ea 100644
--- a/cores/Oric/source/dos8rom.vhd
+++ b/cores/Oric/source/dos8rom.vhd
@@ -35,13 +35,13 @@ architecture rtl of dos8rom is
      X"8d", X"81", X"03", X"40", X"20", X"a0", X"03", X"40",
      X"08", X"48", X"a9", X"03", X"48", X"a9", X"ac", X"48",
      X"08", X"4c", X"22", X"ee", X"68", X"28", X"60", X"ff",
-     X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff",
-     X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff",
-     X"04", X"04", X"0f", X"ff", X"ff", X"ff", X"ff", X"ff",
-     X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff",
-     X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff",
-     X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff",
-     X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff",
+     X"78", X"a9", X"c0", X"85", X"41", X"a9", X"00", X"85",
+     X"40", X"a2", X"40", X"a0", X"00", X"8d", X"84", X"03",
+     X"b1", X"40", X"8d", X"85", X"03", X"ea", X"91", X"40",
+     X"88", X"d0", X"f2", X"e6", X"41", X"8a", X"a2", X"2e",
+     X"20", X"d9", X"03", X"aa", X"ca", X"d0", X"e4", X"58",
+     X"60", X"8d", X"84", X"03", X"ea", X"20", X"7c", X"f7",
+     X"ea", X"ea", X"8d", X"85", X"03", X"60", X"ff", X"ff",
      X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff",
      X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff",
      X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff", X"ff",
diff --git a/cores/Oric/source/oricatmos.vhd b/cores/Oric/source/oricatmos.vhd
index 115300c..8d162b5 100644
--- a/cores/Oric/source/oricatmos.vhd
+++ b/cores/Oric/source/oricatmos.vhd
@@ -81,6 +81,7 @@ entity ORIC is
 
   disk_a_on : out std_logic; -- 0 when disk is active else 1
   track_ok  : out std_logic; -- 0 when disk is active else 1
+  out_MAPn  : out std_logic;  
   image_buton_up : in std_logic;
   image_buton_down: in std_logic;
     -- Clk master
@@ -619,8 +620,9 @@ begin
       -- --led_signals_save(11 downto  8) <= X"e";
       -- --led_signals_save(15 downto 12) <= X"f";
       -- --led_signals_save(19 downto 16) <= X"a";
-      led_signals_save(13 downto 0)  <= disk_track_addr;
-      led_signals_save(15 downto 14) <= (others => '0');
+      led_signals_save(15 downto 0) <= CPU_ADDR(15 downto 0);
+--      led_signals_save(13 downto 0)  <= disk_track_addr;
+--      led_signals_save(15 downto 14) <= (others => '0');
       led_signals_save(23 downto 16) <= IMAGE_NUMBER_out(7 downto 0);
       led_signals_save(27 downto 24) <= disk_cur_TRACK(3 downto 0);
       led_signals_save(29 downto 28) <= disk_cur_TRACK(5 downto 4);
@@ -637,7 +639,7 @@ begin
       position => position
       );
 
-
+  out_MAPn <= cont_MAPn;
   controller8dos : entity work.controller_8dos
     port map
     (
diff --git a/cores/Oric/source/ram48k.vhd b/cores/Oric/source/ram48k.vhd
index 60f2ed3..a70ad3d 100644
--- a/cores/Oric/source/ram48k.vhd
+++ b/cores/Oric/source/ram48k.vhd
@@ -38,11 +38,11 @@ begin
 	cs0 <= '1' when cs='1' and addr(15 downto 14)="00" else '0';
 	cs1 <= '1' when cs='1' and addr(15 downto 14)="01" else '0';
 	cs2 <= '1' when cs='1' and addr(15 downto 14)="10" else '0';
-        cs3 <= '1' when cs='1' and addr(14 downto 14)="1" else '0';
+        cs3 <= '1' when cs='1' and addr(15 downto 14)="11" else '0';
 
 	do <=   
           ro0 when oe='1' and cs0='1' else
-          ro3 when oe='1' and cs3='1' else
+          ro1 when oe='1' and cs1='1' else
           ro2 when oe='1' and cs2='1' else
           ro3 when oe='1' and cs3='1' else
           (others=>'0');
@@ -57,17 +57,15 @@ begin
 		do   => ro0
 	);
 
-        ro1 <= (others => '0');
-	-- RAM_4000_7FFF : entity work.ram16k
-	-- port map (
-	-- 	clk  => clk,
-	-- 	cs   => cs1,
-	-- 	we   => we,
-	-- 	addr => addr(13 downto 0),
-	-- 	di   => di,
-	-- 	do   => ro1
-	-- );
-
+	RAM_4000_7FFF : entity work.ram16k
+	port map (
+		clk  => clk,
+		cs   => cs1,
+		we   => we,
+		addr => addr(13 downto 0),
+		di   => di,
+		do   => ro1
+	);
 	RAM_8000_BFFF : entity work.ram16k
 	port map (
 		clk  => clk,
@@ -77,14 +75,15 @@ begin
 		di   => di,
 		do   => ro2
 	);
-	RAM_C000_FFFF : entity work.ram16k
-	port map (
-		clk  => clk,
-		cs   => cs3,
-		we   => we,
-		addr => addr(13 downto 0),
-		di   => di,
-		do   => ro3
-	);
+        ro3 <= (others => '0');
+	-- RAM_C000_FFFF : entity work.ram16k
+	-- port map (
+	-- 	clk  => clk,
+	-- 	cs   => cs3,
+	-- 	we   => we,
+	-- 	addr => addr(13 downto 0),
+	-- 	di   => di,
+	-- 	do   => ro3
+	-- );
 
 end RTL;