From 2b20998b616c8d941e4d20bd9737e3ce66919711 Mon Sep 17 00:00:00 2001 From: antoniovillena Date: Sat, 30 Apr 2016 23:18:19 +0200 Subject: [PATCH] =?UTF-8?q?A=C3=B1ado=20make.bat=20y=20los=20distintos=20.?= =?UTF-8?q?ucfs?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- cores/AcornAtom/make.bat | 16 ++ cores/AcornAtom/src/Atomic_zxuno.ucf | 77 ---------- cores/AcornAtom/src/Atomic_zxuno_Ap.ucf | 91 +++++++++++ cores/AcornAtom/src/Atomic_zxuno_bd.bmm | 22 +-- cores/AcornAtom/src/Atomic_zxuno_v2.ucf | 148 +++++++++--------- cores/AcornAtom/src/Atomic_zxuno_v3.ucf | 150 ++++++++++--------- cores/AcornAtom/src/Atomic_zxuno_v4.ucf | 91 +++++++++++ cores/AcornAtom/working/Atomic_top_zxuno.xst | 52 +++++++ 8 files changed, 423 insertions(+), 224 deletions(-) create mode 100644 cores/AcornAtom/make.bat delete mode 100644 cores/AcornAtom/src/Atomic_zxuno.ucf create mode 100644 cores/AcornAtom/src/Atomic_zxuno_Ap.ucf create mode 100644 cores/AcornAtom/src/Atomic_zxuno_v4.ucf create mode 100644 cores/AcornAtom/working/Atomic_top_zxuno.xst diff --git a/cores/AcornAtom/make.bat b/cores/AcornAtom/make.bat new file mode 100644 index 0000000..c0c284a --- /dev/null +++ b/cores/AcornAtom/make.bat @@ -0,0 +1,16 @@ +if not exist projnav.tmp mkdir projnav.tmp +call xst -intstyle ise -ifn working/Atomic_top_zxuno.xst -ofn working/Atomic_top_zxuno.syr +call :generar v2 +call :generar v3 +rem call :generar v4 +rem call :generar Ap +goto :eof + +:generar +call ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc src/Atomic_zxuno_%1.ucf -p xc6slx9-tqg144-2 -bm src/Atomic_zxuno.bmm Atomic_top_zxuno.ngc Atomic_top_zxuno.ngd +call map -intstyle ise -w -ol high -mt 2 -p xc6slx9-tqg144-2 -logic_opt off -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -ir off -pr off -lc off -power off -o Atomic_top_zxuno_map.ncd Atomic_top_zxuno.ngd Atomic_top_zxuno.pcf +call par -intstyle ise -w -ol high -mt 4 Atomic_top_zxuno_map.ncd Atomic_top_zxuno.ncd Atomic_top_zxuno.pcf +call trce -intstyle ise -v 3 -s 3 -n 3 -fastpaths -xml Atomic_top_zxuno.twx Atomic_top_zxuno.ncd -o Atomic_top_zxuno.twr Atomic_top_zxuno.pcf +call bitgen -intstyle ise -w -g Compress -g DebugBitstream:No -g Binary:no -g CRC:Enable -g Reset_on_err:No -g ConfigRate:2 -g ProgPin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullUp -g UserID:0xFFFFFFFF -g ExtMasterCclk_en:No -g SPI_buswidth:1 -g TIMER_CFG:0xFFFF -g multipin_wakeup:No -g StartUpClk:CClk -g DONE_cycle:4 -g GTS_cycle:5 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:No -g DriveDone:No -g en_sw_gsr:No -g drive_awake:No -g sw_clk:Startupclk -g sw_gwe_cycle:5 -g sw_gts_cycle:4 Atomic_top_zxuno.ncd +copy /y Atomic_top_zxuno.bit AcornAtom.%1.bit +:eof \ No newline at end of file diff --git a/cores/AcornAtom/src/Atomic_zxuno.ucf b/cores/AcornAtom/src/Atomic_zxuno.ucf deleted file mode 100644 index 20c7d58..0000000 --- a/cores/AcornAtom/src/Atomic_zxuno.ucf +++ /dev/null @@ -1,77 +0,0 @@ -# UCF ZX-UNO - -NET CLK50 LOC="P55" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW | PERIOD=20.0ns; # CLK - -NET ps2_data LOC="P97" | IOSTANDARD=LVCMOS33 | PULLUP; -NET ps2_clk LOC="P98" | IOSTANDARD=LVCMOS33 | PULLUP; - -NET SDMISO LOC="P78" | IOSTANDARD=LVCMOS33; -NET SDMOSI LOC="P74" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SDCLK LOC="P75" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SDSS LOC="P59" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; - -NET hsync LOC="P87" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET vsync LOC="P85" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; - -NET "green(0)" LOC="P82" | IOSTANDARD=LVCMOS33; -NET "red(0)" LOC="P88" | IOSTANDARD=LVCMOS33; -NET "blue(0)" LOC="P79" | IOSTANDARD=LVCMOS33; - -NET "green(1)" LOC="P83" | IOSTANDARD=LVCMOS33; -NET "red(1)" LOC="P92" | IOSTANDARD=LVCMOS33; -NET "blue(1)" LOC="P80" | IOSTANDARD=LVCMOS33; - -NET "green(2)" LOC="P84" | IOSTANDARD=LVCMOS33; -NET "red(2)" LOC="P93" | IOSTANDARD=LVCMOS33; -NET "blue(2)" LOC="P81" | IOSTANDARD=LVCMOS33; - -NET audiol LOC="P8" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET audioR LOC="P9" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; - -NET LED1 LOC="P10" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; - -NET SRAM_ADDR(0) LOC="P115" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR0 -NET SRAM_ADDR(1) LOC="P116" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR1 -NET SRAM_ADDR(2) LOC="P117" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR2 -NET SRAM_ADDR(3) LOC="P119" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR3 -NET SRAM_ADDR(4) LOC="P120" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR4 -NET SRAM_ADDR(5) LOC="P123" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR5 -NET SRAM_ADDR(6) LOC="P126" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR6 -NET SRAM_ADDR(7) LOC="P131" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR7 -NET SRAM_ADDR(8) LOC="P127" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR8 -NET SRAM_ADDR(9) LOC="P124" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR9 -NET SRAM_ADDR(10) LOC="P118" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR10 -NET SRAM_ADDR(11) LOC="P121" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR11 -NET SRAM_ADDR(12) LOC="P133" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR12 -NET SRAM_ADDR(13) LOC="P132" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR13 -NET SRAM_ADDR(14) LOC="P137" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR14 -NET SRAM_ADDR(15) LOC="P140" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR15 -NET SRAM_ADDR(16) LOC="P139" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR16 -NET SRAM_ADDR(17) LOC="P141" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR17 -NET SRAM_ADDR(18) LOC="P138" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR18 - -NET SRAM_DATA(0) LOC="P114" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA0 -NET SRAM_DATA(1) LOC="P112" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA1 -NET SRAM_DATA(2) LOC="P111" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA2 -NET SRAM_DATA(3) LOC="P99" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA3 -NET SRAM_DATA(4) LOC="P100" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA4 -NET SRAM_DATA(5) LOC="P101" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA5 -NET SRAM_DATA(6) LOC="P102" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA6 -NET SRAM_DATA(7) LOC="P104" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA7 - -NET RAMWRn LOC="P134" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_WE - -NET JOYSTICK1<0> LOC="P142" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<1> LOC="P1" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<2> LOC="P2" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<3> LOC="P5" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<4> LOC="P7" | IOSTANDARD=LVCMOS33; -NET JOYSTICK1<5> LOC="P143" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<6> LOC="P32" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<7> LOC="P6" | IOSTANDARD=LVCMOS33; - -NET ps2_mouse_clk LOC="P94" | IOSTANDARD=LVCMOS33 | PULLUP; -NET ps2_mouse_data LOC="P95" | IOSTANDARD=LVCMOS33 | PULLUP; - -NET ERST LOC="P50" | IOSTANDARD=LVCMOS33; # Reset externo -NET charSet LOC="P33" | IOSTANDARD=LVCMOS33; # Charset switch externo diff --git a/cores/AcornAtom/src/Atomic_zxuno_Ap.ucf b/cores/AcornAtom/src/Atomic_zxuno_Ap.ucf new file mode 100644 index 0000000..7b8f4c7 --- /dev/null +++ b/cores/AcornAtom/src/Atomic_zxuno_Ap.ucf @@ -0,0 +1,91 @@ +# Clocks & debug +NET CLK50 LOC="P55" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW | PERIOD=20.0ns; +NET LED1 LOC="P2" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; + +# Video output +NET "red(2)" LOC="P97" | IOSTANDARD = LVCMOS33; +NET "red(1)" LOC="P95" | IOSTANDARD = LVCMOS33; +NET "red(0)" LOC="P94" | IOSTANDARD = LVCMOS33; +NET "green(2)" LOC="P88" | IOSTANDARD = LVCMOS33; +NET "green(1)" LOC="P87" | IOSTANDARD = LVCMOS33; +NET "green(0)" LOC="P85" | IOSTANDARD = LVCMOS33; +NET "blue(2)" LOC="P84" | IOSTANDARD = LVCMOS33; +NET "blue(1)" LOC="P83" | IOSTANDARD = LVCMOS33; +NET "blue(0)" LOC="P82" | IOSTANDARD = LVCMOS33; +NET hsync LOC="P93" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET vsync LOC="P92" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET "stdn" LOC="P51" | IOSTANDARD = LVCMOS33; +#NET "stdnb" LOC="P50" | IOSTANDARD = LVCMOS33; + +# Sound input/output +NET audiol LOC="P98" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET audioR LOC="P99" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET "ear" LOC="P1" | IOSTANDARD = LVCMOS33; + +# Keyboard and mouse +NET ps2_clk LOC="P143" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_data LOC="P142" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_mouse_clk LOC="P57" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_mouse_data LOC="P56" | IOSTANDARD = LVCMOS33 | PULLUP; + +# SRAM +NET SRAM_ADDR(0) LOC="P115" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(1) LOC="P116" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(2) LOC="P117" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(3) LOC="P119" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(4) LOC="P120" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(5) LOC="P123" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(6) LOC="P126" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(7) LOC="P131" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(8) LOC="P127" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(9) LOC="P124" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(10) LOC="P118" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(11) LOC="P121" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(12) LOC="P133" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(13) LOC="P132" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(14) LOC="P137" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(15) LOC="P140" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(16) LOC="P139" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(17) LOC="P141" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(18) LOC="P138" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET SRAM_ADDR(19) LOC="P111" | IOSTANDARD = LVCMOS33; +#NET SRAM_ADDR(20) LOC="P138" | IOSTANDARD = LVCMOS33; + +NET SRAM_DATA(0) LOC="P114" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(1) LOC="P112" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(2) LOC="P111" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(3) LOC="P105" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(4) LOC="P104" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(5) LOC="P102" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(6) LOC="P101" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(7) LOC="P100" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; + +NET RAMWRn LOC="P134" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; + +# SPI Flash +#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33; +#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33; +#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33; +#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33; +#NET "flash_ext1" LOC="P62" | IOSTANDARD = LVCMOS33; +#NET "flash_ext2" LOC="P61" | IOSTANDARD = LVCMOS33; + +# SD/MMC +NET SDSS LOC="P78" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDCLK LOC="P80" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDMOSI LOC="P79" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDMISO LOC="P81" | IOSTANDARD = LVCMOS33; + +# JOYSTICK +NET JOYSTICK1<0> LOC="P74" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<1> LOC="P67" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<2> LOC="P59" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<3> LOC="P58" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<5> LOC="P75" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<7> LOC="P8" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<4> LOC="P39" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<6> LOC="P32" | IOSTANDARD = LVCMOS33 | PULLUP; + +# Otros +NET ERST LOC="P50" | IOSTANDARD = LVCMOS33; # Reset externo +NET charSet LOC="P33" | IOSTANDARD = LVCMOS33; # Charset switch externo diff --git a/cores/AcornAtom/src/Atomic_zxuno_bd.bmm b/cores/AcornAtom/src/Atomic_zxuno_bd.bmm index 0d57fad..7d927fe 100644 --- a/cores/AcornAtom/src/Atomic_zxuno_bd.bmm +++ b/cores/AcornAtom/src/Atomic_zxuno_bd.bmm @@ -1,7 +1,7 @@ // BMM LOC annotation file. // // Release 14.6 - P.20131013, build 3.0.10 Apr 3, 2013 -// Copyright (c) 1995-2015 Xilinx, Inc. All rights reserved. +// Copyright (c) 1995-2016 Xilinx, Inc. All rights reserved. /////////////////////////////////////////////////////////////////////////////// @@ -20,43 +20,43 @@ ADDRESS_MAP avrmap PPC405 0 ADDRESS_SPACE rom_code RAMB16 [0x00000000:0x00004FFF] BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word0 RAMB16 [15:0] [0:1023] PLACED = X1Y28; + Inst_AVR8/PM_Inst/RAM_Word0 RAMB16 [15:0] [0:1023] PLACED = X0Y26; END_BUS_BLOCK; BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word1 RAMB16 [15:0] [1024:2047] PLACED = X1Y24; + Inst_AVR8/PM_Inst/RAM_Word1 RAMB16 [15:0] [1024:2047] PLACED = X0Y24; END_BUS_BLOCK; BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word2 RAMB16 [15:0] [2048:3071] PLACED = X1Y30; + Inst_AVR8/PM_Inst/RAM_Word2 RAMB16 [15:0] [2048:3071] PLACED = X0Y30; END_BUS_BLOCK; BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word3 RAMB16 [15:0] [3072:4095] PLACED = X1Y26; + Inst_AVR8/PM_Inst/RAM_Word3 RAMB16 [15:0] [3072:4095] PLACED = X0Y28; END_BUS_BLOCK; BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word4 RAMB16 [15:0] [4096:5119] PLACED = X0Y28; + Inst_AVR8/PM_Inst/RAM_Word4 RAMB16 [15:0] [4096:5119] PLACED = X0Y22; END_BUS_BLOCK; BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word5 RAMB16 [15:0] [5120:6143] PLACED = X0Y30; + Inst_AVR8/PM_Inst/RAM_Word5 RAMB16 [15:0] [5120:6143] PLACED = X0Y20; END_BUS_BLOCK; BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word6 RAMB16 [15:0] [6144:7167] PLACED = X1Y22; + Inst_AVR8/PM_Inst/RAM_Word6 RAMB16 [15:0] [6144:7167] PLACED = X1Y24; END_BUS_BLOCK; BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word7 RAMB16 [15:0] [7168:8191] PLACED = X0Y26; + Inst_AVR8/PM_Inst/RAM_Word7 RAMB16 [15:0] [7168:8191] PLACED = X0Y18; END_BUS_BLOCK; BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word8 RAMB16 [15:0] [8192:9215] PLACED = X0Y24; + Inst_AVR8/PM_Inst/RAM_Word8 RAMB16 [15:0] [8192:9215] PLACED = X1Y22; END_BUS_BLOCK; BUS_BLOCK - Inst_AVR8/PM_Inst/RAM_Word9 RAMB16 [15:0] [9216:10239] PLACED = X0Y22; + Inst_AVR8/PM_Inst/RAM_Word9 RAMB16 [15:0] [9216:10239] PLACED = X1Y20; END_BUS_BLOCK; END_ADDRESS_SPACE; diff --git a/cores/AcornAtom/src/Atomic_zxuno_v2.ucf b/cores/AcornAtom/src/Atomic_zxuno_v2.ucf index 20c7d58..d4a4a1b 100644 --- a/cores/AcornAtom/src/Atomic_zxuno_v2.ucf +++ b/cores/AcornAtom/src/Atomic_zxuno_v2.ucf @@ -1,77 +1,91 @@ -# UCF ZX-UNO +# Clocks & debug +NET CLK50 LOC="P55" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW | PERIOD=20.0ns; +NET LED1 LOC="P10" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET CLK50 LOC="P55" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW | PERIOD=20.0ns; # CLK +# Video output +NET "red(2)" LOC="P93" | IOSTANDARD = LVCMOS33; +NET "red(1)" LOC="P92" | IOSTANDARD = LVCMOS33; +NET "red(0)" LOC="P88" | IOSTANDARD = LVCMOS33; +NET "green(2)" LOC="P84" | IOSTANDARD = LVCMOS33; +NET "green(1)" LOC="P83" | IOSTANDARD = LVCMOS33; +NET "green(0)" LOC="P82" | IOSTANDARD = LVCMOS33; +NET "blue(2)" LOC="P81" | IOSTANDARD = LVCMOS33; +NET "blue(1)" LOC="P80" | IOSTANDARD = LVCMOS33; +NET "blue(0)" LOC="P79" | IOSTANDARD = LVCMOS33; +NET hsync LOC="P87" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET vsync LOC="P85" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET "stdn" LOC="P67" | IOSTANDARD = LVCMOS33; +#NET "stdnb" LOC="P66" | IOSTANDARD = LVCMOS33; -NET ps2_data LOC="P97" | IOSTANDARD=LVCMOS33 | PULLUP; -NET ps2_clk LOC="P98" | IOSTANDARD=LVCMOS33 | PULLUP; +# Sound input/output +NET audiol LOC="P8" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET audioR LOC="P9" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET "ear" LOC="P105" | IOSTANDARD = LVCMOS33; -NET SDMISO LOC="P78" | IOSTANDARD=LVCMOS33; -NET SDMOSI LOC="P74" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SDCLK LOC="P75" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SDSS LOC="P59" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; - -NET hsync LOC="P87" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET vsync LOC="P85" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; +# Keyboard and mouse +NET ps2_clk LOC="P98" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_data LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_mouse_clk LOC="P94" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_mouse_data LOC="P95" | IOSTANDARD = LVCMOS33 | PULLUP; -NET "green(0)" LOC="P82" | IOSTANDARD=LVCMOS33; -NET "red(0)" LOC="P88" | IOSTANDARD=LVCMOS33; -NET "blue(0)" LOC="P79" | IOSTANDARD=LVCMOS33; +# SRAM +NET SRAM_ADDR(0) LOC="P115" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(1) LOC="P116" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(2) LOC="P117" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(3) LOC="P119" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(4) LOC="P120" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(5) LOC="P123" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(6) LOC="P126" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(7) LOC="P131" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(8) LOC="P127" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(9) LOC="P124" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(10) LOC="P118" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(11) LOC="P121" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(12) LOC="P133" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(13) LOC="P132" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(14) LOC="P137" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(15) LOC="P140" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(16) LOC="P139" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(17) LOC="P141" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(18) LOC="P138" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET SRAM_ADDR(19) LOC="P111" | IOSTANDARD = LVCMOS33; +#NET SRAM_ADDR(20) LOC="P138" | IOSTANDARD = LVCMOS33; -NET "green(1)" LOC="P83" | IOSTANDARD=LVCMOS33; -NET "red(1)" LOC="P92" | IOSTANDARD=LVCMOS33; -NET "blue(1)" LOC="P80" | IOSTANDARD=LVCMOS33; +NET SRAM_DATA(0) LOC="P114" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(1) LOC="P112" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(2) LOC="P111" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(3) LOC="P99" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(4) LOC="P100" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(5) LOC="P101" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(6) LOC="P102" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(7) LOC="P104" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET "green(2)" LOC="P84" | IOSTANDARD=LVCMOS33; -NET "red(2)" LOC="P93" | IOSTANDARD=LVCMOS33; -NET "blue(2)" LOC="P81" | IOSTANDARD=LVCMOS33; +NET RAMWRn LOC="P134" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET audiol LOC="P8" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET audioR LOC="P9" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; +# SPI Flash +#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33; +#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33; +#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33; +#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33; +#NET "flash_ext1" LOC="P62" | IOSTANDARD = LVCMOS33; +#NET "flash_ext2" LOC="P61" | IOSTANDARD = LVCMOS33; -NET LED1 LOC="P10" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; +# SD/MMC +NET SDSS LOC="P59" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDCLK LOC="P75" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDMOSI LOC="P74" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDMISO LOC="P78" | IOSTANDARD = LVCMOS33; -NET SRAM_ADDR(0) LOC="P115" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR0 -NET SRAM_ADDR(1) LOC="P116" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR1 -NET SRAM_ADDR(2) LOC="P117" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR2 -NET SRAM_ADDR(3) LOC="P119" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR3 -NET SRAM_ADDR(4) LOC="P120" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR4 -NET SRAM_ADDR(5) LOC="P123" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR5 -NET SRAM_ADDR(6) LOC="P126" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR6 -NET SRAM_ADDR(7) LOC="P131" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR7 -NET SRAM_ADDR(8) LOC="P127" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR8 -NET SRAM_ADDR(9) LOC="P124" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR9 -NET SRAM_ADDR(10) LOC="P118" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR10 -NET SRAM_ADDR(11) LOC="P121" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR11 -NET SRAM_ADDR(12) LOC="P133" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR12 -NET SRAM_ADDR(13) LOC="P132" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR13 -NET SRAM_ADDR(14) LOC="P137" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR14 -NET SRAM_ADDR(15) LOC="P140" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR15 -NET SRAM_ADDR(16) LOC="P139" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR16 -NET SRAM_ADDR(17) LOC="P141" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR17 -NET SRAM_ADDR(18) LOC="P138" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_ADDR18 +# JOYSTICK +NET JOYSTICK1<0> LOC="P142" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<1> LOC="P1" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<2> LOC="P2" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<3> LOC="P5" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<5> LOC="P143" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<7> LOC="P6" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<4> LOC="P7" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<6> LOC="P32" | IOSTANDARD = LVCMOS33 | PULLUP; -NET SRAM_DATA(0) LOC="P114" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA0 -NET SRAM_DATA(1) LOC="P112" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA1 -NET SRAM_DATA(2) LOC="P111" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA2 -NET SRAM_DATA(3) LOC="P99" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA3 -NET SRAM_DATA(4) LOC="P100" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA4 -NET SRAM_DATA(5) LOC="P101" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA5 -NET SRAM_DATA(6) LOC="P102" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA6 -NET SRAM_DATA(7) LOC="P104" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_DATA7 - -NET RAMWRn LOC="P134" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_WE - -NET JOYSTICK1<0> LOC="P142" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<1> LOC="P1" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<2> LOC="P2" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<3> LOC="P5" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<4> LOC="P7" | IOSTANDARD=LVCMOS33; -NET JOYSTICK1<5> LOC="P143" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<6> LOC="P32" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<7> LOC="P6" | IOSTANDARD=LVCMOS33; - -NET ps2_mouse_clk LOC="P94" | IOSTANDARD=LVCMOS33 | PULLUP; -NET ps2_mouse_data LOC="P95" | IOSTANDARD=LVCMOS33 | PULLUP; - -NET ERST LOC="P50" | IOSTANDARD=LVCMOS33; # Reset externo -NET charSet LOC="P33" | IOSTANDARD=LVCMOS33; # Charset switch externo +# Otros +NET ERST LOC="P50" | IOSTANDARD = LVCMOS33; # Reset externo +NET charSet LOC="P33" | IOSTANDARD = LVCMOS33; # Charset switch externo diff --git a/cores/AcornAtom/src/Atomic_zxuno_v3.ucf b/cores/AcornAtom/src/Atomic_zxuno_v3.ucf index 84ada37..eab1183 100644 --- a/cores/AcornAtom/src/Atomic_zxuno_v3.ucf +++ b/cores/AcornAtom/src/Atomic_zxuno_v3.ucf @@ -1,79 +1,91 @@ -# UCF ZX-UNO +# Clocks & debug +NET CLK50 LOC="P55" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW | PERIOD=20.0ns; +NET LED1 LOC="P10" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET CLK50 LOC="P55" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW | PERIOD=20.0ns; # CLK +# Video output +NET "red(2)" LOC="P93" | IOSTANDARD = LVCMOS33; +NET "red(1)" LOC="P92" | IOSTANDARD = LVCMOS33; +NET "red(0)" LOC="P88" | IOSTANDARD = LVCMOS33; +NET "green(2)" LOC="P84" | IOSTANDARD = LVCMOS33; +NET "green(1)" LOC="P83" | IOSTANDARD = LVCMOS33; +NET "green(0)" LOC="P82" | IOSTANDARD = LVCMOS33; +NET "blue(2)" LOC="P81" | IOSTANDARD = LVCMOS33; +NET "blue(1)" LOC="P80" | IOSTANDARD = LVCMOS33; +NET "blue(0)" LOC="P79" | IOSTANDARD = LVCMOS33; +NET hsync LOC="P87" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET vsync LOC="P85" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET "stdn" LOC="P67" | IOSTANDARD = LVCMOS33; +#NET "stdnb" LOC="P66" | IOSTANDARD = LVCMOS33; -NET ps2_data LOC="P97" | IOSTANDARD=LVCMOS33 | PULLUP; -NET ps2_clk LOC="P98" | IOSTANDARD=LVCMOS33 | PULLUP; +# Sound input/output +NET audiol LOC="P8" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET audioR LOC="P9" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET "ear" LOC="P105" | IOSTANDARD = LVCMOS33; -NET SDMISO LOC="P78" | IOSTANDARD=LVCMOS33; -NET SDMOSI LOC="P74" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SDCLK LOC="P75" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SDSS LOC="P59" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; - -NET hsync LOC="P87" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET vsync LOC="P85" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; +# Keyboard and mouse +NET ps2_clk LOC="P98" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_data LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_mouse_clk LOC="P94" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_mouse_data LOC="P95" | IOSTANDARD = LVCMOS33 | PULLUP; -NET "green(0)" LOC="P82" | IOSTANDARD=LVCMOS33; -NET "red(0)" LOC="P88" | IOSTANDARD=LVCMOS33; -NET "blue(0)" LOC="P79" | IOSTANDARD=LVCMOS33; +# SRAM +NET SRAM_ADDR(0) LOC="P143" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(1) LOC="P142" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(2) LOC="P141" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(3) LOC="P140" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(4) LOC="P139" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(5) LOC="P104" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(6) LOC="P102" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(7) LOC="P101" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(8) LOC="P100" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(9) LOC="P99" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(10) LOC="P112" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(11) LOC="P114" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(12) LOC="P115" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(13) LOC="P116" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(14) LOC="P117" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(15) LOC="P131" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(16) LOC="P133" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(17) LOC="P134" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(18) LOC="P137" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET SRAM_ADDR(19) LOC="P111" | IOSTANDARD = LVCMOS33; +#NET SRAM_ADDR(20) LOC="P138" | IOSTANDARD = LVCMOS33; -NET "green(1)" LOC="P83" | IOSTANDARD=LVCMOS33; -NET "red(1)" LOC="P92" | IOSTANDARD=LVCMOS33; -NET "blue(1)" LOC="P80" | IOSTANDARD=LVCMOS33; +NET SRAM_DATA(0) LOC="P132" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(1) LOC="P126" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(2) LOC="P123" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(3) LOC="P120" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(4) LOC="P119" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(5) LOC="P121" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(6) LOC="P124" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(7) LOC="P127" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET "green(2)" LOC="P84" | IOSTANDARD=LVCMOS33; -NET "red(2)" LOC="P93" | IOSTANDARD=LVCMOS33; -NET "blue(2)" LOC="P81" | IOSTANDARD=LVCMOS33; +NET RAMWRn LOC="P118" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET audiol LOC="P8" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET audioR LOC="P9" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; +# SPI Flash +#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33; +#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33; +#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33; +#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33; +#NET "flash_ext1" LOC="P62" | IOSTANDARD = LVCMOS33; +#NET "flash_ext2" LOC="P61" | IOSTANDARD = LVCMOS33; -NET LED1 LOC="P10" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; +# SD/MMC +NET SDSS LOC="P59" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDCLK LOC="P75" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDMOSI LOC="P74" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDMISO LOC="P78" | IOSTANDARD = LVCMOS33; -NET SRAM_ADDR(0) LOC="P143" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(1) LOC="P142" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(2) LOC="P141" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(3) LOC="P140" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(4) LOC="P139" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(5) LOC="P104" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(6) LOC="P102" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(7) LOC="P101" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(8) LOC="P100" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(9) LOC="P99" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(10) LOC="P112" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(11) LOC="P114" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(12) LOC="P115" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(13) LOC="P116" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(14) LOC="P117" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(15) LOC="P131" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(16) LOC="P133" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(17) LOC="P134" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(18) LOC="P137" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -#NET SRAM_ADDR(19) LOC="P111" | IOSTANDARD = LVCMOS33; -#NET SRAM_ADDR(20) LOC="P138" | IOSTANDARD = LVCMOS33; +# JOYSTICK +NET JOYSTICK1<0> LOC="P51" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<1> LOC="P7" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<2> LOC="P6" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<3> LOC="P5" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<5> LOC="P1" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<7> LOC="P45" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<4> LOC="P39" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<6> LOC="P2" | IOSTANDARD = LVCMOS33 | PULLUP; -NET SRAM_DATA(0) LOC="P132" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(1) LOC="P126" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(2) LOC="P123" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(3) LOC="P120" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(4) LOC="P119" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(5) LOC="P121" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(6) LOC="P124" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(7) LOC="P127" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; - -NET RAMWRn LOC="P118" | IOSTANDARD=LVCMOS33 | DRIVE=2 | SLEW=SLOW; # SRAM_W - -NET JOYSTICK1<0> LOC="P51" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<1> LOC="P7" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<2> LOC="P6" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<3> LOC="P5" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<4> LOC="P39" | IOSTANDARD=LVCMOS33; -NET JOYSTICK1<5> LOC="P1" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<6> LOC="P2" | IOSTANDARD=LVCMOS33 | PULLUP; -NET JOYSTICK1<7> LOC="P45" | IOSTANDARD=LVCMOS33; - -NET ps2_mouse_clk LOC="P94" | IOSTANDARD=LVCMOS33 | PULLUP; -NET ps2_mouse_data LOC="P95" | IOSTANDARD=LVCMOS33 | PULLUP; - -NET ERST LOC="P46" | IOSTANDARD=LVCMOS33; # Reset externo -NET charSet LOC="P33" | IOSTANDARD=LVCMOS33; # Charset switch externo +# Otros +NET ERST LOC="P46" | IOSTANDARD = LVCMOS33; # Reset externo +NET charSet LOC="P33" | IOSTANDARD = LVCMOS33; # Charset switch externo diff --git a/cores/AcornAtom/src/Atomic_zxuno_v4.ucf b/cores/AcornAtom/src/Atomic_zxuno_v4.ucf new file mode 100644 index 0000000..4577937 --- /dev/null +++ b/cores/AcornAtom/src/Atomic_zxuno_v4.ucf @@ -0,0 +1,91 @@ +# Clocks & debug +NET CLK50 LOC="P55" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW | PERIOD=20.0ns; +NET LED1 LOC="P11" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; + +# Video output +NET "red(2)" LOC="P81" | IOSTANDARD = LVCMOS33; +NET "red(1)" LOC="P80" | IOSTANDARD = LVCMOS33; +NET "red(0)" LOC="P79" | IOSTANDARD = LVCMOS33; +NET "green(2)" LOC="P84" | IOSTANDARD = LVCMOS33; +NET "green(1)" LOC="P83" | IOSTANDARD = LVCMOS33; +NET "green(0)" LOC="P82" | IOSTANDARD = LVCMOS33; +NET "blue(2)" LOC="P93" | IOSTANDARD = LVCMOS33; +NET "blue(1)" LOC="P92" | IOSTANDARD = LVCMOS33; +NET "blue(0)" LOC="P88" | IOSTANDARD = LVCMOS33; +NET hsync LOC="P87" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET vsync LOC="P85" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET "stdn" LOC="P67" | IOSTANDARD = LVCMOS33; +#NET "stdnb" LOC="P66" | IOSTANDARD = LVCMOS33; + +# Sound input/output +NET audiol LOC="P10" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET audioR LOC="P9" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET "ear" LOC="P94" | IOSTANDARD = LVCMOS33; + +# Keyboard and mouse +NET ps2_clk LOC="P99" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_data LOC="P98" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_mouse_clk LOC="P95" | IOSTANDARD = LVCMOS33 | PULLUP; +NET ps2_mouse_data LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP; + +# SRAM +NET SRAM_ADDR(0) LOC="P141" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(1) LOC="P139" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(2) LOC="P137" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(3) LOC="P134" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(4) LOC="P133" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(5) LOC="P120" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(6) LOC="P118" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(7) LOC="P116" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(8) LOC="P114" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(9) LOC="P112" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(10) LOC="P104" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(11) LOC="P102" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(12) LOC="P101" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(13) LOC="P100" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(14) LOC="P111" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(15) LOC="P131" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(16) LOC="P138" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(17) LOC="P140" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR(18) LOC="P142" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +#NET SRAM_ADDR(19) LOC="P105" | IOSTANDARD = LVCMOS33; +#NET SRAM_ADDR(20) LOC="P143" | IOSTANDARD = LVCMOS33; + +NET SRAM_DATA(0) LOC="P132" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(1) LOC="P127" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(2) LOC="P124" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(3) LOC="P123 | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(4) LOC="P115" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(5) LOC="P117" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(6) LOC="P119" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA(7) LOC="P126" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; + +NET RAMWRn LOC="P121" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; + +# SPI Flash +#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33; +#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33; +#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33; +#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33; +#NET "flash_ext1" LOC="P62" | IOSTANDARD = LVCMOS33; +#NET "flash_ext2" LOC="P61" | IOSTANDARD = LVCMOS33; + +# SD/MMC +NET SDSS LOC="P59" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDCLK LOC="P75" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDMOSI LOC="P74" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SDMISO LOC="P78" | IOSTANDARD = LVCMOS33; + +# JOYSTICK +NET JOYSTICK1<0> LOC="P1" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<1> LOC="P5" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<2> LOC="P6" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<3> LOC="P7" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<5> LOC="P2" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<7> LOC="P8" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<4> LOC="P39" | IOSTANDARD = LVCMOS33 | PULLUP; +NET JOYSTICK1<6> LOC="P32" | IOSTANDARD = LVCMOS33 | PULLUP; + +# Otros +NET ERST LOC="P50" | IOSTANDARD = LVCMOS33; # Reset externo +NET charSet LOC="P33" | IOSTANDARD = LVCMOS33; # Charset switch externo diff --git a/cores/AcornAtom/working/Atomic_top_zxuno.xst b/cores/AcornAtom/working/Atomic_top_zxuno.xst new file mode 100644 index 0000000..9e83933 --- /dev/null +++ b/cores/AcornAtom/working/Atomic_top_zxuno.xst @@ -0,0 +1,52 @@ +set -tmpdir "projnav.tmp" +set -xsthdpdir "xst" +run +-ifn working/Atomic_top_zxuno.prj +-ofn Atomic_top_zxuno +-ofmt NGC +-p xc6slx9-2-tqg144 +-top Atomic_top_zxuno +-opt_mode Speed +-opt_level 1 +-power NO +-iuc NO +-keep_hierarchy No +-netlist_hierarchy As_Optimized +-rtlview Yes +-glob_opt AllClockNets +-read_cores YES +-write_timing_constraints NO +-cross_clock_analysis NO +-hierarchy_separator / +-bus_delimiter <> +-case Maintain +-slice_utilization_ratio 100 +-bram_utilization_ratio 100 +-dsp_utilization_ratio 100 +-lc Auto +-reduce_control_sets Auto +-fsm_extract YES -fsm_encoding Auto +-safe_implementation No +-fsm_style LUT +-ram_extract Yes +-ram_style Auto +-rom_extract Yes +-shreg_extract YES +-rom_style Auto +-auto_bram_packing NO +-resource_sharing YES +-async_to_sync NO +-shreg_min_size 2 +-use_dsp48 Auto +-iobuf YES +-max_fanout 100000 +-bufg 16 +-register_duplication YES +-register_balancing No +-optimize_primitives NO +-use_clock_enable Auto +-use_sync_set Auto +-use_sync_reset Auto +-iob Auto +-equivalent_register_removal YES +-slice_utilization_ratio_maxmargin 5