Mejoras de Uto: el CSYNC (COPT)=1, y arranque en rooted pulsando /

This commit is contained in:
antoniovillena 2018-01-15 20:15:00 +01:00
parent 8c7f947146
commit 4af65d11f8
2 changed files with 22 additions and 4 deletions

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@ -75,6 +75,7 @@
define scanli outvid+1 define scanli outvid+1
define freque scanli+1 define freque scanli+1
define cpuspd freque+1 define cpuspd freque+1
define roboot cpuspd+1 ; boot as root
define tmpbuf $7800 define tmpbuf $7800
define tmpbu2 $7880 define tmpbu2 $7880
@ -250,7 +251,7 @@ start ld bc, chrend-sdtab
rrca rrca
ld a, h ld a, h
adc a, a adc a, a
or $80 or %10100000 ; $A0 - Turbo 14Mhz, COPT=1 (PAL Sync) - es $c0 en el firmware oficial
ld (scnbak), a ; lo pongo a 14Mhz ld (scnbak), a ; lo pongo a 14Mhz
out (c), a out (c), a
ld de, fincad-1 ; descomprimo cadenas ld de, fincad-1 ; descomprimo cadenas
@ -460,9 +461,19 @@ star19 sub $80
star20 jp z, blst star20 jp z, blst
sub $1d-$0c sub $1d-$0c
jp z, launch jp z, launch
cp $17-$1d cp $2f-$1d ;'/'
jr nz, star20a
push af
ld a,1
ld (roboot), a ; set boot as root
out (254), a
halt
xor a
out (254), a
pop af
star20a cp $17-$1d ; 'Edit'
jr nz, star19 jr nz, star19
ELSE ELSE
pop af pop af
star21 wreg flash_cs, 0 ; activamos spi, enviando un 0 star21 wreg flash_cs, 0 ; activamos spi, enviando un 0
wreg flash_spi, 6 ; envío write enable wreg flash_spi, 6 ; envío write enable
@ -4249,6 +4260,14 @@ conti7 pop bc
conti8 dec (ix+1) conti8 dec (ix+1)
jr nz, conti5 jr nz, conti5
conti9 ld a, 0 conti9 ld a, 0
push af
ld a, (roboot) ; Apply root boot
cp 1
jr nz, conti9a
pop af
and %01111111
push af
conti9a pop af
dec b dec b
out (c), 0;d out (c), 0;d
inc b inc b
@ -4272,7 +4291,6 @@ conti9 ld a, 0
contia out (c), a contia out (c), a
rst 0 rst 0
ENDIF ENDIF
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