From 8365ef5bc992902c253545487ef762d0051d54ee Mon Sep 17 00:00:00 2001 From: antoniovillena Date: Wed, 4 May 2016 19:02:06 +0200 Subject: [PATCH] =?UTF-8?q?Algunos=20ajustes=20m=C3=A1s?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- cores/JupiterAce/fpga_ace.v | 2 +- cores/JupiterAce/jupiter_ace.prj | 2 +- cores/JupiterAce/jupiter_ace.v | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/cores/JupiterAce/fpga_ace.v b/cores/JupiterAce/fpga_ace.v index d0f9006..3c8fa3e 100644 --- a/cores/JupiterAce/fpga_ace.v +++ b/cores/JupiterAce/fpga_ace.v @@ -21,7 +21,7 @@ // ////////////////////////////////////////////////////////////////////////////////// -module jupiter_ace ( +module fpga_ace ( input wire clkram, input wire clk65, input wire clkcpu, diff --git a/cores/JupiterAce/jupiter_ace.prj b/cores/JupiterAce/jupiter_ace.prj index ec3518e..894ba1c 100644 --- a/cores/JupiterAce/jupiter_ace.prj +++ b/cores/JupiterAce/jupiter_ace.prj @@ -10,4 +10,4 @@ verilog work "jace_logic.v" verilog work "relojes.v" verilog work "keyboard_for_ace.v" verilog work "fpga_ace.v" -verilog work "tld_jace_spartan6.v" +verilog work "jupiter_ace.v" diff --git a/cores/JupiterAce/jupiter_ace.v b/cores/JupiterAce/jupiter_ace.v index 9028dc1..18f3eca 100644 --- a/cores/JupiterAce/jupiter_ace.v +++ b/cores/JupiterAce/jupiter_ace.v @@ -19,7 +19,7 @@ // Additional Comments: // ////////////////////////////////////////////////////////////////////////////////// -module tld_jace_spartan6 ( +module jupiter_ace ( input wire clk50mhz, input wire clkps2, input wire dataps2, @@ -70,7 +70,7 @@ module tld_jace_spartan6 ( .CLK_OUT4() // Super CPU clock (just a test) ); - jupiter_ace the_core ( + fpga_ace the_core ( .clkram(clkram), .clk65(clk65), .clkcpu(clkcpu),