mirror of https://github.com/zxdos/zxuno.git
rtc.sys bug mcleod
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antoniovillena
parent
97162fb615
commit
920831ce69
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SD/SYS/RTC.SYS
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SD/SYS/RTC.SYS
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@ -51,6 +51,7 @@ BINS=\
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COREBIOS\
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ZX1\
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DATE\
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RTCST\
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RTC.SYS\
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ROMSBACK\
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ROMSUPGR\
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@ -206,6 +207,12 @@ build/DATE: $(srcdir)/date.asm\
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| build
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$(AS) $(AFLAGS) --raw=$@ $<
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build/RTCST: $(srcdir)/rtcst.asm\
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$(INCLUDEDIR)/zxuno.def\
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$(INCLUDEDIR)/esxdos.def\
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| build
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$(AS) $(AFLAGS) --raw=$@ $<
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build/RTC.SYS: $(srcdir)/rtc.asm\
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$(INCLUDEDIR)/zxuno.def\
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$(INCLUDEDIR)/esxdos.def\
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@ -142,6 +142,8 @@ Send1 ld d, SCL0SDA1
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out (c), d
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ld d, SCL1SDA1
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out (c), d ;Transmito un bit 1 para dejar SDA en modo de alta impedancia y que el receptor puedo ponerlo a 0
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ld d, SCL0SDA1
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out (c), d
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ret ; S flag 0 = ACK received, S flag 1 = ACK not received
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RcvByte ld a, 1 ;byte a recibir en A. BC=puerto de datos del ZXUNO ya apuntando a I2CREG. Usa y modifica: A, D, flags
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@ -156,4 +158,6 @@ Send0 ld d, SCL0SDA0
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out (c), d
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ld d, SCL1SDA0
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out (c), d
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ld d, SCL0SDA0
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out (c), d
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ret
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@ -0,0 +1,124 @@
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; rtcst.asm - set register and value in pcf8563
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; .rtcst VVRR
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; -RR register in BCD
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; -VV value in BCD
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; Copyright (C) 2022 Antonio Villena/McLeod_ideafix
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;
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; This program is free software: you can redistribute it and/or modify
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; it under the terms of the GNU General Public License as published by
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; the Free Software Foundation, version 3.
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;
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; This program is distributed in the hope that it will be useful,
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; but WITHOUT ANY WARRANTY; without even the implied warranty of
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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; GNU General Public License for more details.
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;
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; You should have received a copy of the GNU General Public License
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; along with this program. If not, see <https://www.gnu.org/licenses/>.
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;
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; Compatible compilers:
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; SjAsmPlus, <https://github.com/z00m128/sjasmplus>
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; output RTCST
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define SCL0SDA0 00b
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define SCL0SDA1 01b
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define SCL1SDA0 10b
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define SCL1SDA1 11b
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define I2CADDR_R $a3
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define I2CADDR_W $a2
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include zxuno.def
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include esxdos.def
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org $2000 ; comienzo de la ejecución de los comandos ESXDOS
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NoPrint ld (Command+1), hl
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ld a, h
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or l
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jp nz, Init
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call Print
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DateFormat db 13,'Usage:', 13
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db ' .RTCST VVRR', 13
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db 'VV->Value, RR->Register', 13
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ret
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Params db 0, 0
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Wrong call Print
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dz 'Wrong format entered', 13
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ret
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Init ld b, 5
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Repite ld a, (hl)
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cp 13
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jr z, Fincad
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inc hl
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dec b
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sub $30
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cp 16
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jr c, Repite
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Fincad djnz Wrong
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Command ld hl, 0
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ld de, Params+2
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call ReadBCD
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call ReadBCD
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ex de, hl
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ld e, 2
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ld bc, ZXUNOADDR
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ld a, i2creg
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out (c), a ; selecciono el registro I2C.
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inc b
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ld a, SCL1SDA1 ;Bus en modo idle.
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out (c), a ;Envío condición de START al bus (SDA a 0 mientras mantengo SCL a 1)
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dec a ;ld a,SCL1SDA0
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out (c), a
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ld a, I2CADDR_W ;Envío la dirección I2C de escritura del RTC
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call SendByte
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LoopSendMess ld a, (hl) ;y en un bucle, me pongo a enviar uno tras otro, los E bytes a los que apunta HL
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inc hl
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call SendByte
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dec e
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jr nz, LoopSendMess
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call Send0 ;después de enviar el ultimo byte, envío la condición de STOP al bus (envío un 0, con lo que se queda SDA a 0 y SCL a 1, y a continuación pongo SDA a 1)
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ld d, SCL1SDA1
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out (c), d
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or a
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ret
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SendByte scf ;Enviar un byte por I2C. Byte en A. BC=puerto de datos del ZXUNO ya
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adc a, a ;apuntando a I2CREG. Usa y modifica: A, D, flags
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Trans call c, Send1
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call nc, Send0
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add a, a
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jr nz, Trans
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Send1 ld d, SCL0SDA1
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out (c), d
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ld d, SCL1SDA1
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out (c), d ;Transmito un bit 1 para dejar SDA en modo de alta impedancia y que el receptor puedo ponerlo a 0
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ld d, SCL0SDA1
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out (c), d
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ret ; S flag 0 = ACK received, S flag 1 = ACK not received
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Send0 ld d, SCL0SDA0
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out (c), d
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ld d, SCL1SDA0
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out (c), d
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ld d, SCL0SDA0
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out (c), d
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ret
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ReadBCD ld a, (hl)
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inc hl
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sub $30
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rlca
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rlca
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rlca
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rlca
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ld c, a
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ld a, (hl)
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inc hl
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sub $30
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or c
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dec de
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ld (de), a
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ret
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include Print.inc
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