mirror of https://github.com/zxdos/zxuno.git
Actualizo Sam
This commit is contained in:
antoniovillena
parent
d5de44e85e
commit
a4b8fc7457
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# Clocks & debug
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NET "clk50mhz" LOC="P55" | IOSTANDARD = LVCMOS33 | PERIOD=20.0ns;
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#NET "testled" LOC="P2" | IOSTANDARD = LVCMOS33;
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# Video output
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NET "r<2>" LOC="P97" | IOSTANDARD = LVCMOS33;
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NET "r<1>" LOC="P95" | IOSTANDARD = LVCMOS33;
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NET "r<0>" LOC="P94" | IOSTANDARD = LVCMOS33;
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NET "g<2>" LOC="P88" | IOSTANDARD = LVCMOS33;
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NET "g<1>" LOC="P87" | IOSTANDARD = LVCMOS33;
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NET "g<0>" LOC="P85" | IOSTANDARD = LVCMOS33;
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NET "b<2>" LOC="P84" | IOSTANDARD = LVCMOS33;
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NET "b<1>" LOC="P83" | IOSTANDARD = LVCMOS33;
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NET "b<0>" LOC="P82" | IOSTANDARD = LVCMOS33;
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NET "csync" LOC="P93" | IOSTANDARD = LVCMOS33;
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#NET "vsync" LOC="P92" | IOSTANDARD = LVCMOS33;
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NET "stdn" LOC="P51" | IOSTANDARD = LVCMOS33;
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NET "stdnb" LOC="P50" | IOSTANDARD = LVCMOS33;
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# Sound input/output
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NET "audio_out_left" LOC="P98" | IOSTANDARD = LVCMOS33;
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NET "audio_out_right" LOC="P99" | IOSTANDARD = LVCMOS33;
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NET "ear" LOC="P1" | IOSTANDARD = LVCMOS33;
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# Keyboard and mouse
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NET "clkps2" LOC="P143" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "dataps2" LOC="P142" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "mouseclk" LOC="P57" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "mousedata" LOC="P56" | IOSTANDARD = LVCMOS33 | PULLUP;
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# SRAM
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NET "sram_addr<0>" LOC="P115" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<1>" LOC="P116" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<2>" LOC="P117" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<3>" LOC="P119" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<4>" LOC="P120" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<5>" LOC="P123" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<6>" LOC="P126" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<7>" LOC="P131" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<8>" LOC="P127" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<9>" LOC="P124" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<10>" LOC="P118" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<11>" LOC="P121" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<12>" LOC="P133" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<13>" LOC="P132" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<14>" LOC="P137" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<15>" LOC="P140" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<16>" LOC="P139" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<17>" LOC="P141" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<18>" LOC="P138" | IOSTANDARD = LVCMOS33;
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#NET "sram_addr<19>" LOC="P111" | IOSTANDARD = LVCMOS33;
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#NET "sram_addr<20>" LOC="P138" | IOSTANDARD = LVCMOS33;
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NET "sram_data<0>" LOC="P114" | IOSTANDARD = LVCMOS33;
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NET "sram_data<1>" LOC="P112" | IOSTANDARD = LVCMOS33;
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NET "sram_data<2>" LOC="P111" | IOSTANDARD = LVCMOS33;
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NET "sram_data<3>" LOC="P105" | IOSTANDARD = LVCMOS33;
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NET "sram_data<4>" LOC="P104" | IOSTANDARD = LVCMOS33;
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NET "sram_data<5>" LOC="P102" | IOSTANDARD = LVCMOS33;
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NET "sram_data<6>" LOC="P101" | IOSTANDARD = LVCMOS33;
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NET "sram_data<7>" LOC="P100" | IOSTANDARD = LVCMOS33;
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NET "sram_we_n" LOC="P134" | IOSTANDARD = LVCMOS33;
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# SPI Flash
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#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33;
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#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33;
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#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33;
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#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33;
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#NET "flash_ext1" LOC="P62" | IOSTANDARD = LVCMOS33;
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#NET "flash_ext2" LOC="P61" | IOSTANDARD = LVCMOS33;
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# SD/MMC
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#NET "sd_cs_n" LOC="P78" | IOSTANDARD = LVCMOS33;
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#NET "sd_clk" LOC="P80" | IOSTANDARD = LVCMOS33;
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#NET "sd_mosi" LOC="P79" | IOSTANDARD = LVCMOS33;
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#NET "sd_miso" LOC="P81" | IOSTANDARD = LVCMOS33;
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# JOYSTICK
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#NET "joyup" LOC="P74" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joydown" LOC="P67" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyleft" LOC="P59" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyright" LOC="P58" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyfire" LOC="P75" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyfire2" LOC="P8" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyfire3" LOC="P39" | IOSTANDARD = LVCMOS33 | PULLUP;
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# Otros
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NET "clk12" PERIOD=83 ns;
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@ -0,0 +1,91 @@
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# Clocks & debug
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NET "clk50mhz" LOC="P55" | IOSTANDARD = LVCMOS33 | PERIOD=20.0ns;
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NET "testled" LOC="P10" | IOSTANDARD = LVCMOS33;
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# Video output
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NET "r<2>" LOC="P93" | IOSTANDARD = LVCMOS33;
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NET "r<1>" LOC="P92" | IOSTANDARD = LVCMOS33;
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NET "r<0>" LOC="P88" | IOSTANDARD = LVCMOS33;
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NET "g<2>" LOC="P84" | IOSTANDARD = LVCMOS33;
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NET "g<1>" LOC="P83" | IOSTANDARD = LVCMOS33;
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NET "g<0>" LOC="P82" | IOSTANDARD = LVCMOS33;
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NET "b<2>" LOC="P81" | IOSTANDARD = LVCMOS33;
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NET "b<1>" LOC="P80" | IOSTANDARD = LVCMOS33;
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NET "b<0>" LOC="P79" | IOSTANDARD = LVCMOS33;
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NET "csync" LOC="P87" | IOSTANDARD = LVCMOS33;
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#NET "vsync" LOC="P85" | IOSTANDARD = LVCMOS33;
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NET "stdn" LOC="P67" | IOSTANDARD = LVCMOS33;
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NET "stdnb" LOC="P66" | IOSTANDARD = LVCMOS33;
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# Sound input/output
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NET "audio_out_left" LOC="P8" | IOSTANDARD = LVCMOS33;
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NET "audio_out_right" LOC="P9" | IOSTANDARD = LVCMOS33;
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NET "ear" LOC="P105" | IOSTANDARD = LVCMOS33;
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# Keyboard and mouse
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NET "clkps2" LOC="P98" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "dataps2" LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "mouseclk" LOC="P94" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "mousedata" LOC="P95" | IOSTANDARD = LVCMOS33 | PULLUP;
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# SRAM
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NET "sram_addr<0>" LOC="P115" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<1>" LOC="P116" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<2>" LOC="P117" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<3>" LOC="P119" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<4>" LOC="P120" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<5>" LOC="P123" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<6>" LOC="P126" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<7>" LOC="P131" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<8>" LOC="P127" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<9>" LOC="P124 | IOSTANDARD = LVCMOS33;
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NET "sram_addr<10>" LOC="P118" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<11>" LOC="P121" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<12>" LOC="P133" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<13>" LOC="P132" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<14>" LOC="P137" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<15>" LOC="P140" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<16>" LOC="P139" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<17>" LOC="P141" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<18>" LOC="P138" | IOSTANDARD = LVCMOS33;
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#NET "sram_addr<19>" LOC="P111" | IOSTANDARD = LVCMOS33;
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#NET "sram_addr<20>" LOC="P138" | IOSTANDARD = LVCMOS33;
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NET "sram_data<0>" LOC="P114" | IOSTANDARD = LVCMOS33;
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NET "sram_data<1>" LOC="P112" | IOSTANDARD = LVCMOS33;
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NET "sram_data<2>" LOC="P111" | IOSTANDARD = LVCMOS33;
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NET "sram_data<3>" LOC="P99" | IOSTANDARD = LVCMOS33;
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NET "sram_data<4>" LOC="P100" | IOSTANDARD = LVCMOS33;
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NET "sram_data<5>" LOC="P101" | IOSTANDARD = LVCMOS33;
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NET "sram_data<6>" LOC="P102" | IOSTANDARD = LVCMOS33;
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NET "sram_data<7>" LOC="P104" | IOSTANDARD = LVCMOS33;
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NET "sram_we_n" LOC="P134" | IOSTANDARD = LVCMOS33;
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# SPI Flash
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#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33;
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#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33;
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#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33;
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#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33;
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#NET "flash_ext1" LOC="P62" | IOSTANDARD = LVCMOS33;
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#NET "flash_ext2" LOC="P61" | IOSTANDARD = LVCMOS33;
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# SD/MMC
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#NET "sd_cs_n" LOC="P59" | IOSTANDARD = LVCMOS33;
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#NET "sd_clk" LOC="P75" | IOSTANDARD = LVCMOS33;
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#NET "sd_mosi" LOC="P74" | IOSTANDARD = LVCMOS33;
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#NET "sd_miso" LOC="P78" | IOSTANDARD = LVCMOS33;
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# JOYSTICK
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#NET "joyup" LOC="P142" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joydown" LOC="P1" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyleft" LOC="P2" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyright" LOC="P5" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyfire" LOC="P143" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyfire2" LOC="P6" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyfire3" LOC="P7" | IOSTANDARD = LVCMOS33 | PULLUP;
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# Otros
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NET "clk12" PERIOD=83 ns;
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@ -0,0 +1,91 @@
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# Clocks & debug
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NET "clk50mhz" LOC="P55" | IOSTANDARD = LVCMOS33 | PERIOD=20.0ns;
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NET "testled" LOC="P10" | IOSTANDARD = LVCMOS33;
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# Video output
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NET "r<2>" LOC="P93" | IOSTANDARD = LVCMOS33;
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NET "r<1>" LOC="P92" | IOSTANDARD = LVCMOS33;
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NET "r<0>" LOC="P88" | IOSTANDARD = LVCMOS33;
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NET "g<2>" LOC="P84" | IOSTANDARD = LVCMOS33;
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NET "g<1>" LOC="P83" | IOSTANDARD = LVCMOS33;
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NET "g<0>" LOC="P82" | IOSTANDARD = LVCMOS33;
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NET "b<2>" LOC="P81" | IOSTANDARD = LVCMOS33;
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NET "b<1>" LOC="P80" | IOSTANDARD = LVCMOS33;
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NET "b<0>" LOC="P79" | IOSTANDARD = LVCMOS33;
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NET "csync" LOC="P87" | IOSTANDARD = LVCMOS33;
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#NET "vsync" LOC="P85" | IOSTANDARD = LVCMOS33;
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NET "stdn" LOC="P67" | IOSTANDARD = LVCMOS33;
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NET "stdnb" LOC="P66" | IOSTANDARD = LVCMOS33;
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# Sound input/output
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NET "audio_out_left" LOC="P8" | IOSTANDARD = LVCMOS33;
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NET "audio_out_right" LOC="P9" | IOSTANDARD = LVCMOS33;
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NET "ear" LOC="P105" | IOSTANDARD = LVCMOS33;
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# Keyboard and mouse
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NET "clkps2" LOC="P98" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "dataps2" LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "mouseclk" LOC="P94" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "mousedata" LOC="P95" | IOSTANDARD = LVCMOS33 | PULLUP;
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# SRAM
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NET "sram_addr<0>" LOC="P143" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<1>" LOC="P142" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<2>" LOC="P141" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<3>" LOC="P140" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<4>" LOC="P139" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<5>" LOC="P104" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<6>" LOC="P102" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<7>" LOC="P101" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<8>" LOC="P100" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<9>" LOC="P99" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<10>" LOC="P112" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<11>" LOC="P114" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<12>" LOC="P115" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<13>" LOC="P116" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<14>" LOC="P117" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<15>" LOC="P131" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<16>" LOC="P133" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<17>" LOC="P134" | IOSTANDARD = LVCMOS33;
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NET "sram_addr<18>" LOC="P137" | IOSTANDARD = LVCMOS33;
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#NET "sram_addr<19>" LOC="P111" | IOSTANDARD = LVCMOS33;
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#NET "sram_addr<20>" LOC="P138" | IOSTANDARD = LVCMOS33;
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NET "sram_data<0>" LOC="P132" | IOSTANDARD = LVCMOS33;
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NET "sram_data<1>" LOC="P126" | IOSTANDARD = LVCMOS33;
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NET "sram_data<2>" LOC="P123" | IOSTANDARD = LVCMOS33;
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NET "sram_data<3>" LOC="P120" | IOSTANDARD = LVCMOS33;
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NET "sram_data<4>" LOC="P119" | IOSTANDARD = LVCMOS33;
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NET "sram_data<5>" LOC="P121" | IOSTANDARD = LVCMOS33;
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NET "sram_data<6>" LOC="P124" | IOSTANDARD = LVCMOS33;
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NET "sram_data<7>" LOC="P127" | IOSTANDARD = LVCMOS33;
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NET "sram_we_n" LOC="P118" | IOSTANDARD = LVCMOS33;
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# SPI Flash
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#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33;
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#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33;
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#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33;
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#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33;
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#NET "flash_ext1" LOC="P62" | IOSTANDARD = LVCMOS33;
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#NET "flash_ext2" LOC="P61" | IOSTANDARD = LVCMOS33;
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# SD/MMC
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#NET "sd_cs_n" LOC="P59" | IOSTANDARD = LVCMOS33;
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#NET "sd_clk" LOC="P75" | IOSTANDARD = LVCMOS33;
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#NET "sd_mosi" LOC="P74" | IOSTANDARD = LVCMOS33;
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#NET "sd_miso" LOC="P78" | IOSTANDARD = LVCMOS33;
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# JOYSTICK
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#NET "joyup" LOC="P1" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joydown" LOC="P5" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyleft" LOC="P6" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyright" LOC="P7" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyfire" LOC="P2" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyfire2" LOC="P8" | IOSTANDARD = LVCMOS33 | PULLUP;
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#NET "joyfire3" LOC="P39" | IOSTANDARD = LVCMOS33 | PULLUP;
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# Otros
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NET "clk12" PERIOD=83 ns;
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@ -0,0 +1,91 @@
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# Clocks & debug
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NET "clk50mhz" LOC="P55" | IOSTANDARD = LVCMOS33 | PERIOD=20.0ns;
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NET "testled" LOC="P11" | IOSTANDARD = LVCMOS33;
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# Video output
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NET "r<2>" LOC="P81" | IOSTANDARD = LVCMOS33;
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NET "r<1>" LOC="P80" | IOSTANDARD = LVCMOS33;
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NET "r<0>" LOC="P79" | IOSTANDARD = LVCMOS33;
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NET "g<2>" LOC="P84" | IOSTANDARD = LVCMOS33;
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NET "g<1>" LOC="P83" | IOSTANDARD = LVCMOS33;
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NET "g<0>" LOC="P82" | IOSTANDARD = LVCMOS33;
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NET "b<2>" LOC="P93" | IOSTANDARD = LVCMOS33;
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NET "b<1>" LOC="P92" | IOSTANDARD = LVCMOS33;
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NET "b<0>" LOC="P88" | IOSTANDARD = LVCMOS33;
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NET "csync" LOC="P87" | IOSTANDARD = LVCMOS33;
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||||
#NET "vsync" LOC="P85" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdn" LOC="P66" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdnb" LOC="P67" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Sound input/output
|
||||
NET "audio_out_left" LOC="P10" | IOSTANDARD = LVCMOS33;
|
||||
NET "audio_out_right" LOC="P9" | IOSTANDARD = LVCMOS33;
|
||||
NET "ear" LOC="P94" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Keyboard and mouse
|
||||
NET "clkps2" LOC="P99" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
NET "dataps2" LOC="P98" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
#NET "mouseclk" LOC="P95" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
#NET "mousedata" LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
|
||||
# SRAM
|
||||
NET "sram_addr<0>" LOC="P141" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<1>" LOC="P139" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<2>" LOC="P137" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<3>" LOC="P134" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<4>" LOC="P133" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<5>" LOC="P120" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<6>" LOC="P118" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<7>" LOC="P116" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<8>" LOC="P114" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<9>" LOC="P112" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<10>" LOC="P104" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<11>" LOC="P102" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<12>" LOC="P101" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<13>" LOC="P100" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<14>" LOC="P111" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<15>" LOC="P131" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<16>" LOC="P138" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<17>" LOC="P140" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<18>" LOC="P142" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<19>" LOC="P105" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<20>" LOC="P143" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_data<0>" LOC="P132" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<1>" LOC="P127" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<2>" LOC="P124" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<3>" LOC="P123" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<4>" LOC="P115" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<5>" LOC="P117" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<6>" LOC="P119" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<7>" LOC="P126" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_we_n" LOC="P121" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SPI Flash
|
||||
#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_ext1" LOC="P62" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_ext2" LOC="P61" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SD/MMC
|
||||
#NET "sd_cs_n" LOC="P59" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_clk" LOC="P75" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_mosi" LOC="P74" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_miso" LOC="P78" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# JOYSTICK
|
||||
#NET "joyup" LOC="P1" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
#NET "joydown" LOC="P5" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
#NET "joyleft" LOC="P6" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
#NET "joyright" LOC="P7" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
#NET "joyfire" LOC="P2" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
#NET "joyfire2" LOC="P8" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
#NET "joyfire3" LOC="P39" | IOSTANDARD = LVCMOS33 | PULLUP;
|
||||
|
||||
|
||||
# Otros
|
||||
NET "clk12" PERIOD=83 ns;
|
||||
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
SET machine=tld_sam
|
||||
SET ruta_ucf=SamCoupe
|
||||
SET ruta_bat=..\
|
||||
call %ruta_bat%genxst.bat
|
||||
call %ruta_bat%generar.bat v2
|
||||
call %ruta_bat%generar.bat v3
|
||||
call %ruta_bat%generar.bat v4
|
||||
call %ruta_bat%generar.bat Ap
|
||||
|
|
@ -1,82 +0,0 @@
|
|||
# Clocks & debug
|
||||
NET "clk50mhz" LOC="P55" | IOSTANDARD = LVCMOS33;
|
||||
#NET "testled" LOC="2" | IOSTANDARD = LVCMOS33;
|
||||
NET "clk50mhz" PERIOD=20 ns;
|
||||
NET "clk12" PERIOD=83 ns;
|
||||
|
||||
# Video output
|
||||
NET "r<2>" LOC="P97" | IOSTANDARD = LVCMOS33;
|
||||
NET "r<1>" LOC="P95" | IOSTANDARD = LVCMOS33;
|
||||
NET "r<0>" LOC="P94" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<2>" LOC="P88" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<1>" LOC="P87" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<0>" LOC="P85" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<2>" LOC="P84" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<1>" LOC="P83" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<0>" LOC="P82" | IOSTANDARD = LVCMOS33;
|
||||
NET "csync" LOC="P93" | IOSTANDARD = LVCMOS33;
|
||||
#NET "vsync" LOC="P92" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdn" LOC="P51" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdnb" LOC="P50" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Sound input/output
|
||||
NET "audio_out_left" LOC="P98" | IOSTANDARD = LVCMOS33;
|
||||
NET "audio_out_right" LOC="P99" | IOSTANDARD = LVCMOS33;
|
||||
NET "ear" LOC="P1" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Keyboard and mouse
|
||||
NET "clkps2" LOC="P143" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 1 DIN
|
||||
NET "dataps2" LOC="P142" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 5 DIN
|
||||
#NET "mouseclk" LOC="P57" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 6 DIN
|
||||
#NET "mousedata" LOC="P56" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 2 DIN
|
||||
|
||||
# SRAM
|
||||
NET "sram_addr<0>" LOC="P115" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<1>" LOC="P116" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<2>" LOC="P117" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<3>" LOC="P119" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<4>" LOC="P120" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<5>" LOC="P123" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<6>" LOC="P126" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<7>" LOC="P131" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<8>" LOC="P127" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<9>" LOC="P124" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<10>" LOC="P118" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<11>" LOC="P121" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<12>" LOC="P133" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<13>" LOC="P132" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<14>" LOC="P137" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<15>" LOC="P140" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<16>" LOC="P139" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<17>" LOC="P141" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<18>" LOC="P138" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_data<0>" LOC="P114" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<1>" LOC="P112" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<2>" LOC="P111" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<3>" LOC="P105" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<4>" LOC="P104" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<5>" LOC="P102" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<6>" LOC="P101" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<7>" LOC="P100" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_we_n" LOC="P134" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SPI Flash
|
||||
#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SD/MMC
|
||||
#NET "sd_cs_n" LOC="P78" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_clk" LOC="P80" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_mosi" LOC="P79" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_miso" LOC="P81" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# JOYSTICK
|
||||
#NET "joyup" LOC="P74" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY6
|
||||
#NET "joydown" LOC="P67" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY4
|
||||
#NET "joyleft" LOC="P59" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY3
|
||||
#NET "joyright" LOC="P58" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY2
|
||||
#NET "joyfire" LOC="P75" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY7
|
||||
|
|
@ -1,82 +0,0 @@
|
|||
# Clocks & debug
|
||||
NET "clk50mhz" LOC="P55" | IOSTANDARD = LVCMOS33;
|
||||
#NET "testled" LOC="2" | IOSTANDARD = LVCMOS33;
|
||||
NET "clk50mhz" PERIOD=20 ns;
|
||||
NET "clk12" PERIOD=83 ns;
|
||||
|
||||
# Video output
|
||||
NET "r<2>" LOC="P97" | IOSTANDARD = LVCMOS33;
|
||||
NET "r<1>" LOC="P95" | IOSTANDARD = LVCMOS33;
|
||||
NET "r<0>" LOC="P94" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<2>" LOC="P88" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<1>" LOC="P87" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<0>" LOC="P85" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<2>" LOC="P84" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<1>" LOC="P83" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<0>" LOC="P82" | IOSTANDARD = LVCMOS33;
|
||||
NET "csync" LOC="P93" | IOSTANDARD = LVCMOS33;
|
||||
#NET "vsync" LOC="P92" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdn" LOC="P51" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdnb" LOC="P50" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Sound input/output
|
||||
NET "audio_out_left" LOC="P98" | IOSTANDARD = LVCMOS33;
|
||||
NET "audio_out_right" LOC="P99" | IOSTANDARD = LVCMOS33;
|
||||
NET "ear" LOC="P1" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Keyboard and mouse
|
||||
NET "clkps2" LOC="P143" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 1 DIN
|
||||
NET "dataps2" LOC="P142" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 5 DIN
|
||||
#NET "mouseclk" LOC="P57" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 6 DIN
|
||||
#NET "mousedata" LOC="P56" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 2 DIN
|
||||
|
||||
# SRAM
|
||||
NET "sram_addr<0>" LOC="P115" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<1>" LOC="P116" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<2>" LOC="P117" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<3>" LOC="P119" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<4>" LOC="P120" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<5>" LOC="P123" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<6>" LOC="P126" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<7>" LOC="P131" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<8>" LOC="P127" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<9>" LOC="P124" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<10>" LOC="P118" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<11>" LOC="P121" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<12>" LOC="P133" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<13>" LOC="P132" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<14>" LOC="P137" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<15>" LOC="P140" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<16>" LOC="P139" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<17>" LOC="P141" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<18>" LOC="P138" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_data<0>" LOC="P114" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<1>" LOC="P112" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<2>" LOC="P111" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<3>" LOC="P105" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<4>" LOC="P104" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<5>" LOC="P102" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<6>" LOC="P101" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<7>" LOC="P100" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_we_n" LOC="P134" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SPI Flash
|
||||
#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SD/MMC
|
||||
#NET "sd_cs_n" LOC="P78" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_clk" LOC="P80" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_mosi" LOC="P79" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_miso" LOC="P81" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# JOYSTICK
|
||||
#NET "joyup" LOC="P74" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY6
|
||||
#NET "joydown" LOC="P67" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY4
|
||||
#NET "joyleft" LOC="P59" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY3
|
||||
#NET "joyright" LOC="P58" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY2
|
||||
#NET "joyfire" LOC="P75" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY7
|
||||
|
|
@ -1,107 +0,0 @@
|
|||
# Clocks & debug
|
||||
NET "clk50mhz" LOC="P55" | IOSTANDARD = LVCMOS33;
|
||||
#NET "testled" LOC="P10" | IOSTANDARD = LVCMOS33;
|
||||
NET "clk50mhz" PERIOD=20 ns;
|
||||
NET "clk12" PERIOD=83 ns;
|
||||
|
||||
# Video output
|
||||
NET "r<2>" LOC="P93" | IOSTANDARD = LVCMOS33;
|
||||
NET "r<1>" LOC="P92" | IOSTANDARD = LVCMOS33;
|
||||
NET "r<0>" LOC="P88" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<2>" LOC="P84" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<1>" LOC="P83" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<0>" LOC="P82" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<2>" LOC="P81" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<1>" LOC="P80" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<0>" LOC="P79" | IOSTANDARD = LVCMOS33;
|
||||
NET "csync" LOC="P87" | IOSTANDARD = LVCMOS33;
|
||||
#NET "vsync" LOC="P85" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdn" LOC="P67" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdnb" LOC="P66" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Sound input/output
|
||||
NET "audio_out_left" LOC="P8" | IOSTANDARD = LVCMOS33;
|
||||
NET "audio_out_right" LOC="P9" | IOSTANDARD = LVCMOS33;
|
||||
NET "ear" LOC="P105" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Keyboard and mouse
|
||||
NET "clkps2" LOC="P98" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 1 DIN
|
||||
NET "dataps2" LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 5 DIN
|
||||
#NET "mouseclk" LOC="P94" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 6 DIN
|
||||
#NET "mousedata" LOC="P95" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 2 DIN
|
||||
|
||||
# SRAM
|
||||
NET "sram_addr<0>" LOC="P139" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<1>" LOC="P140" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<2>" LOC="P141" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<3>" LOC="P142" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<4>" LOC="P143" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<5>" LOC="P137" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<6>" LOC="P134" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<7>" LOC="P133" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<8>" LOC="P131" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<9>" LOC="P117" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<10>" LOC="P116" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<11>" LOC="P115" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<12>" LOC="P114" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<13>" LOC="P112" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<14>" LOC="P99" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<15>" LOC="P100" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<16>" LOC="P101" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<17>" LOC="P102" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<18>" LOC="P104" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
#NET "sram_addr<0>" LOC="P143" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<1>" LOC="P142" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<2>" LOC="P141" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<3>" LOC="P140" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<4>" LOC="P139" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<5>" LOC="P104" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<6>" LOC="P102" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<7>" LOC="P101" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<8>" LOC="P100" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<9>" LOC="P99" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<10>" LOC="P112" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<11>" LOC="P114" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<12>" LOC="P115" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<13>" LOC="P116" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<14>" LOC="P117" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<15>" LOC="P131" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<16>" LOC="P133" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<17>" LOC="P134" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<18>" LOC="P137" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
#NET "sram_addr<19>" LOC="P111" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<20>" LOC="P138" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_data<0>" LOC="P132" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<1>" LOC="P126" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<2>" LOC="P123" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<3>" LOC="P120" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<4>" LOC="P119" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<5>" LOC="P121" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<6>" LOC="P124" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<7>" LOC="P127" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_we_n" LOC="P118" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SPI Flash
|
||||
#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_ext1" LOC="P62" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_ext2" LOC="P61" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SD/MMC
|
||||
#NET "sd_cs_n" LOC="P59" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_clk" LOC="P75" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_mosi" LOC="P74" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_miso" LOC="P78" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# JOYSTICK
|
||||
#NET "joyup" LOC="P142" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY6
|
||||
#NET "joydown" LOC="P1" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY4
|
||||
#NET "joyleft" LOC="P2" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY3
|
||||
#NET "joyright" LOC="P5" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY2
|
||||
#NET "joyfire" LOC="P143" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY7
|
||||
|
|
@ -1,85 +0,0 @@
|
|||
# Clocks & debug
|
||||
NET "clk50mhz" LOC="P55" | IOSTANDARD = LVCMOS33;
|
||||
NET "testled" LOC="P10" | IOSTANDARD = LVCMOS33;
|
||||
NET "clk50mhz" PERIOD=20 ns;
|
||||
NET "clk12" PERIOD=83 ns;
|
||||
|
||||
# Video output
|
||||
NET "b<2>" LOC="P93" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<1>" LOC="P92" | IOSTANDARD = LVCMOS33;
|
||||
NET "b<0>" LOC="P88" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<2>" LOC="P84" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<1>" LOC="P83" | IOSTANDARD = LVCMOS33;
|
||||
NET "g<0>" LOC="P82" | IOSTANDARD = LVCMOS33;
|
||||
NET "r<2>" LOC="P81" | IOSTANDARD = LVCMOS33;
|
||||
NET "r<1>" LOC="P80" | IOSTANDARD = LVCMOS33;
|
||||
NET "r<0>" LOC="P79" | IOSTANDARD = LVCMOS33;
|
||||
NET "hsync" LOC="P87" | IOSTANDARD = LVCMOS33;
|
||||
NET "vsync" LOC="P85" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdn" LOC="P66" | IOSTANDARD = LVCMOS33;
|
||||
NET "stdnb" LOC="P67" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Sound input/output
|
||||
NET "audio_out_left" LOC="P10" | IOSTANDARD = LVCMOS33;
|
||||
NET "audio_out_right" LOC="P9" | IOSTANDARD = LVCMOS33;
|
||||
NET "ear" LOC="P94" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# Keyboard and mouse
|
||||
NET "clkps2" LOC="P99" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 1 DIN
|
||||
NET "dataps2" LOC="P98" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 5 DIN
|
||||
#NET "mouseclk" LOC="P95" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 6 DIN
|
||||
#NET "mousedata" LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP; # pin 2 DIN
|
||||
|
||||
# SRAM
|
||||
NET "sram_addr<0>" LOC="P141" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<1>" LOC="P139" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<2>" LOC="P137" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<3>" LOC="P134" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<4>" LOC="P133" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<5>" LOC="P120" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<6>" LOC="P118" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<7>" LOC="P116" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<8>" LOC="P114" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<9>" LOC="P112" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<10>" LOC="P104" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<11>" LOC="P102" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<12>" LOC="P101" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<13>" LOC="P100" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<14>" LOC="P111" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<15>" LOC="P131" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<16>" LOC="P138" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<17>" LOC="P140" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_addr<18>" LOC="P142" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<19>" LOC="P105" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sram_addr<20>" LOC="P143" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_data<0>" LOC="P132" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<1>" LOC="P127" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<2>" LOC="P124" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<3>" LOC="P123" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<4>" LOC="P115" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<5>" LOC="P117" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<6>" LOC="P119" | IOSTANDARD = LVCMOS33;
|
||||
NET "sram_data<7>" LOC="P126" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
NET "sram_we_n" LOC="P121" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SPI Flash
|
||||
#NET "flash_cs_n" LOC="P38" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_clk" LOC="P70" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_mosi" LOC="P64" | IOSTANDARD = LVCMOS33;
|
||||
#NET "flash_miso" LOC="P65" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# SD/MMC
|
||||
#NET "sd_cs_n" LOC="P59" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_clk" LOC="P75" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_mosi" LOC="P74" | IOSTANDARD = LVCMOS33;
|
||||
#NET "sd_miso" LOC="P78" | IOSTANDARD = LVCMOS33;
|
||||
|
||||
# JOYSTICK
|
||||
#NET "joyup" LOC="P1" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY6
|
||||
#NET "joydown" LOC="P5" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY4
|
||||
#NET "joyleft" LOC="P6" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY3
|
||||
#NET "joyright" LOC="P7" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY2
|
||||
#NET "joyfire" LOC="P2" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY7
|
||||
#NET "btn2" LOC="P8" | IOSTANDARD = LVCMOS33 | PULLUP; #JOY5
|
||||
|
|
@ -1,187 +0,0 @@
|
|||
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
|
||||
<generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema">
|
||||
|
||||
<!-- -->
|
||||
|
||||
<!-- For tool use only. Do not edit. -->
|
||||
|
||||
<!-- -->
|
||||
|
||||
<!-- ProjectNavigator created generated project file. -->
|
||||
|
||||
<!-- For use in tracking generated file and other information -->
|
||||
|
||||
<!-- allowing preservation of process status. -->
|
||||
|
||||
<!-- -->
|
||||
|
||||
<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
|
||||
|
||||
<version xmlns="http://www.xilinx.com/XMLSchema">11.1</version>
|
||||
|
||||
<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="samcoupe.xise"/>
|
||||
|
||||
<files xmlns="http://www.xilinx.com/XMLSchema">
|
||||
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
|
||||
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/bitgen.xmsgs"/>
|
||||
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/map.xmsgs"/>
|
||||
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
|
||||
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/par.xmsgs"/>
|
||||
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/trce.xmsgs"/>
|
||||
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="tld_sam.bgn" xil_pn:subbranch="FPGAConfiguration"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BIT" xil_pn:name="tld_sam.bit" xil_pn:subbranch="FPGAConfiguration"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="tld_sam.bld"/>
|
||||
<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="tld_sam.cmd_log"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_DRC" xil_pn:name="tld_sam.drc" xil_pn:subbranch="FPGAConfiguration"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="tld_sam.lso"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="tld_sam.ncd" xil_pn:subbranch="Par"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="tld_sam.ngc"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="tld_sam.ngd"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="tld_sam.ngr"/>
|
||||
<file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="tld_sam.pad"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAR_REPORT" xil_pn:name="tld_sam.par" xil_pn:subbranch="Par"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PCF" xil_pn:name="tld_sam.pcf" xil_pn:subbranch="Map"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="tld_sam.prj"/>
|
||||
<file xil_pn:fileType="FILE_TRCE_MISC" xil_pn:name="tld_sam.ptwx"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="tld_sam.stx"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="tld_sam.syr"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_TXT_REPORT" xil_pn:name="tld_sam.twr" xil_pn:subbranch="Par"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_TIMING_XML_REPORT" xil_pn:name="tld_sam.twx" xil_pn:subbranch="Par"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_UNROUTES" xil_pn:name="tld_sam.unroutes" xil_pn:subbranch="Par"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_BITGEN_REPORT" xil_pn:name="tld_sam.ut" xil_pn:subbranch="FPGAConfiguration"/>
|
||||
<file xil_pn:fileType="FILE_XPI" xil_pn:name="tld_sam.xpi"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="tld_sam.xst"/>
|
||||
<file xil_pn:fileType="FILE_NCD" xil_pn:name="tld_sam_guide.ncd" xil_pn:origination="imported"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="tld_sam_map.map" xil_pn:subbranch="Map"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MAP_REPORT" xil_pn:name="tld_sam_map.mrp" xil_pn:subbranch="Map"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NCD" xil_pn:name="tld_sam_map.ncd" xil_pn:subbranch="Map"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGM" xil_pn:name="tld_sam_map.ngm" xil_pn:subbranch="Map"/>
|
||||
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="tld_sam_map.xrpt"/>
|
||||
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="tld_sam_ngdbuild.xrpt"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="tld_sam_pad.csv" xil_pn:subbranch="Par"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PAD_TXT_REPORT" xil_pn:name="tld_sam_pad.txt" xil_pn:subbranch="Par"/>
|
||||
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="tld_sam_par.xrpt"/>
|
||||
<file xil_pn:fileType="FILE_HTML" xil_pn:name="tld_sam_summary.html"/>
|
||||
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="tld_sam_summary.xml"/>
|
||||
<file xil_pn:fileType="FILE_WEBTALK" xil_pn:name="tld_sam_usage.xml"/>
|
||||
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="tld_sam_xst.xrpt"/>
|
||||
<file xil_pn:fileType="FILE_HTML" xil_pn:name="usage_statistics_webtalk.html"/>
|
||||
<file xil_pn:fileType="FILE_LOG" xil_pn:name="webtalk.log"/>
|
||||
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
|
||||
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
|
||||
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
|
||||
</files>
|
||||
|
||||
<transforms xmlns="http://www.xilinx.com/XMLSchema">
|
||||
<transform xil_pn:end_ts="1460477811" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1460477811">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460477811" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="-6115208449814914759" xil_pn:start_ts="1460477811">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460477811" xil_pn:name="TRAN_regenerateCores" xil_pn:prop_ck="-8108781279231808984" xil_pn:start_ts="1460477811">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460477811" xil_pn:name="TRAN_SubProjectAbstractToPreProxy" xil_pn:start_ts="1460477811">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460477811" xil_pn:name="TRAN_xawsTohdl" xil_pn:prop_ck="-1343511641341017349" xil_pn:start_ts="1460477811">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460477811" xil_pn:name="TRAN_SubProjectPreToStructuralProxy" xil_pn:prop_ck="250970745955965653" xil_pn:start_ts="1460477811">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460477811" xil_pn:name="TRAN_platgen" xil_pn:prop_ck="-2805040128463979342" xil_pn:start_ts="1460477811">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460477935" xil_pn:in_ck="-5783567514349303730" xil_pn:name="TRANEXT_xstsynthesize_spartan6" xil_pn:prop_ck="9121203831162331750" xil_pn:start_ts="1460477811">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="WarningsGenerated"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<status xil_pn:value="OutOfDateForOutputs"/>
|
||||
<status xil_pn:value="OutputChanged"/>
|
||||
<outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
|
||||
<outfile xil_pn:name="tld_sam.lso"/>
|
||||
<outfile xil_pn:name="tld_sam.ngc"/>
|
||||
<outfile xil_pn:name="tld_sam.ngr"/>
|
||||
<outfile xil_pn:name="tld_sam.prj"/>
|
||||
<outfile xil_pn:name="tld_sam.stx"/>
|
||||
<outfile xil_pn:name="tld_sam.syr"/>
|
||||
<outfile xil_pn:name="tld_sam.xst"/>
|
||||
<outfile xil_pn:name="tld_sam_xst.xrpt"/>
|
||||
<outfile xil_pn:name="webtalk_pn.xml"/>
|
||||
<outfile xil_pn:name="xst"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460479194" xil_pn:in_ck="8146865349285220654" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="1262981284104174886" xil_pn:start_ts="1460479193">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460479217" xil_pn:in_ck="-8396312258588544680" xil_pn:name="TRANEXT_ngdbuild_FPGA" xil_pn:prop_ck="-2060531862303609495" xil_pn:start_ts="1460479194">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<outfile xil_pn:name="_ngo"/>
|
||||
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
|
||||
<outfile xil_pn:name="tld_sam.bld"/>
|
||||
<outfile xil_pn:name="tld_sam.ngd"/>
|
||||
<outfile xil_pn:name="tld_sam_ngdbuild.xrpt"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460479307" xil_pn:in_ck="-8396312258588544679" xil_pn:name="TRANEXT_map_spartan6" xil_pn:prop_ck="1448924893915930207" xil_pn:start_ts="1460479217">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<status xil_pn:value="OutOfDateForOutputs"/>
|
||||
<status xil_pn:value="OutputChanged"/>
|
||||
<outfile xil_pn:name="_xmsgs/map.xmsgs"/>
|
||||
<outfile xil_pn:name="tld_sam.pcf"/>
|
||||
<outfile xil_pn:name="tld_sam_map.map"/>
|
||||
<outfile xil_pn:name="tld_sam_map.mrp"/>
|
||||
<outfile xil_pn:name="tld_sam_map.ncd"/>
|
||||
<outfile xil_pn:name="tld_sam_map.ngm"/>
|
||||
<outfile xil_pn:name="tld_sam_map.xrpt"/>
|
||||
<outfile xil_pn:name="tld_sam_summary.xml"/>
|
||||
<outfile xil_pn:name="tld_sam_usage.xml"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460479383" xil_pn:in_ck="4953532180165969138" xil_pn:name="TRANEXT_par_spartan6" xil_pn:prop_ck="93661965788626211" xil_pn:start_ts="1460479307">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="WarningsGenerated"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<outfile xil_pn:name="_xmsgs/par.xmsgs"/>
|
||||
<outfile xil_pn:name="tld_sam.ncd"/>
|
||||
<outfile xil_pn:name="tld_sam.pad"/>
|
||||
<outfile xil_pn:name="tld_sam.par"/>
|
||||
<outfile xil_pn:name="tld_sam.ptwx"/>
|
||||
<outfile xil_pn:name="tld_sam.unroutes"/>
|
||||
<outfile xil_pn:name="tld_sam.xpi"/>
|
||||
<outfile xil_pn:name="tld_sam_pad.csv"/>
|
||||
<outfile xil_pn:name="tld_sam_pad.txt"/>
|
||||
<outfile xil_pn:name="tld_sam_par.xrpt"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460479453" xil_pn:in_ck="182820444665985127" xil_pn:name="TRANEXT_bitFile_spartan6" xil_pn:prop_ck="7369995838840786959" xil_pn:start_ts="1460479383">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="WarningsGenerated"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<outfile xil_pn:name="_xmsgs/bitgen.xmsgs"/>
|
||||
<outfile xil_pn:name="tld_sam.bgn"/>
|
||||
<outfile xil_pn:name="tld_sam.bit"/>
|
||||
<outfile xil_pn:name="tld_sam.drc"/>
|
||||
<outfile xil_pn:name="tld_sam.ut"/>
|
||||
<outfile xil_pn:name="usage_statistics_webtalk.html"/>
|
||||
<outfile xil_pn:name="webtalk.log"/>
|
||||
<outfile xil_pn:name="webtalk_pn.xml"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1460479383" xil_pn:in_ck="-8396312258588544811" xil_pn:name="TRAN_postRouteTrce" xil_pn:prop_ck="445577401284416184" xil_pn:start_ts="1460479362">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<outfile xil_pn:name="_xmsgs/trce.xmsgs"/>
|
||||
<outfile xil_pn:name="tld_sam.twr"/>
|
||||
<outfile xil_pn:name="tld_sam.twx"/>
|
||||
</transform>
|
||||
</transforms>
|
||||
|
||||
</generated_project>
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
verilog work "tv80_reg.v"
|
||||
verilog work "tv80_mcode.v"
|
||||
verilog work "tv80_alu.v"
|
||||
verilog work "tv80_core.v"
|
||||
verilog work "scancode_to_speccy.v"
|
||||
verilog work "ps2_port.v"
|
||||
verilog work "tv80n.v"
|
||||
verilog work "saa1099.v"
|
||||
verilog work "rom.v"
|
||||
verilog work "ram.v"
|
||||
verilog work "ps2_keyb.v"
|
||||
verilog work "audio_management.v"
|
||||
verilog work "asic.v"
|
||||
verilog work "samcoupe.v"
|
||||
verilog work "relojes.v"
|
||||
verilog work "tld_sam.v"
|
||||
|
|
@ -0,0 +1,30 @@
|
|||
-w
|
||||
-g Binary:no
|
||||
-g Compress
|
||||
-g CRC:Enable
|
||||
-g Reset_on_err:No
|
||||
-g ConfigRate:4
|
||||
-g ProgPin:PullUp
|
||||
-g TckPin:PullUp
|
||||
-g TdiPin:PullUp
|
||||
-g TdoPin:PullUp
|
||||
-g TmsPin:PullUp
|
||||
-g UnusedPin:PullDown
|
||||
-g UserID:0xFFFFFFFF
|
||||
-g ExtMasterCclk_en:No
|
||||
-g SPI_buswidth:1
|
||||
-g TIMER_CFG:0xFFFF
|
||||
-g multipin_wakeup:No
|
||||
-g StartUpClk:CClk
|
||||
-g DONE_cycle:4
|
||||
-g GTS_cycle:5
|
||||
-g GWE_cycle:6
|
||||
-g LCK_cycle:NoWait
|
||||
-g Security:None
|
||||
-g DonePipe:No
|
||||
-g DriveDone:No
|
||||
-g en_sw_gsr:No
|
||||
-g drive_awake:No
|
||||
-g sw_clk:Startupclk
|
||||
-g sw_gwe_cycle:5
|
||||
-g sw_gts_cycle:4
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
set -tmpdir "projnav.tmp"
|
||||
set -xsthdpdir "xst"
|
||||
run
|
||||
-ifn tld_sam.prj
|
||||
-ofn tld_sam
|
||||
-ofmt NGC
|
||||
-p xc6slx9-2-tqg144
|
||||
-top tld_sam
|
||||
-opt_mode Speed
|
||||
-opt_level 1
|
||||
-power NO
|
||||
-iuc NO
|
||||
-keep_hierarchy No
|
||||
-netlist_hierarchy As_Optimized
|
||||
-rtlview Yes
|
||||
-glob_opt AllClockNets
|
||||
-read_cores YES
|
||||
-write_timing_constraints NO
|
||||
-cross_clock_analysis NO
|
||||
-hierarchy_separator /
|
||||
-bus_delimiter <>
|
||||
-case Maintain
|
||||
-slice_utilization_ratio 100
|
||||
-bram_utilization_ratio 100
|
||||
-dsp_utilization_ratio 100
|
||||
-lc Auto
|
||||
-reduce_control_sets Auto
|
||||
-define { SYNTH=1 }
|
||||
-fsm_extract YES -fsm_encoding Auto
|
||||
-safe_implementation No
|
||||
-fsm_style LUT
|
||||
-ram_extract Yes
|
||||
-ram_style Auto
|
||||
-rom_extract Yes
|
||||
-shreg_extract YES
|
||||
-rom_style Auto
|
||||
-auto_bram_packing NO
|
||||
-resource_sharing NO
|
||||
-async_to_sync NO
|
||||
-shreg_min_size 2
|
||||
-use_dsp48 Auto
|
||||
-iobuf YES
|
||||
-max_fanout 100000
|
||||
-bufg 16
|
||||
-register_duplication YES
|
||||
-register_balancing No
|
||||
-optimize_primitives NO
|
||||
-use_clock_enable Auto
|
||||
-use_sync_set Auto
|
||||
-use_sync_reset Auto
|
||||
-iob Auto
|
||||
-equivalent_register_removal YES
|
||||
-slice_utilization_ratio_maxmargin 5
|
||||
Loading…
Reference in New Issue