From ab6ad0245531c969c60706aeb8c54fa9b04fb2d6 Mon Sep 17 00:00:00 2001 From: antoniovillena Date: Thu, 26 May 2016 22:17:30 +0200 Subject: [PATCH] Cambio bootloader.asm --- cores/Spectrum/bootloader_hex.txt | 148 ++++++++++++++---------------- firmware/bootloader.asm | 138 ++++++++++++++++++++++++++++ 2 files changed, 208 insertions(+), 78 deletions(-) create mode 100644 firmware/bootloader.asm diff --git a/cores/Spectrum/bootloader_hex.txt b/cores/Spectrum/bootloader_hex.txt index 11333ae..f93aa83 100644 --- a/cores/Spectrum/bootloader_hex.txt +++ b/cores/Spectrum/bootloader_hex.txt @@ -1,6 +1,28 @@ +F3 +EF +06 +10 +EF +0B +C0 +EF +03 +01 31 -AE +EC BF +AF +EF +01 +08 +EF +03 +00 +EF +02 +03 +ED +79 11 61 C7 @@ -9,35 +31,13 @@ D5 80 ED D5 -01 -AB -BF +39 +ED +59 +ED +79 18 -2B -DF -20 -05 -C9 -32 -30 -31 -36 -3E -16 -3D -20 -FD -04 -C8 -DB -FE -A9 -E6 -40 -28 -F7 -18 -43 +13 01 3B FD @@ -57,68 +57,63 @@ C9 C3 43 C0 -F3 -C5 -EF -06 -10 -EF -01 -08 -DB -1F -E6 -1F -FE -18 -28 -27 -EF -0B -C0 -EF -03 -01 -EF -03 -00 -EF -02 -03 -ED -61 -ED -59 -ED -61 -39 ED A2 04 BC 38 FA +05 +ED +61 +DB +1F +A1 +FE 18 -CD +11 +E9 +BF +18 +1D +DF +C8 +3E +16 +3D +20 +FD +04 +C8 +DB +FE +1F +A9 +E6 +20 +28 +F6 +79 +EE +27 +4F +D3 +FE +C9 C3 40 C0 ED 45 -79 -EE -47 -4F -D3 -FE -C9 +D5 +C0 11 53 00 DD 63 CD -84 +7C 00 DD 21 @@ -127,9 +122,6 @@ C0 11 02 40 -2E -34 -E5 3E 0F D3 @@ -137,7 +129,7 @@ FE 0E 0A DF -20 +28 FD AF 29 @@ -210,5 +202,5 @@ B4 FE 01 3B -FC +FD C9 diff --git a/firmware/bootloader.asm b/firmware/bootloader.asm new file mode 100644 index 0000000..01b459a --- /dev/null +++ b/firmware/bootloader.asm @@ -0,0 +1,138 @@ + macro wreg dir, dato + rst $28 + defb dir, dato + endm + + output bootloader.rom + define zxuno_port $fc3b + define master_conf 0 + define master_mapper 1 + define flash_spi 2 + define flash_cs 3 + define joyconf 6 + define scandbl_ctrl 11 + + di + wreg joyconf, %00010000 + wreg scandbl_ctrl, $c0 ; lo pongo a 28MHz + wreg flash_cs, 1 ; desactivamos spi, enviando un 0 + ld sp, $bfff-19 + xor a ; byte mas significativo de direccion + wreg master_mapper, 8 ; paginamos la ROM en $c000 + wreg flash_cs, 0 ; activamos spi, enviando un 0 + wreg flash_spi, 3 ; envio flash_spi un 3, orden de lectura + out (c), a ; envia direccion 008000, a=00,e=80,a=00 + ld de, $c761 ; tras el out (c), h de bffc se ejecuta + push de ; un rst 0 para iniciar la nueva ROM + ld de, $ed80 ; en $bffc para evitar que el cambio de ROM + push de ; colisione con la siguiente instruccion + add hl, sp + out (c), e + out (c), a + jr boot + +rst28 ld bc, zxuno_port + $100 + pop hl + outi + ld b, (zxuno_port >> 8)+2 + outi + jp (hl) + +lspi2 dec b +lspi3 out (c), h ; a master_conf quiero enviar un 0 para pasar + inc b + ret + +rst38 jp $c043 + +boot ini + inc b + cp h ; compruebo si la direccion es 0000 (final) + jr c, boot ; repito si no lo es + dec b + out (c), h ; a master_conf quiero enviar un 0 para pasar + in a, ($1f) + and c + cp %00011000 ; arriba y disparo a la vez + ld de, $bffc-19 + jr nbreak + +ldedg2 rst $18 ; call routine ld-edge-1 below. + ret z ; return if space pressed or time-out. +ldedg1 ld a, $16 ; a delay value of twenty two. +ldelay dec a ; decrement counter + jr nz, ldelay ; loop back to ld-delay 22 times. +lsampl inc b ; increment the time-out counter. + ret z ; return with failure when $ff passed. + in a, ($fe) ; row $7ffe. bit 6 is ear, bit 0 is space key. + rra + xor c ; compare with initial long-term state. + and $20 ; isolate bit 5 + jr z, lsampl ; back to ld-sample if no edge. + ld a, c ; fetch comparison value. + xor $27 ; switch the bits + ld c, a ; and put back in c for long-term. + out ($fe), a ; send to port to effect the change of colour. + ret ; return. + +nmi66 jp $c040 + retn + +nbreak push de + ret nz + ld de, $0051+2 + ld ixh, e + call lbytes + ld ix, $c000 + ld de, $4000+2 +lbytes ld a, $0f ; make the border white and mic off. + out ($fe), a ; output to port. + ld c, 10 +lstart rst $18 ; routine ld-edge-1 + jr z, lstart ; back to ld-break with time out and no edge present on tape + xor a ; set up 8-bit outer loop counter for approx 0.45 second delay +ldwait add hl, hl + djnz ldwait ; self loop to ld-wait (for 256 times) + dec a ; decrease outer loop counter. + jr nz, ldwait ; back to ld-wait, if not zero, with zero in b. + rst $10 ; routine ld-edge-2 + jr z, lstart ; back to ld-break if no edges at all. +leader ld b, $9c ; two edges must be spaced apart. + rst $10 ; routine ld-edge-2 + jr z, lstart ; back to ld-break if time-out + ld a, $c6 ; two edges must be spaced apart. + cp b ; compare + jr nc, lstart ; back to ld-start if too close together for a lead-in. + inc h ; proceed to test 256 edged sample. + jr nz, leader ; back to ld-leader while more to do. +ldsync ld b, $c9 ; two edges must be spaced apart. + rst $18 ; routine ld-edge-1 + jr z, lstart ; back to ld-break with time-out. + ld a, b ; fetch augmented timing value from b. + cp $d4 ; compare + jr nc, ldsync ; back to ld-sync if gap too big, that is, a normal lead-in edge gap + rst $18 ; routine ld-edge-1 + jr z, binf + xor 3 + ld c, a +ldloop ld (ix-2), l ; place loaded byte at memory location. + inc ix ; increment byte pointer. + dec de ; decrement length. + ld l, $01 ; initialize as %00000001 +l8bits ld b, $b2 ; timing. + rst $10 ; routine ld-edge-2 increments b relative to gap between 2 edges +binf jr z, binf ; return with time-out. + ld a, $cb ; the comparison byte. + cp b ; compare to incremented value of b. + rl l ; rotate the carry bit into l. + jr nc, l8bits ; jump back to ld-8-bits + ld a, h ; fetch the running parity byte. + xor l ; include the new byte. + ld h, a ; and store back in parity register. + ld a, d ; check length of + or e ; expected bytes. + jr nz, ldloop ; back to ld-loop while there are more. + or h +bin2 jr nz, bin2 + ld bc, zxuno_port + $100 + ret ; return