diff --git a/cores/BBCMicro/src/bbc_micro.vhd b/cores/BBCMicro/src/bbc_micro.vhd index ffe6587..dab668c 100644 --- a/cores/BBCMicro/src/bbc_micro.vhd +++ b/cores/BBCMicro/src/bbc_micro.vhd @@ -54,7 +54,6 @@ entity bbc_micro is port (clk50 : in std_logic; ps2_clk : in std_logic; ps2_data : in std_logic; - ERST : in std_logic; red : out std_logic_vector (2 downto 0); green : out std_logic_vector (2 downto 0); blue : out std_logic_vector (2 downto 0); @@ -70,8 +69,8 @@ entity bbc_micro is SDCLK : out std_logic; SDMOSI : out std_logic; LED1 : out std_logic; - NTSC : out std_logic; --Q - PAL : out std_logic --Q + NTSC : out std_logic; + PAL : out std_logic ); end entity; @@ -285,10 +284,15 @@ signal sdclk_int : std_logic; signal RAMWRn_int : std_logic; -signal scanSW : std_logic; --q +signal scanSW : std_logic_vector(2 downto 0); --q signal scanNext : std_logic; signal scanReg : std_logic; +signal poweron_reset: unsigned(7 downto 0) := "00000000"; +signal scandoubler_ctrl: std_logic_vector(1 downto 0); +signal ram_we_n: std_logic; +signal ram_a: std_logic_vector(18 downto 0); + begin ------------------------- -- COMPONENT INSTANCES @@ -480,8 +484,8 @@ begin keyb_int, keyb_break, -- TODO: Add DIP Switches - "00000000" - ,scanSW --q + "00000000", + scanSW ); -- Sound generator (and drive logic for I2S codec) @@ -495,7 +499,7 @@ begin dac : entity work.pwm_sddac PORT MAP( clk_i => clock, reset => '0', - dac_i => std_logic_vector(sound_ao), + dac_i => std_logic_vector(128+sound_ao), --added 128 to lower volume and avoid distortion dac_o => audio ); @@ -505,7 +509,8 @@ begin -- Keyboard and System VIA are reset by external reset switch or PLL being out of lock - hard_reset_n <= not ERST; +-- hard_reset_n <= not ERST; + -- Rest of system is reset by all of the above plus the keyboard BREAK key reset_n <= hard_reset_n and not keyb_break; @@ -694,18 +699,21 @@ begin if vid_clken = '1' then -- Fetch data from previous CPU cycle RAMWRn_int <= not ram_write; - SRAM_ADDR <= "000" & cpu_a(15 downto 0); + --SRAM_ADDR <= "000" & cpu_a(15 downto 0); + RAM_A <= "000" & cpu_a(15 downto 0); if ram_write = '1' then SRAM_DATA(7 downto 0) <= cpu_do; end if; else -- Fetch data from previous display cycle RAMWRn_int <= '1'; - SRAM_ADDR <= "0000" & display_a; + -- SRAM_ADDR <= "0000" & display_a; + RAM_A <= "0000" & display_a; end if; end if; end process; - RAMWRn <= RAMWRn_int or (not clock); + -- RAMWRn <= RAMWRn_int or (not clock); + ram_we_n <= RAMWRn_int or (not clock); -- Address translation logic for calculation of display address process(crtc_ma,crtc_ra,disp_addr_offs) @@ -841,7 +849,7 @@ begin end if; end process; - DIP(0) <= scanSW; + DIP(0) <= scandoubler_ctrl(0) xor scanSW(0); -- vga / rgb (via SRAM init or ScrollLock DIP(1) <= '0'; ----------------------------------------------- @@ -852,7 +860,7 @@ begin clk => clock, clk_16 => clock, clk_16_en => vid_clken, - scanlines => '0', + scanlines => scanSW(1), --scanlines "-" numpad hs_in => not crtc_hsync, vs_in => not crtc_vsync, r_in => r_out, @@ -872,27 +880,27 @@ begin -- Scan Doubler from RGB2VGA project ----------------------------------------------- - inst_rgb2vga_dcm: entity work.rgb2vga_dcm port map ( - CLKIN_IN => clock, - CLKFX_OUT => vga_clock - ); - - inst_rgb2vga: entity work.rgb2vga port map ( - clock => clock, - clken => vid_clken, - clk25 => vga_clock, - rgbi_in => r_out & g_out & b_out & '0', - hSync_in => crtc_hsync, - vSync_in => crtc_vsync, - rgbi_out => rgbi_out, - hSync_out => vga1_hs, - vSync_out => vga1_vs - ); - vga1_r <= rgbi_out(3) & rgbi_out(3); - vga1_g <= rgbi_out(2) & rgbi_out(2); - vga1_b <= rgbi_out(1) & rgbi_out(1); - - vga1_mode <= DIP(1); +-- inst_rgb2vga_dcm: entity work.rgb2vga_dcm port map ( +-- CLKIN_IN => clock, +-- CLKFX_OUT => vga_clock +-- ); +-- +-- inst_rgb2vga: entity work.rgb2vga port map ( +-- clock => clock, +-- clken => vid_clken, +-- clk25 => vga_clock, +-- rgbi_in => r_out & g_out & b_out & '0', +-- hSync_in => crtc_hsync, +-- vSync_in => crtc_vsync, +-- rgbi_out => rgbi_out, +-- hSync_out => vga1_hs, +-- vSync_out => vga1_vs +-- ); +-- vga1_r <= rgbi_out(3) & rgbi_out(3); +-- vga1_g <= rgbi_out(2) & rgbi_out(2); +-- vga1_b <= rgbi_out(1) & rgbi_out(1); +-- +-- vga1_mode <= DIP(1); ----------------------------------------------- -- RGBHV Multiplexor @@ -900,28 +908,58 @@ begin -- CRTC drives video out (CSYNC on HSYNC output, VSYNC high) hsync <= vga0_hs when vga0_mode = '1' else - vga1_hs when vga1_mode = '1' else +-- vga1_hs when vga1_mode = '1' else not (crtc_hsync or crtc_vsync); vsync <= vga0_vs when vga0_mode = '1' else - vga1_vs when vga1_mode = '1' else +-- vga1_vs when vga1_mode = '1' else '1'; red <= vga0_r(1) & vga0_r(0) & "0" when vga0_mode = '1' else - vga1_r(1) & vga1_r(0) & "0" when vga1_mode = '1' else +-- vga1_r(1) & vga1_r(0) & "0" when vga1_mode = '1' else r_out & r_out & r_out; green <= vga0_g(1) & vga0_g(0) & "0" when vga0_mode = '1' else - vga1_g(1) & vga1_g(0) & "0" when vga1_mode = '1' else +-- vga1_g(1) & vga1_g(0) & "0" when vga1_mode = '1' else g_out & g_out & g_out; blue <= vga0_b(1) & vga0_b(0) & "0" when vga0_mode = '1' else - vga1_b(1) & vga1_b(0) & "0" when vga1_mode = '1' else +-- vga1_b(1) & vga1_b(0) & "0" when vga1_mode = '1' else b_out & b_out & b_out; - -- Keyboard LEDs + -- Keyboard LEDs -- LED1 <= not caps_lock_led_n; - LED1 <= not sdclk_int; --SD Led + +LED1 <= not sdclk_int; --SD Led + + --- RESET int / SCANDLBLCTRL REG ZXUNO + + process (clock) + begin + if rising_edge(clock) then + if (poweron_reset < 126) then + scandoubler_ctrl <= sram_data(1 downto 0); + end if; + if poweron_reset < 254 then + poweron_reset <= poweron_reset + 1; + end if; + end if; + end process; + + hard_reset_n <= '0' when poweron_reset < 254 else '1'; + + sram_addr <= "0001000111111010101" when poweron_reset < 254 else ram_a; --0x8FD5 SRAM (SCANDBLCTRL REG) + RAMWRn <= '1' when poweron_reset < 254 else ram_we_n; + + --- endRESET int + +------------multiboot--------------- + + multiboot: entity work.multiboot + port map( + clk_icap => CLOCK_24, + REBOOT => scanSW(2) --mreset key combo + ); end architecture; diff --git a/cores/BBCMicro/src/bbc_micro_zxuno_Ap.ucf b/cores/BBCMicro/src/bbc_micro_zxuno_Ap.ucf index 025ed8a..de64a39 100644 --- a/cores/BBCMicro/src/bbc_micro_zxuno_Ap.ucf +++ b/cores/BBCMicro/src/bbc_micro_zxuno_Ap.ucf @@ -14,8 +14,8 @@ NET blue(1) LOC="P83" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET blue(0) LOC="P82" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET hsync LOC="P93" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET vsync LOC="P92" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET PAL LOC="P51" | IOSTANDARD = LVCMOS33; -NET NTSC LOC="P50" | IOSTANDARD = LVCMOS33; +NET NTSC LOC="P51" | IOSTANDARD = LVCMOS33; +NET PAL LOC="P50" | IOSTANDARD = LVCMOS33; # Sound input/output NET audioL LOC="P98" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; @@ -51,14 +51,14 @@ NET "SRAM_ADDR<18>" LOC="P138" | IOSTANDARD = LVCMOS33; #NET "SRAM_ADDR<19>" LOC="P111" | IOSTANDARD = LVCMOS33; #NET "SRAM_ADDR<20>" LOC="P138" | IOSTANDARD = LVCMOS33; -NET "SRAM_DATA<0>" LOC="P114" | IOSTANDARD = LVCMOS33; -NET "SRAM_DATA<1>" LOC="P112" | IOSTANDARD = LVCMOS33; -NET "SRAM_DATA<2>" LOC="P111" | IOSTANDARD = LVCMOS33; -NET "SRAM_DATA<3>" LOC="P105" | IOSTANDARD = LVCMOS33; -NET "SRAM_DATA<4>" LOC="P104" | IOSTANDARD = LVCMOS33; -NET "SRAM_DATA<5>" LOC="P102" | IOSTANDARD = LVCMOS33; -NET "SRAM_DATA<6>" LOC="P101" | IOSTANDARD = LVCMOS33; -NET "SRAM_DATA<7>" LOC="P100" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<0> LOC="P114" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<1> LOC="P112" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<2> LOC="P111" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<3> LOC="P99" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<4> LOC="P100" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<5> LOC="P101" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<6> LOC="P102" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<7> LOC="P104" | IOSTANDARD = LVCMOS33; NET RAMWRn LOC="P134" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; @@ -75,8 +75,8 @@ NET SDSS LOC="P78" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET SDCLK LOC="P80" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET SDMOSI LOC="P79" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET SDMISO LOC="P81" | IOSTANDARD = LVCMOS33; - -# JOYSTICK + +# JOYSTICK #NET JOYSTICK1(3) LOC="P74" | IOSTANDARD = LVCMOS33 | PULLUP; #NET JOYSTICK1(2) LOC="P67" | IOSTANDARD = LVCMOS33 | PULLUP; #NET JOYSTICK1(1) LOC="P59" | IOSTANDARD = LVCMOS33 | PULLUP; @@ -87,5 +87,4 @@ NET SDMISO LOC="P81" | IOSTANDARD = LVCMOS33; # Otros -NET ERST LOC="P51" | IOSTANDARD = LVCMOS33; PIN "relojes_bbc/clkout1_buf.O" CLOCK_DEDICATED_ROUTE = FALSE; diff --git a/cores/BBCMicro/src/bbc_micro_zxuno_v2.ucf b/cores/BBCMicro/src/bbc_micro_zxuno_v2.ucf index 623d355..9709633 100644 --- a/cores/BBCMicro/src/bbc_micro_zxuno_v2.ucf +++ b/cores/BBCMicro/src/bbc_micro_zxuno_v2.ucf @@ -14,8 +14,8 @@ NET blue(1) LOC="P80" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET blue(0) LOC="P79" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET hsync LOC="P87" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET vsync LOC="P85" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET PAL LOC="P66" | IOSTANDARD = LVCMOS33; -NET NTSC LOC="P67" | IOSTANDARD = LVCMOS33; +NET NTSC LOC="P66" | IOSTANDARD = LVCMOS33; +NET PAL LOC="P67" | IOSTANDARD = LVCMOS33; # Sound input/output NET audioL LOC="P8" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; @@ -29,36 +29,36 @@ NET ps2_data LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP; #NET "mousedata" LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP; # SRAM -NET SRAM_ADDR(0) LOC="P115" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(1) LOC="P116" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(2) LOC="P117" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(3) LOC="P119" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(4) LOC="P120" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(5) LOC="P123" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(6) LOC="P126" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(7) LOC="P131" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(8) LOC="P127" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(9) LOC="P124" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(10) LOC="P118" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(11) LOC="P121" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(12) LOC="P133" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(13) LOC="P132" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(14) LOC="P137" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(15) LOC="P140" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(16) LOC="P139" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(17) LOC="P141" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(18) LOC="P138" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_ADDR<0> LOC="P115" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<1> LOC="P116" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<2> LOC="P117" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<3> LOC="P119" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<4> LOC="P120" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<5> LOC="P123" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<6> LOC="P126" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<7> LOC="P131" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<8> LOC="P127" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<9> LOC="P124" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<10> LOC="P118" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<11> LOC="P121" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<12> LOC="P133" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<13> LOC="P132" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<14> LOC="P137" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<15> LOC="P140" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<16> LOC="P139" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<17> LOC="P141" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<18> LOC="P138" | IOSTANDARD = LVCMOS33; #NET "sram_addr<19>" LOC="P105" | IOSTANDARD = LVCMOS33; #NET "sram_addr<20>" LOC="P143" | IOSTANDARD = LVCMOS33; -NET SRAM_DATA(0) LOC="P114" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(1) LOC="P112" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(2) LOC="P111" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(3) LOC="P99" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(4) LOC="P100" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(5) LOC="P101" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(6) LOC="P102" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(7) LOC="P104" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA<0> LOC="P114" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<1> LOC="P112" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<2> LOC="P111" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<3> LOC="P99" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<4> LOC="P100" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<5> LOC="P101" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<6> LOC="P102" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<7> LOC="P104" | IOSTANDARD = LVCMOS33; NET RAMWRn LOC="P134" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; @@ -85,7 +85,6 @@ NET SDMISO LOC="P78" | IOSTANDARD = LVCMOS33; #NET JOYSTICK1(4) LOC="P6" | IOSTANDARD = LVCMOS33 | PULLUP; #NET "joyfire3" LOC="P39" | IOSTANDARD = LVCMOS33 | PULLUP; -# Otros -NET ERST LOC="P46" | IOSTANDARD = LVCMOS33; -PIN "relojes_bbc/clkout1_buf.O" CLOCK_DEDICATED_ROUTE = FALSE; +# Otros +PIN "relojes_bbc/clkout1_buf.O" CLOCK_DEDICATED_ROUTE = FALSE; diff --git a/cores/BBCMicro/src/bbc_micro_zxuno_v3.ucf b/cores/BBCMicro/src/bbc_micro_zxuno_v3.ucf index dc08d72..db3dfe5 100644 --- a/cores/BBCMicro/src/bbc_micro_zxuno_v3.ucf +++ b/cores/BBCMicro/src/bbc_micro_zxuno_v3.ucf @@ -14,8 +14,8 @@ NET blue(1) LOC="P80" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET blue(0) LOC="P79" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET hsync LOC="P87" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET vsync LOC="P85" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET PAL LOC="P66" | IOSTANDARD = LVCMOS33; -NET NTSC LOC="P67" | IOSTANDARD = LVCMOS33; +NET NTSC LOC="P66" | IOSTANDARD = LVCMOS33; +NET PAL LOC="P67" | IOSTANDARD = LVCMOS33; # Sound input/output NET audioL LOC="P8" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; @@ -87,5 +87,4 @@ NET SDMISO LOC="P78" | IOSTANDARD = LVCMOS33; # Otros -NET ERST LOC="P46" | IOSTANDARD = LVCMOS33; PIN "relojes_bbc/clkout1_buf.O" CLOCK_DEDICATED_ROUTE = FALSE; diff --git a/cores/BBCMicro/src/bbc_micro_zxuno_v4.ucf b/cores/BBCMicro/src/bbc_micro_zxuno_v4.ucf index a002aa5..9e0a8b7 100644 --- a/cores/BBCMicro/src/bbc_micro_zxuno_v4.ucf +++ b/cores/BBCMicro/src/bbc_micro_zxuno_v4.ucf @@ -14,8 +14,8 @@ NET blue(1) LOC="P92" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET blue(0) LOC="P88" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET hsync LOC="P87" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; NET vsync LOC="P85" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET PAL LOC="P66" | IOSTANDARD = LVCMOS33; -NET NTSC LOC="P67" | IOSTANDARD = LVCMOS33; +NET NTSC LOC="P66" | IOSTANDARD = LVCMOS33; +NET PAL LOC="P67" | IOSTANDARD = LVCMOS33; # Sound input/output NET audioL LOC="P10" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; @@ -29,36 +29,36 @@ NET ps2_data LOC="P98" | IOSTANDARD = LVCMOS33 | PULLUP; #NET "mousedata" LOC="P97" | IOSTANDARD = LVCMOS33 | PULLUP; # SRAM -NET SRAM_ADDR(0) LOC="P141" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(1) LOC="P139" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(2) LOC="P137" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(3) LOC="P134" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(4) LOC="P133" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(5) LOC="P120" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(6) LOC="P118" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(7) LOC="P116" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(8) LOC="P114" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(9) LOC="P112" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(10) LOC="P104" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(11) LOC="P102" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(12) LOC="P101" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(13) LOC="P100" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(14) LOC="P111" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(15) LOC="P131" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(16) LOC="P138" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(17) LOC="P140" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_ADDR(18) LOC="P142" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -#NET "sram_addr<19>" LOC="P105" | IOSTANDARD = LVCMOS33; -#NET "sram_addr<20>" LOC="P143" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<0> LOC="P141" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<1> LOC="P139" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<2> LOC="P137" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<3> LOC="P134" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<4> LOC="P133" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<5> LOC="P120" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<6> LOC="P118" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<7> LOC="P116" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<8> LOC="P114" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<9> LOC="P112" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<10> LOC="P104" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<11> LOC="P102" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<12> LOC="P101" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<13> LOC="P100" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<14> LOC="P111" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<15> LOC="P131" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<16> LOC="P138" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<17> LOC="P140" | IOSTANDARD = LVCMOS33; +NET SRAM_ADDR<18> LOC="P142" | IOSTANDARD = LVCMOS33; +#NET "SRAM_ADDR<19>" LOC="P105" | IOSTANDARD = LVCMOS33; +#NET "SRAM_ADDR<20>" LOC="P143" | IOSTANDARD = LVCMOS33; -NET SRAM_DATA(0) LOC="P132" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(1) LOC="P127" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(2) LOC="P124" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(3) LOC="P123" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(4) LOC="P115" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(5) LOC="P117" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(6) LOC="P119" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; -NET SRAM_DATA(7) LOC="P126" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; +NET SRAM_DATA<0> LOC="P132" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<1> LOC="P127" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<2> LOC="P124" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<3> LOC="P123" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<4> LOC="P115" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<5> LOC="P117" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<6> LOC="P119" | IOSTANDARD = LVCMOS33; +NET SRAM_DATA<7> LOC="P126" | IOSTANDARD = LVCMOS33; NET RAMWRn LOC="P121" | IOSTANDARD = LVCMOS33 | DRIVE=2 | SLEW=SLOW; @@ -87,6 +87,4 @@ NET SDMISO LOC="P78" | IOSTANDARD = LVCMOS33; # Otros -NET ERST LOC="P51" | IOSTANDARD = LVCMOS33; PIN "relojes_bbc/clkout1_buf.O" CLOCK_DEDICATED_ROUTE = FALSE; - diff --git a/cores/BBCMicro/src/keyboard.vhd b/cores/BBCMicro/src/keyboard.vhd index eca4a87..fbf6686 100644 --- a/cores/BBCMicro/src/keyboard.vhd +++ b/cores/BBCMicro/src/keyboard.vhd @@ -68,8 +68,8 @@ port ( BREAK_OUT : out std_logic; -- DIP switch inputs - DIP_SWITCH : in std_logic_vector(7 downto 0) - ;scanSW : buffer std_logic --q + DIP_SWITCH : in std_logic_vector(7 downto 0); + scanSW : out std_logic_vector(2 downto 0) --q ); end entity; @@ -105,6 +105,12 @@ signal keys : key_matrix; signal col : unsigned(3 downto 0); signal release : std_logic; signal extended : std_logic; + +signal VIDEO: std_logic := '0'; +signal SCANL: std_logic := '0'; +signal CTRL : std_logic; +signal ALT : std_logic; + begin ps2 : ps2_intf port map ( @@ -210,9 +216,11 @@ begin when X"16" => keys(0)(3) <= not release; -- 1 when X"58" => keys(0)(4) <= not release; -- CAPS LOCK when X"11" => keys(0)(5) <= not release; -- LEFT ALT (SHIFT LOCK) + ALT <= not release; when X"0D" => keys(0)(6) <= not release; -- TAB when X"76" => keys(0)(7) <= not release; -- ESCAPE when X"14" => keys(1)(0) <= not release; -- LEFT/RIGHT CTRL (CTRL) + CTRL <= not release; when X"26" => keys(1)(1) <= not release; -- 3 when X"1D" => keys(1)(2) <= not release; -- W when X"1E" => keys(1)(3) <= not release; -- 2 @@ -273,7 +281,7 @@ begin when X"72" => keys(9)(2) <= not release; -- DOWN when X"75" => keys(9)(3) <= not release; -- UP when X"5A" => keys(9)(4) <= not release; -- RETURN - when X"66" => keys(9)(5) <= not release; -- BACKSPACE (DELETE) +-- when X"66" => keys(9)(5) <= not release; -- BACKSPACE (DELETE) when X"69" => keys(9)(6) <= not release; -- END (COPY) when X"74" => keys(9)(7) <= not release; -- RIGHT @@ -282,8 +290,31 @@ begin -- optionally OR it in to the system reset when X"07" => BREAK_OUT <= not release; -- F12 (BREAK) - when X"7D" => scanSW <= '1'; -- pgUP (VGA) - when X"7A" => scanSW <= '0'; -- pgDN (RGB) + when X"7E" => -- scrolLock RGB/VGA + if (VIDEO = '0' and release = '0') then + scanSW(0) <= '1'; + VIDEO <= '1'; + elsif (VIDEO = '1' and release = '0') then + scanSW(0) <= '0'; + VIDEO <= '0'; + end if; + + when X"7B" => -- scanlines ("-" numpad) + if (SCANL = '0' and release = '0') then + scanSW(1) <= '1'; + SCANL <= '1'; + elsif (SCANL = '1' and release = '0') then + scanSW(1) <= '0'; + SCANL <= '0'; + end if; + + --Master reset + when X"66" => + if (CTRL = '1' and ALT = '1') then + scanSW(2) <= not release; + else + keys(9)(5) <= not release; --normal BACKSPACE + end if; when others => null; end case; diff --git a/cores/BBCMicro/working/bbc_micro.ut b/cores/BBCMicro/working/bbc_micro.ut index fb52ea8..448a00d 100644 --- a/cores/BBCMicro/working/bbc_micro.ut +++ b/cores/BBCMicro/working/bbc_micro.ut @@ -1,6 +1,7 @@ -w --g Binary:no -g Compress +-g DebugBitstream:No +-g Binary:no -g CRC:Enable -g Reset_on_err:No -g ConfigRate:2 @@ -11,8 +12,7 @@ -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF --g ExtMasterCclk_en:Yes --g ExtMasterCclk_divide:50 +-g ExtMasterCclk_en:No -g SPI_buswidth:1 -g TIMER_CFG:0xFFFF -g multipin_wakeup:No