diff --git a/cores/Spectrum/cuatro_relojes.v b/cores/Spectrum/cuatro_relojes.v index 1b11249..ffc76cc 100644 --- a/cores/Spectrum/cuatro_relojes.v +++ b/cores/Spectrum/cuatro_relojes.v @@ -63,57 +63,24 @@ module clock_generator wire cpuclk_selected, cpuclk_3_2, cpuclk_1_0; - BUFGMUX speed_3_and_2 ( // 28MHz and 14MHz for CPU - .O(cpuclk_3_2), - .I0(CLK_OUT2), - .I1(CLK_OUT1), - .S(turbo_enable[0]) - ); - - BUFGMUX speed_1_and_0 ( // 7MHz and 3.5MHz for CPU - .O(cpuclk_1_0), - .I0(CLK_OUT4), - .I1(CLK_OUT3), - .S(turbo_enable[0]) - ); - - BUFGMUX cpuclk_selector ( - .O(cpuclk_selected), - .I0(cpuclk_1_0), - .I1(CLK_OUT2), - .S(turbo_enable[1]) - ); - - BUFGMUX aplicar_contienda ( - .O(cpuclk), - .I0(cpuclk_selected), // when no contention, clock is this one - .I1(1'b1), // during contention, clock is pulled up - .S(CPUContention) // contention signal - ); - - -// reg [2:0] clkdivider = 3'b000; -// always @(posedge CLK_OUT1) -// clkdivider <= clkdivider + 3'd1; -// // BUFGMUX speed_3_and_2 ( // 28MHz and 14MHz for CPU // .O(cpuclk_3_2), -// .I0(clkdivider[0]), +// .I0(CLK_OUT2), // .I1(CLK_OUT1), // .S(turbo_enable[0]) // ); // // BUFGMUX speed_1_and_0 ( // 7MHz and 3.5MHz for CPU // .O(cpuclk_1_0), -// .I0(clkdivider[2]), -// .I1(clkdivider[1]), +// .I0(CLK_OUT4), +// .I1(CLK_OUT3), // .S(turbo_enable[0]) // ); // // BUFGMUX cpuclk_selector ( // .O(cpuclk_selected), // .I0(cpuclk_1_0), -// .I1(cpuclk_3_2/*clkdivider[0]*/), +// .I1(/*cpuclk_3_2*/CLK_OUT2), // .S(turbo_enable[1]) // ); // @@ -124,5 +91,37 @@ module clock_generator // .S(CPUContention) // contention signal // ); + reg [2:0] clkdivider = 3'b000; + always @(posedge CLK_OUT1) + clkdivider <= clkdivider + 3'd1; + + BUFGMUX speed_3_and_2 ( // 28MHz and 14MHz for CPU + .O(cpuclk_3_2), + .I0(clkdivider[0]), + .I1(CLK_OUT1), + .S(turbo_enable[0]) + ); + + BUFGMUX speed_1_and_0 ( // 7MHz and 3.5MHz for CPU + .O(cpuclk_1_0), + .I0(clkdivider[2]), + .I1(clkdivider[1]), + .S(turbo_enable[0]) + ); + + BUFGMUX cpuclk_selector ( + .O(cpuclk_selected), + .I0(cpuclk_1_0), + .I1(/*cpuclk_3_2*/clkdivider[0]), + .S(turbo_enable[1]) + ); + + BUFGMUX aplicar_contienda ( + .O(cpuclk), + .I0(cpuclk_selected), // when no contention, clock is this one + .I1(1'b1), // during contention, clock is pulled up + .S(CPUContention) // contention signal + ); + assign cpuclkplain = cpuclk_selected; endmodule diff --git a/cores/Spectrum/new_memory.v b/cores/Spectrum/new_memory.v index 5a4fe5c..22a65aa 100644 --- a/cores/Spectrum/new_memory.v +++ b/cores/Spectrum/new_memory.v @@ -165,9 +165,9 @@ module new_memory ( end end -`define ADDR_7FFD_PLUS2A (!a[1] && a[15:14]==2'b01) -`define ADDR_7FFD_SP128 (!a[1] && !a[15]) -`define ADDR_1FFD (!a[1] && a[15:12]==4'b0001) +`define ADDR_7FFD_PLUS2A (a[0] && !a[1] && a[15:14]==2'b01) +`define ADDR_7FFD_SP128 (a[0] && !a[1] && !a[15]) +`define ADDR_1FFD (a[0] && !a[1] && a[15:12]==4'b0001) `define ADDR_TIMEX_MMU (a[7:0] == 8'hF4) `define PAGE0 3'b000 @@ -231,7 +231,6 @@ module new_memory ( we2_n = 1'b1; end else begin // estamos en modo normal de ejecución - // Lo que mas prioridad tiene es la linea externa ROMCS. Si esta activa, no se tiene en cuenta nada mas if (inhibit_rom == 1'b0) begin // DIVMMC tiene más prioridad que la MMU del Timex, así que se evalua primero. @@ -275,11 +274,11 @@ module new_memory ( end // Miramos si hay que paginar DOC o EXT y actualizamos addr_port2 y we2_n segun sea el caso - if (!amstrad_allram_page_mode && a[13] == 1'b0 && timex_mmu[0] == 1'b1) begin + if (a[13] == 1'b0 && timex_mmu[0] == 1'b1) begin addr_port2 = {2'b11,doc_ext_option,3'b000,a[12:0]}; we2_n = mreq_n | wr_n; end - if (!amstrad_allram_page_mode && a[13] == 1'b1 && timex_mmu[1] == 1'b1) begin + if (a[13] == 1'b1 && timex_mmu[1] == 1'b1) begin addr_port2 = {2'b11,doc_ext_option,3'b001,a[12:0]}; we2_n = mreq_n | wr_n; end @@ -303,7 +302,7 @@ module new_memory ( end // Miramos si hay que paginar DOC o EXT y actualizamos addr_port2 y we2_n segun sea el caso - if (!amstrad_allram_page_mode && !initial_boot_mode) begin + if (!initial_boot_mode) begin if (a[13] == 1'b0 && timex_mmu[2] == 1'b1) begin addr_port2 = {2'b11,doc_ext_option,3'b010,a[12:0]}; end @@ -328,7 +327,7 @@ module new_memory ( end // Miramos si hay que paginar DOC o EXT y actualizamos addr_port2 y we2_n segun sea el caso - if (!amstrad_allram_page_mode && !initial_boot_mode) begin + if (!initial_boot_mode) begin if (a[13] == 1'b0 && timex_mmu[4] == 1'b1) begin addr_port2 = {2'b11,doc_ext_option,3'b100,a[12:0]}; end @@ -358,7 +357,7 @@ module new_memory ( end // Miramos si hay que paginar DOC o EXT y actualizamos addr_port2 y we2_n segun sea el caso - if (!amstrad_allram_page_mode && !initial_boot_mode) begin + if (!initial_boot_mode) begin if (a[13] == 1'b0 && timex_mmu[6] == 1'b1) begin addr_port2 = {2'b11,doc_ext_option,3'b110,a[12:0]}; end @@ -481,6 +480,14 @@ module sram_and_mirror ( end // SRAM manager. Easy, isn't it? :D +// reg [7:0] data_to_sram; +// always @(posedge clk) begin +// a <= a2; +// we_n <= we2_n; +// dout2 <= d; +// data_to_sram <= (we_n == 1'b0)? din2 : 8'hZZ; +// end +// assign d = data_to_sram; assign a = a2; assign we_n = we2_n; assign dout2 = d; diff --git a/cores/Spectrum/pines_zxuno_v4.ucf b/cores/Spectrum/pines_zxuno_v4.ucf index 747e025..f9deacc 100644 --- a/cores/Spectrum/pines_zxuno_v4.ucf +++ b/cores/Spectrum/pines_zxuno_v4.ucf @@ -48,8 +48,8 @@ NET "sram_addr<15>" LOC="P131" | IOSTANDARD = LVCMOS33; NET "sram_addr<16>" LOC="P138" | IOSTANDARD = LVCMOS33; NET "sram_addr<17>" LOC="P140" | IOSTANDARD = LVCMOS33; NET "sram_addr<18>" LOC="P142" | IOSTANDARD = LVCMOS33; -#NET "sram_addr<19>" LOC="P105" | IOSTANDARD = LVCMOS33; -#NET "sram_addr<20>" LOC="P143" | IOSTANDARD = LVCMOS33; +NET "sram_addr<19>" LOC="P105" | IOSTANDARD = LVCMOS33; +NET "sram_addr<20>" LOC="P143" | IOSTANDARD = LVCMOS33; NET "sram_data<0>" LOC="P132" | IOSTANDARD = LVCMOS33; NET "sram_data<1>" LOC="P127" | IOSTANDARD = LVCMOS33; @@ -87,5 +87,5 @@ NET "joyfire" LOC="P2" | IOSTANDARD = LVCMOS33 | PULLUP; # Otros -NET "sysclk" PERIOD=35 ns; - +NET "cpuclk" PERIOD=35.555 ns; # 28.125 MHz max +NET "cpuclkplain" PERIOD=35.555 ns; # 28.125 MHz max diff --git a/cores/Spectrum/ula_radas.v b/cores/Spectrum/ula_radas.v index f08f67b..a4f4cff 100644 --- a/cores/Spectrum/ula_radas.v +++ b/cores/Spectrum/ula_radas.v @@ -441,6 +441,7 @@ module ula_radas ( parameter TIMEXPORT = 8'hFF, + TIMEXMMU = 8'hF4, ULAPLUSADDR = 16'hBF3B, ULAPLUSDATA = 16'hFF3B; @@ -460,7 +461,7 @@ module ula_radas ( PaletteLoad = 1'b0; WriteToPortFE = 1'b0; if (iorq_n==1'b0 && wr_n==1'b0) begin - if (a[0]==1'b0 && a[7:0]!=8'hF4) + if (a[0]==1'b0 && a[7:0]!=TIMEXMMU) WriteToPortFE = 1'b1; else if (a[7:0]==TIMEXPORT) TimexConfigLoad = 1'b1; diff --git a/cores/Spectrum/zxuno.v b/cores/Spectrum/zxuno.v index e2d59e1..3238b6e 100644 --- a/cores/Spectrum/zxuno.v +++ b/cores/Spectrum/zxuno.v @@ -237,7 +237,7 @@ module zxuno ( ula_radas la_ula ( // Clocks - .clk28(clk28), + .clk28(clk28), .clkregs(cpuclkplain), .clk14(clk14), // 14MHz master clock .clk7(clk7), @@ -379,7 +379,7 @@ module zxuno ( ); ps2_keyb el_teclado ( - .clk(cpuclkplain), + .clk(clk28), .clkps2(clkps2), .dataps2(dataps2), .rows(kbdrow), @@ -516,7 +516,7 @@ module zxuno ( ); ps2_mouse_kempston el_raton ( - .clk(cpuclkplain), + .clk(clk28), .rst_n(rst_n & mrst_n & power_on_reset_n), .clkps2(mouseclk), .dataps2(mousedata), diff --git a/firmware/generamcs.bat b/firmware/generamcs.bat index 77e7015..4f89865 100644 --- a/firmware/generamcs.bat +++ b/firmware/generamcs.bat @@ -25,24 +25,27 @@ GenRom 0 sm1t BIOS firmware.rom core_taps\FIRMWARE.TAP GenRom 0 0 ESXDOS rom_binaries\esxdos.rom core_taps\ESXDOS.TAP call :CreateRom 0 "ZX Spectrum 48K Cargando Leches" leches dn lh call :CreateRom 1 "ZX +2A 4.1" plus3en41 t 0 -call :CreateRom 5 "SE Basic IV 4.0 Anya" se d h +call :CreateRom 5 "SE Basic IV 4.0 Anya" se d h1 call :CreateRom 7 "ZX Spectrum 48K" 48 dn lh17 AddItem ROM 8 rom_taps\rooted.tap -call :CreateRom 9 "Jet Pac (1983)" JetPac 0 lh17 -call :CreateRom 10 "Pssst (1983)" Pssst 0 lh17 -call :CreateRom 11 "Cookie (1983)" Cookie 0 lh17 -call :CreateRom 12 "Tranz Am (1983)" TranzAm 0 lh17 -call :CreateRom 13 "Master Chess (1983)" MasterChess 0 lh17 -call :CreateRom 14 "Backgammon (1983)" Backgammon 0 lh17 -call :CreateRom 15 "Hungry Horace (1983)" HungryHorace 0 lh17 -call :CreateRom 16 "Horace & the Spiders (1983)" HoraceSpiders 0 lh17 -call :CreateRom 17 "Planetoids (1983)" Planetoids 0 lh17 -call :CreateRom 18 "Space Raiders (1983)" SpaceRaiders 0 lh17 -call :CreateRom 19 "Deathchase (1983)" Deathchase 0 lh17 -call :CreateRom 20 "Manic Miner (1983)" ManicMiner 0 lh17 -call :CreateRom 21 "Misco Jones (2013)" MiscoJones 0 lh17 -call :CreateRom 22 "Jet Set Willy (1984)" JetSetWilly 0 lh17 -call :CreateRom 23 "Lala Prologue (2010)" LalaPrologue 0 lh17 +call :CreateRom 9 "Inves Spectrum+" inves 0 lh17 +call :CreateRom 10 "Zx Spectrum +2" plus2en t h1 +call :CreateRom 12 "Pentagon 128" pentagon pc h1 +call :CreateRom 14 "Jet Pac (1983)" JetPac 0 lh17 +call :CreateRom 15 "Pssst (1983)" Pssst 0 lh17 +call :CreateRom 16 "Cookie (1983)" Cookie 0 lh17 +call :CreateRom 17 "Tranz Am (1983)" TranzAm 0 lh17 +call :CreateRom 18 "Master Chess (1983)" MasterChess 0 lh17 +call :CreateRom 19 "Backgammon (1983)" Backgammon 0 lh17 +call :CreateRom 20 "Hungry Horace (1983)" HungryHorace 0 lh17 +call :CreateRom 21 "Horace & the Spiders (1983)" HoraceSpiders 0 lh17 +call :CreateRom 22 "Planetoids (1983)" Planetoids 0 lh17 +call :CreateRom 23 "Space Raiders (1983)" SpaceRaiders 0 lh17 +call :CreateRom 24 "Deathchase (1983)" Deathchase 0 lh17 +call :CreateRom 25 "Manic Miner (1983)" ManicMiner 0 lh17 +call :CreateRom 26 "Misco Jones (2013)" MiscoJones 0 lh17 +call :CreateRom 27 "Jet Set Willy (1984)" JetSetWilly 0 lh17 +call :CreateRom 28 "Lala Prologue (2010)" LalaPrologue 0 lh17 srec_cat FLASH.ZX1 -binary ^ -o prom.%2.mcs -Intel ^ -line-length=44 ^