mirror of https://github.com/zxdos/zxuno.git
49 lines
1.2 KiB
VHDL
49 lines
1.2 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.ALL;
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use ieee.numeric_std.ALL;
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use std.textio.all;
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entity rom_image is
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generic (
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ADDR_WIDTH : integer := 16;
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DATA_WIDTH : integer := 8
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);
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port (
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clk_i : in std_logic;
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addr_i : in std_logic_vector(ADDR_WIDTH-1 downto 0);
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data_o : out std_logic_vector(DATA_WIDTH-1 downto 0)
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);
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end rom_image;
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architecture rtl of rom_image is
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constant MEM_DEPTH : integer := 2**ADDR_WIDTH;
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type mem_type is array (0 to MEM_DEPTH-1) of signed(DATA_WIDTH-1 downto 0);
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impure function init_mem(mif_file_name : in string) return mem_type is
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file mif_file : text open read_mode is mif_file_name;
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variable mif_line : line;
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variable temp_bv : bit_vector(DATA_WIDTH-1 downto 0);
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variable temp_mem : mem_type;
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begin
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for i in mem_type'range loop
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readline(mif_file, mif_line);
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read(mif_line, temp_bv);
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temp_mem(i) := signed(to_stdlogicvector(temp_bv));
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end loop;
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return temp_mem;
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end function;
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constant mem : mem_type := init_mem("rom_image.mif");
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begin
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process (clk_i)
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begin
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if rising_edge(clk_i) then
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data_o <= std_logic_vector(mem(to_integer(unsigned(addr_i))));
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end if;
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end process;
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end rtl;
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