mirror of https://github.com/zeldaret/mm.git
51 lines
1.5 KiB
C
51 lines
1.5 KiB
C
#ifndef PR_RDP_H
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#define PR_RDP_H
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/* DP Command Registers */
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#define DPC_START_REG 0x04100000
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#define DPC_END_REG 0x04100004
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#define DPC_CURRENT_REG 0x04100008
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#define DPC_STATUS_REG 0x0410000C
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#define DPC_CLOCK_REG 0x04100010
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#define DPC_BUFBUSY_REG 0x04100014
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#define DPC_PIPEBUSY_REG 0x04100018
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#define DPC_TMEM_REG 0x0410001C
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/* DP Span Registers */
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#define DPS_TBIST_REG 0x04200000
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#define DPS_TEST_MODE_REG 0x04200004
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#define DPS_BUFTEST_ADDR_REG 0x04200008
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#define DPS_BUFTEST_DATA_REG 0x0420000C
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/* DP Status Read Flags */
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#define DPC_STATUS_XBUS_DMEM_DMA (1 << 0)
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#define DPC_STATUS_FREEZE (1 << 1)
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#define DPC_STATUS_FLUSH (1 << 2)
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#define DPC_STATUS_START_GCLK (1 << 3)
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#define DPC_STATUS_TMEM_BUSY (1 << 4)
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#define DPC_STATUS_PIPE_BUSY (1 << 5)
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#define DPC_STATUS_CMD_BUSY (1 << 6)
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#define DPC_STATUS_CBUF_READY (1 << 7)
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#define DPC_STATUS_DMA_BUSY (1 << 8)
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#define DPC_STATUS_END_VALID (1 << 9)
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#define DPC_STATUS_START_VALID (1 << 10)
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/* DP Status Write Flags */
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#define DPC_CLR_XBUS_DMEM_DMA (1 << 0)
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#define DPC_SET_XBUS_DMEM_DMA (1 << 1)
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#define DPC_CLR_FREEZE (1 << 2)
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#define DPC_SET_FREEZE (1 << 3)
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#define DPC_CLR_FLUSH (1 << 4)
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#define DPC_SET_FLUSH (1 << 5)
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#define DPC_CLR_TMEM_CTR (1 << 6)
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#define DPC_CLR_PIPE_CTR (1 << 7)
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#define DPC_CLR_CMD_CTR (1 << 8)
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#define DPC_CLR_CLOCK_CTR (1 << 9)
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u32 osDpGetStatus(void);
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void osDpSetStatus(u32 data);
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#endif
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