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Match a few nonmatchings and delete unused asm (#117) 

* match a few nonmatchings, delete unused asm

* fix missing returns in f_op_actor_iter

* remove obsolete comments
This commit is contained in:
lepelog 2021-03-03 18:17:19 +01:00 committed by GitHub
parent 368135b3da
commit 3b69d4cba0
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
94 changed files with 69 additions and 1675 deletions
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66
include/JSystem/JKernel/JKRSolidHeap/asm/func_802D10FC.s
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@ -1,66 +0,0 @@
/* dump__12JKRSolidHeapFv __ct__12JKRSolidHeapFPvUlP7JKRHeapb::dump(void) */
/* missing reference */
/* 802D10FC 002CE03C 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 802D1100 002CE040 7C 08 02 A6 */ mflr r0
/* 802D1104 002CE044 90 01 00 34 */ stw r0, 0x34(r1)
/* 802D1108 002CE048 39 61 00 30 */ addi r11, r1, 0x30
/* 802D110C 002CE04C 48 09 10 D1 */ bl _savegpr_29
/* 802D1110 002CE050 7C 7E 1B 78 */ mr r30, r3
/* 802D1114 002CE054 81 83 00 00 */ lwz r12, 0(r3)
/* 802D1118 002CE058 81 8C 00 14 */ lwz r12, 0x14(r12)
/* 802D111C 002CE05C 7D 89 03 A6 */ mtctr r12
/* 802D1120 002CE060 4E 80 04 21 */ bctrl
/* 802D1124 002CE064 7C 7F 1B 78 */ mr r31, r3
/* 802D1128 002CE068 38 7E 00 18 */ addi r3, r30, 0x18
/* 802D112C 002CE06C 48 06 DF 15 */ bl OSLockMutex
/* 802D1130 002CE070 80 9E 00 30 */ lwz r4, 0x30(r30)
/* 802D1134 002CE074 80 1E 00 70 */ lwz r0, 0x70(r30)
/* 802D1138 002CE078 7C A4 00 50 */ subf r5, r4, r0
/* 802D113C 002CE07C 80 7E 00 74 */ lwz r3, 0x74(r30)
/* 802D1140 002CE080 80 1E 00 34 */ lwz r0, 0x34(r30)
/* 802D1144 002CE084 7C 03 00 50 */ subf r0, r3, r0
/* 802D1148 002CE088 7F A5 02 14 */ add r29, r5, r0
/* 802D114C 002CE08C 3C 60 80 3A */ lis r3, lbl_8039CE50@ha
/* 802D1150 002CE090 38 63 CE 50 */ addi r3, r3, lbl_8039CE50@l
/* 802D1154 002CE094 38 63 01 17 */ addi r3, r3, 0x117
/* 802D1158 002CE098 4C C6 31 82 */ crclr 6
/* 802D115C 002CE09C 48 01 74 6D */ bl JUTReportConsole_f
/* 802D1160 002CE0A0 80 9E 00 74 */ lwz r4, 0x74(r30)
/* 802D1164 002CE0A4 3C 60 80 3A */ lis r3, lbl_8039CE50@ha
/* 802D1168 002CE0A8 38 63 CE 50 */ addi r3, r3, lbl_8039CE50@l
/* 802D116C 002CE0AC 38 63 01 28 */ addi r3, r3, 0x128
/* 802D1170 002CE0B0 80 1E 00 34 */ lwz r0, 0x34(r30)
/* 802D1174 002CE0B4 7C A4 00 50 */ subf r5, r4, r0
/* 802D1178 002CE0B8 4C C6 31 82 */ crclr 6
/* 802D117C 002CE0BC 48 01 74 4D */ bl JUTReportConsole_f
/* 802D1180 002CE0C0 80 BE 00 38 */ lwz r5, 0x38(r30)
/* 802D1184 002CE0C4 3C 60 80 3A */ lis r3, lbl_8039CE50@ha
/* 802D1188 002CE0C8 38 63 CE 50 */ addi r3, r3, lbl_8039CE50@l
/* 802D118C 002CE0CC 38 63 01 39 */ addi r3, r3, 0x139
/* 802D1190 002CE0D0 7F A4 EB 78 */ mr r4, r29
/* 802D1194 002CE0D4 C0 62 C5 A8 */ lfs f3, lbl_80455FA8-_SDA2_BASE_(r2)
/* 802D1198 002CE0D8 C8 22 C5 B0 */ lfd f1, lbl_80455FB0-_SDA2_BASE_(r2)
/* 802D119C 002CE0DC 6F A0 80 00 */ xoris r0, r29, 0x8000
/* 802D11A0 002CE0E0 90 01 00 0C */ stw r0, 0xc(r1)
/* 802D11A4 002CE0E4 3C 00 43 30 */ lis r0, 0x4330
/* 802D11A8 002CE0E8 90 01 00 08 */ stw r0, 8(r1)
/* 802D11AC 002CE0EC C8 01 00 08 */ lfd f0, 8(r1)
/* 802D11B0 002CE0F0 EC 40 08 28 */ fsubs f2, f0, f1
/* 802D11B4 002CE0F4 C8 22 C5 B8 */ lfd f1, lbl_80455FB8-_SDA2_BASE_(r2)
/* 802D11B8 002CE0F8 90 A1 00 14 */ stw r5, 0x14(r1)
/* 802D11BC 002CE0FC 90 01 00 10 */ stw r0, 0x10(r1)
/* 802D11C0 002CE100 C8 01 00 10 */ lfd f0, 0x10(r1)
/* 802D11C4 002CE104 EC 00 08 28 */ fsubs f0, f0, f1
/* 802D11C8 002CE108 EC 02 00 24 */ fdivs f0, f2, f0
/* 802D11CC 002CE10C EC 23 00 32 */ fmuls f1, f3, f0
/* 802D11D0 002CE110 4C C6 32 42 */ crset 6
/* 802D11D4 002CE114 48 01 73 F5 */ bl JUTReportConsole_f
/* 802D11D8 002CE118 38 7E 00 18 */ addi r3, r30, 0x18
/* 802D11DC 002CE11C 48 06 DF 41 */ bl OSUnlockMutex
/* 802D11E0 002CE120 7F E3 FB 78 */ mr r3, r31
/* 802D11E4 002CE124 39 61 00 30 */ addi r11, r1, 0x30
/* 802D11E8 002CE128 48 09 10 41 */ bl _restgpr_29
/* 802D11EC 002CE12C 80 01 00 34 */ lwz r0, 0x34(r1)
/* 802D11F0 002CE130 7C 08 03 A6 */ mtlr r0
/* 802D11F4 002CE134 38 21 00 30 */ addi r1, r1, 0x30
/* 802D11F8 002CE138 4E 80 00 20 */ blr

10
include/f/f_ap_game/asm/func_80018A44.s
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@ -1,10 +0,0 @@
/* 80018A44 00015984 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80018A48 00015988 7C 08 02 A6 */ mflr r0
/* 80018A4C 0001598C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80018A50 00015990 48 00 63 C1 */ bl fopScnM_Management__Fv
/* 80018A54 00015994 48 00 5B FD */ bl fopOvlpM_Management__Fv
/* 80018A58 00015998 48 00 59 1D */ bl fopCamM_Management
/* 80018A5C 0001599C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80018A60 000159A0 7C 08 03 A6 */ mtlr r0
/* 80018A64 000159A4 38 21 00 10 */ addi r1, r1, 0x10
/* 80018A68 000159A8 4E 80 00 20 */ blr

15
include/f/f_ap_game/asm/func_80018A6C.s
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@ -1,15 +0,0 @@
/* 80018A6C 000159AC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80018A70 000159B0 7C 08 02 A6 */ mflr r0
/* 80018A74 000159B4 90 01 00 14 */ stw r0, 0x14(r1)
/* 80018A78 000159B8 38 60 00 00 */ li r3, 0
/*.global fapGm_After*/
/* 80018A7C 000159BC 3C 80 80 02 */ lis r4, fapGm_After@ha
/*.global fapGm_After*/
/* 80018A80 000159C0 38 84 8A 44 */ addi r4, r4, fapGm_After@l
/* 80018A84 000159C4 48 00 96 D5 */ bl fpcM_Management__FPFv_vPFv_v
/* 80018A88 000159C8 38 60 00 00 */ li r3, 0
/* 80018A8C 000159CC 48 24 D3 91 */ bl cCt_Counter
/* 80018A90 000159D0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80018A94 000159D4 7C 08 03 A6 */ mtlr r0
/* 80018A98 000159D8 38 21 00 10 */ addi r1, r1, 0x10
/* 80018A9C 000159DC 4E 80 00 20 */ blr

16
include/f/f_ap_game/asm/func_80018AA0.s
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@ -1,16 +0,0 @@
/* 80018AA0 000159E0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80018AA4 000159E4 7C 08 02 A6 */ mflr r0
/* 80018AA8 000159E8 90 01 00 14 */ stw r0, 0x14(r1)
/* 80018AAC 000159EC 48 00 98 0D */ bl fpcM_Init
/* 80018AB0 000159F0 48 00 63 81 */ bl fopScnM_Init__Fv
/* 80018AB4 000159F4 48 00 5C 35 */ bl fopOvlpM_Init__Fv
/* 80018AB8 000159F8 48 00 58 C1 */ bl fopCamM_Init__Fv
/* 80018ABC 000159FC 48 00 7A 5D */ bl fopDwTg_CreateQueue
/* 80018AC0 00015A00 38 00 FF FF */ li r0, -1
/* 80018AC4 00015A04 3C 60 80 3F */ lis r3, g_HIO@ha
/* 80018AC8 00015A08 38 63 1B BC */ addi r3, r3, g_HIO@l
/* 80018ACC 00015A0C 98 03 00 04 */ stb r0, 4(r3)
/* 80018AD0 00015A10 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80018AD4 00015A14 7C 08 03 A6 */ mtlr r0
/* 80018AD8 00015A18 38 21 00 10 */ addi r1, r1, 0x10
/* 80018ADC 00015A1C 4E 80 00 20 */ blr

86
include/f/f_op/f_op_actor_mng/asm/func_8001A7E0.s
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@ -1,86 +0,0 @@
/* 8001A7E0 00017720 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 8001A7E4 00017724 7C 08 02 A6 */ mflr r0
/* 8001A7E8 00017728 90 01 00 34 */ stw r0, 0x34(r1)
/* 8001A7EC 0001772C 7C 65 1B 78 */ mr r5, r3
/* 8001A7F0 00017730 38 61 00 0C */ addi r3, r1, 0xc
/* 8001A7F4 00017734 38 84 04 D0 */ addi r4, r4, 0x4d0
/* 8001A7F8 00017738 38 A5 04 D0 */ addi r5, r5, 0x4d0
/* 8001A7FC 0001773C 48 24 C3 39 */ bl __mi__4cXyzCFRC3Vec
/* 8001A800 00017740 C0 01 00 0C */ lfs f0, 0xc(r1)
/* 8001A804 00017744 D0 01 00 18 */ stfs f0, 0x18(r1)
/* 8001A808 00017748 C0 01 00 10 */ lfs f0, 0x10(r1)
/* 8001A80C 0001774C D0 01 00 1C */ stfs f0, 0x1c(r1)
/* 8001A810 00017750 C0 01 00 14 */ lfs f0, 0x14(r1)
/* 8001A814 00017754 D0 01 00 20 */ stfs f0, 0x20(r1)
/* 8001A818 00017758 38 61 00 18 */ addi r3, r1, 0x18
/* 8001A81C 0001775C 48 32 C9 1D */ bl PSVECSquareMag
/* 8001A820 00017760 C0 02 82 04 */ lfs f0, lbl_80451C04-_SDA2_BASE_(r2)
/* 8001A824 00017764 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8001A828 00017768 40 81 00 58 */ ble lbl_8001A880
/* 8001A82C 0001776C FC 00 08 34 */ frsqrte f0, f1
/* 8001A830 00017770 C8 82 82 08 */ lfd f4, lbl_80451C08-_SDA2_BASE_(r2)
/* 8001A834 00017774 FC 44 00 32 */ fmul f2, f4, f0
/* 8001A838 00017778 C8 62 82 10 */ lfd f3, lbl_80451C10-_SDA2_BASE_(r2)
/* 8001A83C 0001777C FC 00 00 32 */ fmul f0, f0, f0
/* 8001A840 00017780 FC 01 00 32 */ fmul f0, f1, f0
/* 8001A844 00017784 FC 03 00 28 */ fsub f0, f3, f0
/* 8001A848 00017788 FC 02 00 32 */ fmul f0, f2, f0
/* 8001A84C 0001778C FC 44 00 32 */ fmul f2, f4, f0
/* 8001A850 00017790 FC 00 00 32 */ fmul f0, f0, f0
/* 8001A854 00017794 FC 01 00 32 */ fmul f0, f1, f0
/* 8001A858 00017798 FC 03 00 28 */ fsub f0, f3, f0
/* 8001A85C 0001779C FC 02 00 32 */ fmul f0, f2, f0
/* 8001A860 000177A0 FC 44 00 32 */ fmul f2, f4, f0
/* 8001A864 000177A4 FC 00 00 32 */ fmul f0, f0, f0
/* 8001A868 000177A8 FC 01 00 32 */ fmul f0, f1, f0
/* 8001A86C 000177AC FC 03 00 28 */ fsub f0, f3, f0
/* 8001A870 000177B0 FC 02 00 32 */ fmul f0, f2, f0
/* 8001A874 000177B4 FC 21 00 32 */ fmul f1, f1, f0
/* 8001A878 000177B8 FC 20 08 18 */ frsp f1, f1
/* 8001A87C 000177BC 48 00 00 88 */ b lbl_8001A904
lbl_8001A880:
/* 8001A880 000177C0 C8 02 82 18 */ lfd f0, lbl_80451C18-_SDA2_BASE_(r2)
/* 8001A884 000177C4 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8001A888 000177C8 40 80 00 10 */ bge lbl_8001A898
/* 8001A88C 000177CC 3C 60 80 45 */ lis r3, lbl_80450AE0@ha
/* 8001A890 000177D0 C0 23 0A E0 */ lfs f1, lbl_80450AE0@l(r3)
/* 8001A894 000177D4 48 00 00 70 */ b lbl_8001A904
lbl_8001A898:
/* 8001A898 000177D8 D0 21 00 08 */ stfs f1, 8(r1)
/* 8001A89C 000177DC 80 81 00 08 */ lwz r4, 8(r1)
/* 8001A8A0 000177E0 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 8001A8A4 000177E4 3C 00 7F 80 */ lis r0, 0x7f80
/* 8001A8A8 000177E8 7C 03 00 00 */ cmpw r3, r0
/* 8001A8AC 000177EC 41 82 00 14 */ beq lbl_8001A8C0
/* 8001A8B0 000177F0 40 80 00 40 */ bge lbl_8001A8F0
/* 8001A8B4 000177F4 2C 03 00 00 */ cmpwi r3, 0
/* 8001A8B8 000177F8 41 82 00 20 */ beq lbl_8001A8D8
/* 8001A8BC 000177FC 48 00 00 34 */ b lbl_8001A8F0
lbl_8001A8C0:
/* 8001A8C0 00017800 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8001A8C4 00017804 41 82 00 0C */ beq lbl_8001A8D0
/* 8001A8C8 00017808 38 00 00 01 */ li r0, 1
/* 8001A8CC 0001780C 48 00 00 28 */ b lbl_8001A8F4
lbl_8001A8D0:
/* 8001A8D0 00017810 38 00 00 02 */ li r0, 2
/* 8001A8D4 00017814 48 00 00 20 */ b lbl_8001A8F4
lbl_8001A8D8:
/* 8001A8D8 00017818 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8001A8DC 0001781C 41 82 00 0C */ beq lbl_8001A8E8
/* 8001A8E0 00017820 38 00 00 05 */ li r0, 5
/* 8001A8E4 00017824 48 00 00 10 */ b lbl_8001A8F4
lbl_8001A8E8:
/* 8001A8E8 00017828 38 00 00 03 */ li r0, 3
/* 8001A8EC 0001782C 48 00 00 08 */ b lbl_8001A8F4
lbl_8001A8F0:
/* 8001A8F0 00017830 38 00 00 04 */ li r0, 4
lbl_8001A8F4:
/* 8001A8F4 00017834 2C 00 00 01 */ cmpwi r0, 1
/* 8001A8F8 00017838 40 82 00 0C */ bne lbl_8001A904
/* 8001A8FC 0001783C 3C 60 80 45 */ lis r3, lbl_80450AE0@ha
/* 8001A900 00017840 C0 23 0A E0 */ lfs f1, lbl_80450AE0@l(r3)
lbl_8001A904:
/* 8001A904 00017844 80 01 00 34 */ lwz r0, 0x34(r1)
/* 8001A908 00017848 7C 08 03 A6 */ mtlr r0
/* 8001A90C 0001784C 38 21 00 30 */ addi r1, r1, 0x30
/* 8001A910 00017850 4E 80 00 20 */ blr

85
include/f/f_op/f_op_actor_mng/asm/func_8001A964.s
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/* 8001A964 000178A4 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 8001A968 000178A8 7C 08 02 A6 */ mflr r0
/* 8001A96C 000178AC 90 01 00 34 */ stw r0, 0x34(r1)
/* 8001A970 000178B0 38 A3 04 D0 */ addi r5, r3, 0x4d0
/* 8001A974 000178B4 38 84 04 D0 */ addi r4, r4, 0x4d0
/* 8001A978 000178B8 38 61 00 18 */ addi r3, r1, 0x18
/* 8001A97C 000178BC 48 24 C1 B9 */ bl __mi__4cXyzCFRC3Vec
/* 8001A980 000178C0 C0 01 00 18 */ lfs f0, 0x18(r1)
/* 8001A984 000178C4 D0 01 00 0C */ stfs f0, 0xc(r1)
/* 8001A988 000178C8 C0 02 82 04 */ lfs f0, lbl_80451C04-_SDA2_BASE_(r2)
/* 8001A98C 000178CC D0 01 00 10 */ stfs f0, 0x10(r1)
/* 8001A990 000178D0 C0 01 00 20 */ lfs f0, 0x20(r1)
/* 8001A994 000178D4 D0 01 00 14 */ stfs f0, 0x14(r1)
/* 8001A998 000178D8 38 61 00 0C */ addi r3, r1, 0xc
/* 8001A99C 000178DC 48 32 C7 9D */ bl PSVECSquareMag
/* 8001A9A0 000178E0 C0 02 82 04 */ lfs f0, lbl_80451C04-_SDA2_BASE_(r2)
/* 8001A9A4 000178E4 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8001A9A8 000178E8 40 81 00 58 */ ble lbl_8001AA00
/* 8001A9AC 000178EC FC 00 08 34 */ frsqrte f0, f1
/* 8001A9B0 000178F0 C8 82 82 08 */ lfd f4, lbl_80451C08-_SDA2_BASE_(r2)
/* 8001A9B4 000178F4 FC 44 00 32 */ fmul f2, f4, f0
/* 8001A9B8 000178F8 C8 62 82 10 */ lfd f3, lbl_80451C10-_SDA2_BASE_(r2)
/* 8001A9BC 000178FC FC 00 00 32 */ fmul f0, f0, f0
/* 8001A9C0 00017900 FC 01 00 32 */ fmul f0, f1, f0
/* 8001A9C4 00017904 FC 03 00 28 */ fsub f0, f3, f0
/* 8001A9C8 00017908 FC 02 00 32 */ fmul f0, f2, f0
/* 8001A9CC 0001790C FC 44 00 32 */ fmul f2, f4, f0
/* 8001A9D0 00017910 FC 00 00 32 */ fmul f0, f0, f0
/* 8001A9D4 00017914 FC 01 00 32 */ fmul f0, f1, f0
/* 8001A9D8 00017918 FC 03 00 28 */ fsub f0, f3, f0
/* 8001A9DC 0001791C FC 02 00 32 */ fmul f0, f2, f0
/* 8001A9E0 00017920 FC 44 00 32 */ fmul f2, f4, f0
/* 8001A9E4 00017924 FC 00 00 32 */ fmul f0, f0, f0
/* 8001A9E8 00017928 FC 01 00 32 */ fmul f0, f1, f0
/* 8001A9EC 0001792C FC 03 00 28 */ fsub f0, f3, f0
/* 8001A9F0 00017930 FC 02 00 32 */ fmul f0, f2, f0
/* 8001A9F4 00017934 FC 21 00 32 */ fmul f1, f1, f0
/* 8001A9F8 00017938 FC 20 08 18 */ frsp f1, f1
/* 8001A9FC 0001793C 48 00 00 88 */ b lbl_8001AA84
lbl_8001AA00:
/* 8001AA00 00017940 C8 02 82 18 */ lfd f0, lbl_80451C18-_SDA2_BASE_(r2)
/* 8001AA04 00017944 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8001AA08 00017948 40 80 00 10 */ bge lbl_8001AA18
/* 8001AA0C 0001794C 3C 60 80 45 */ lis r3, lbl_80450AE0@ha
/* 8001AA10 00017950 C0 23 0A E0 */ lfs f1, lbl_80450AE0@l(r3)
/* 8001AA14 00017954 48 00 00 70 */ b lbl_8001AA84
lbl_8001AA18:
/* 8001AA18 00017958 D0 21 00 08 */ stfs f1, 8(r1)
/* 8001AA1C 0001795C 80 81 00 08 */ lwz r4, 8(r1)
/* 8001AA20 00017960 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 8001AA24 00017964 3C 00 7F 80 */ lis r0, 0x7f80
/* 8001AA28 00017968 7C 03 00 00 */ cmpw r3, r0
/* 8001AA2C 0001796C 41 82 00 14 */ beq lbl_8001AA40
/* 8001AA30 00017970 40 80 00 40 */ bge lbl_8001AA70
/* 8001AA34 00017974 2C 03 00 00 */ cmpwi r3, 0
/* 8001AA38 00017978 41 82 00 20 */ beq lbl_8001AA58
/* 8001AA3C 0001797C 48 00 00 34 */ b lbl_8001AA70
lbl_8001AA40:
/* 8001AA40 00017980 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8001AA44 00017984 41 82 00 0C */ beq lbl_8001AA50
/* 8001AA48 00017988 38 00 00 01 */ li r0, 1
/* 8001AA4C 0001798C 48 00 00 28 */ b lbl_8001AA74
lbl_8001AA50:
/* 8001AA50 00017990 38 00 00 02 */ li r0, 2
/* 8001AA54 00017994 48 00 00 20 */ b lbl_8001AA74
lbl_8001AA58:
/* 8001AA58 00017998 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8001AA5C 0001799C 41 82 00 0C */ beq lbl_8001AA68
/* 8001AA60 000179A0 38 00 00 05 */ li r0, 5
/* 8001AA64 000179A4 48 00 00 10 */ b lbl_8001AA74
lbl_8001AA68:
/* 8001AA68 000179A8 38 00 00 03 */ li r0, 3
/* 8001AA6C 000179AC 48 00 00 08 */ b lbl_8001AA74
lbl_8001AA70:
/* 8001AA70 000179B0 38 00 00 04 */ li r0, 4
lbl_8001AA74:
/* 8001AA74 000179B4 2C 00 00 01 */ cmpwi r0, 1
/* 8001AA78 000179B8 40 82 00 0C */ bne lbl_8001AA84
/* 8001AA7C 000179BC 3C 60 80 45 */ lis r3, lbl_80450AE0@ha
/* 8001AA80 000179C0 C0 23 0A E0 */ lfs f1, lbl_80450AE0@l(r3)
lbl_8001AA84:
/* 8001AA84 000179C4 80 01 00 34 */ lwz r0, 0x34(r1)
/* 8001AA88 000179C8 7C 08 03 A6 */ mtlr r0
/* 8001AA8C 000179CC 38 21 00 30 */ addi r1, r1, 0x30
/* 8001AA90 000179D0 4E 80 00 20 */ blr

17
include/f/f_op/f_op_camera/asm/func_8001E140.s
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@ -1,17 +0,0 @@
/* 8001E140 0001B080 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E144 0001B084 7C 08 02 A6 */ mflr r0
/* 8001E148 0001B088 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E14C 0001B08C 7C 64 1B 78 */ mr r4, r3
/* 8001E150 0001B090 38 60 00 01 */ li r3, 1
/* 8001E154 0001B094 3C A0 80 40 */ lis r5, g_dComIfG_gameInfo@ha
/* 8001E158 0001B098 38 A5 61 C0 */ addi r5, r5, g_dComIfG_gameInfo@l
/* 8001E15C 0001B09C 88 05 5E B5 */ lbz r0, 0x5eb5(r5)
/* 8001E160 0001B0A0 28 00 00 00 */ cmplwi r0, 0
/* 8001E164 0001B0A4 40 82 00 0C */ bne lbl_8001E170
/* 8001E168 0001B0A8 80 64 02 24 */ lwz r3, 0x224(r4)
/* 8001E16C 0001B0AC 48 00 38 B9 */ bl fpcLf_DrawMethod
lbl_8001E170:
/* 8001E170 0001B0B0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E174 0001B0B4 7C 08 03 A6 */ mtlr r0
/* 8001E178 0001B0B8 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E17C 0001B0BC 4E 80 00 20 */ blr

22
include/f/f_op/f_op_camera/asm/func_8001E1C8.s
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@ -1,22 +0,0 @@
/* 8001E1C8 0001B108 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E1CC 0001B10C 7C 08 02 A6 */ mflr r0
/* 8001E1D0 0001B110 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E1D4 0001B114 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001E1D8 0001B118 93 C1 00 08 */ stw r30, 8(r1)
/* 8001E1DC 0001B11C 7C 7E 1B 78 */ mr r30, r3
/* 8001E1E0 0001B120 80 63 02 24 */ lwz r3, 0x224(r3)
/* 8001E1E4 0001B124 7F C4 F3 78 */ mr r4, r30
/* 8001E1E8 0001B128 48 00 42 9D */ bl fpcMtd_IsDelete
/* 8001E1EC 0001B12C 7C 7F 1B 78 */ mr r31, r3
/* 8001E1F0 0001B130 2C 1F 00 01 */ cmpwi r31, 1
/* 8001E1F4 0001B134 40 82 00 0C */ bne lbl_8001E200
/* 8001E1F8 0001B138 38 7E 02 10 */ addi r3, r30, 0x210
/* 8001E1FC 0001B13C 48 00 22 D9 */ bl fopDwTg_DrawQTo__FP16create_tag_class
lbl_8001E200:
/* 8001E200 0001B140 7F E3 FB 78 */ mr r3, r31
/* 8001E204 0001B144 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001E208 0001B148 83 C1 00 08 */ lwz r30, 8(r1)
/* 8001E20C 0001B14C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E210 0001B150 7C 08 03 A6 */ mtlr r0
/* 8001E214 0001B154 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E218 0001B158 4E 80 00 20 */ blr

22
include/f/f_op/f_op_camera/asm/func_8001E21C.s
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@ -1,22 +0,0 @@
/* 8001E21C 0001B15C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E220 0001B160 7C 08 02 A6 */ mflr r0
/* 8001E224 0001B164 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E228 0001B168 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001E22C 0001B16C 93 C1 00 08 */ stw r30, 8(r1)
/* 8001E230 0001B170 7C 7E 1B 78 */ mr r30, r3
/* 8001E234 0001B174 80 63 02 24 */ lwz r3, 0x224(r3)
/* 8001E238 0001B178 7F C4 F3 78 */ mr r4, r30
/* 8001E23C 0001B17C 48 00 42 6D */ bl fpcMtd_Delete
/* 8001E240 0001B180 7C 7F 1B 78 */ mr r31, r3
/* 8001E244 0001B184 2C 1F 00 01 */ cmpwi r31, 1
/* 8001E248 0001B188 40 82 00 0C */ bne lbl_8001E254
/* 8001E24C 0001B18C 38 7E 02 10 */ addi r3, r30, 0x210
/* 8001E250 0001B190 48 00 22 85 */ bl fopDwTg_DrawQTo__FP16create_tag_class
lbl_8001E254:
/* 8001E254 0001B194 7F E3 FB 78 */ mr r3, r31
/* 8001E258 0001B198 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001E25C 0001B19C 83 C1 00 08 */ lwz r30, 8(r1)
/* 8001E260 0001B1A0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E264 0001B1A4 7C 08 03 A6 */ mtlr r0
/* 8001E268 0001B1A8 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E26C 0001B1AC 4E 80 00 20 */ blr

23
include/f/f_op/f_op_kankyo_mng/asm/func_8001F660.s
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@ -1,23 +0,0 @@
/* 8001F660 0001C5A0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001F664 0001C5A4 7C 08 02 A6 */ mflr r0
/* 8001F668 0001C5A8 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001F66C 0001C5AC 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001F670 0001C5B0 38 60 FF FC */ li r3, -4
/* 8001F674 0001C5B4 38 80 00 1C */ li r4, 0x1c
/* 8001F678 0001C5B8 48 24 3B B1 */ bl memalignB__3cMlFiUl
/* 8001F67C 0001C5BC 7C 7F 1B 79 */ or. r31, r3, r3
/* 8001F680 0001C5C0 41 82 00 20 */ beq lbl_8001F6A0
/* 8001F684 0001C5C4 38 80 00 00 */ li r4, 0
/* 8001F688 0001C5C8 38 A0 00 1C */ li r5, 0x1c
/* 8001F68C 0001C5CC 48 25 02 D1 */ bl cLib_memSet__FPviUl
/* 8001F690 0001C5D0 C0 02 82 68 */ lfs f0, lbl_80451C68-_SDA2_BASE_(r2)
/* 8001F694 0001C5D4 D0 1F 00 0C */ stfs f0, 0xc(r31)
/* 8001F698 0001C5D8 D0 1F 00 10 */ stfs f0, 0x10(r31)
/* 8001F69C 0001C5DC D0 1F 00 14 */ stfs f0, 0x14(r31)
lbl_8001F6A0:
/* 8001F6A0 0001C5E0 7F E3 FB 78 */ mr r3, r31
/* 8001F6A4 0001C5E4 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001F6A8 0001C5E8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001F6AC 0001C5EC 7C 08 03 A6 */ mtlr r0
/* 8001F6B0 0001C5F0 38 21 00 10 */ addi r1, r1, 0x10
/* 8001F6B4 0001C5F4 4E 80 00 20 */ blr

40
include/f/f_op/f_op_kankyo_mng/asm/func_8001F6B8.s
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@ -1,40 +0,0 @@
/* 8001F6B8 0001C5F8 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8001F6BC 0001C5FC 7C 08 02 A6 */ mflr r0
/* 8001F6C0 0001C600 90 01 00 24 */ stw r0, 0x24(r1)
/* 8001F6C4 0001C604 39 61 00 20 */ addi r11, r1, 0x20
/* 8001F6C8 0001C608 48 34 2B 15 */ bl _savegpr_29
/* 8001F6CC 0001C60C 7C 7D 1B 78 */ mr r29, r3
/* 8001F6D0 0001C610 7C 9E 23 78 */ mr r30, r4
/* 8001F6D4 0001C614 7C BF 2B 78 */ mr r31, r5
/* 8001F6D8 0001C618 4B FF FF 89 */ bl fopKyM_CreateAppend__Fv
/* 8001F6DC 0001C61C 28 03 00 00 */ cmplwi r3, 0
/* 8001F6E0 0001C620 40 82 00 0C */ bne lbl_8001F6EC
/* 8001F6E4 0001C624 38 60 00 00 */ li r3, 0
/* 8001F6E8 0001C628 48 00 00 48 */ b lbl_8001F730
lbl_8001F6EC:
/* 8001F6EC 0001C62C 28 1E 00 00 */ cmplwi r30, 0
/* 8001F6F0 0001C630 41 82 00 1C */ beq lbl_8001F70C
/* 8001F6F4 0001C634 C0 1E 00 00 */ lfs f0, 0(r30)
/* 8001F6F8 0001C638 D0 03 00 00 */ stfs f0, 0(r3)
/* 8001F6FC 0001C63C C0 1E 00 04 */ lfs f0, 4(r30)
/* 8001F700 0001C640 D0 03 00 04 */ stfs f0, 4(r3)
/* 8001F704 0001C644 C0 1E 00 08 */ lfs f0, 8(r30)
/* 8001F708 0001C648 D0 03 00 08 */ stfs f0, 8(r3)
lbl_8001F70C:
/* 8001F70C 0001C64C 28 1F 00 00 */ cmplwi r31, 0
/* 8001F710 0001C650 41 82 00 1C */ beq lbl_8001F72C
/* 8001F714 0001C654 C0 1F 00 00 */ lfs f0, 0(r31)
/* 8001F718 0001C658 D0 03 00 0C */ stfs f0, 0xc(r3)
/* 8001F71C 0001C65C C0 1F 00 04 */ lfs f0, 4(r31)
/* 8001F720 0001C660 D0 03 00 10 */ stfs f0, 0x10(r3)
/* 8001F724 0001C664 C0 1F 00 08 */ lfs f0, 8(r31)
/* 8001F728 0001C668 D0 03 00 14 */ stfs f0, 0x14(r3)
lbl_8001F72C:
/* 8001F72C 0001C66C 93 A3 00 18 */ stw r29, 0x18(r3)
lbl_8001F730:
/* 8001F730 0001C670 39 61 00 20 */ addi r11, r1, 0x20
/* 8001F734 0001C674 48 34 2A F5 */ bl _restgpr_29
/* 8001F738 0001C678 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8001F73C 0001C67C 7C 08 03 A6 */ mtlr r0
/* 8001F740 0001C680 38 21 00 20 */ addi r1, r1, 0x20
/* 8001F744 0001C684 4E 80 00 20 */ blr

8
include/f/f_op/f_op_kankyo_mng/asm/func_8001F748.s
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@ -1,8 +0,0 @@
/* 8001F748 0001C688 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001F74C 0001C68C 7C 08 02 A6 */ mflr r0
/* 8001F750 0001C690 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001F754 0001C694 48 00 29 C5 */ bl fpcM_Delete
/* 8001F758 0001C698 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001F75C 0001C69C 7C 08 03 A6 */ mtlr r0
/* 8001F760 0001C6A0 38 21 00 10 */ addi r1, r1, 0x10
/* 8001F764 0001C6A4 4E 80 00 20 */ blr

20
include/f/f_op/f_op_kankyo_mng/asm/func_8001F768.s
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@ -1,20 +0,0 @@
/* 8001F768 0001C6A8 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8001F76C 0001C6AC 7C 08 02 A6 */ mflr r0
/* 8001F770 0001C6B0 90 01 00 24 */ stw r0, 0x24(r1)
/* 8001F774 0001C6B4 39 61 00 20 */ addi r11, r1, 0x20
/* 8001F778 0001C6B8 48 34 2A 65 */ bl _savegpr_29
/* 8001F77C 0001C6BC 7C 7D 1B 78 */ mr r29, r3
/* 8001F780 0001C6C0 7C 9E 23 78 */ mr r30, r4
/* 8001F784 0001C6C4 7C BF 2B 78 */ mr r31, r5
/* 8001F788 0001C6C8 48 00 1F 6D */ bl fpcLy_CurrentLayer
/* 8001F78C 0001C6CC 7F A4 EB 78 */ mr r4, r29
/* 8001F790 0001C6D0 7F C5 F3 78 */ mr r5, r30
/* 8001F794 0001C6D4 38 C0 00 00 */ li r6, 0
/* 8001F798 0001C6D8 7F E7 FB 78 */ mr r7, r31
/* 8001F79C 0001C6DC 48 00 45 F9 */ bl fpcSCtRq_Request
/* 8001F7A0 0001C6E0 39 61 00 20 */ addi r11, r1, 0x20
/* 8001F7A4 0001C6E4 48 34 2A 85 */ bl _restgpr_29
/* 8001F7A8 0001C6E8 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8001F7AC 0001C6EC 7C 08 03 A6 */ mtlr r0
/* 8001F7B0 0001C6F0 38 21 00 20 */ addi r1, r1, 0x20
/* 8001F7B4 0001C6F4 4E 80 00 20 */ blr

26
include/f/f_op/f_op_kankyo_mng/asm/func_8001F7B8.s
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@ -1,26 +0,0 @@
/* 8001F7B8 0001C6F8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001F7BC 0001C6FC 7C 08 02 A6 */ mflr r0
/* 8001F7C0 0001C700 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001F7C4 0001C704 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001F7C8 0001C708 93 C1 00 08 */ stw r30, 8(r1)
/* 8001F7CC 0001C70C 7C 7E 1B 78 */ mr r30, r3
/* 8001F7D0 0001C710 7C FF 3B 78 */ mr r31, r7
/* 8001F7D4 0001C714 7C 83 23 78 */ mr r3, r4
/* 8001F7D8 0001C718 7C A4 2B 78 */ mr r4, r5
/* 8001F7DC 0001C71C 7C C5 33 78 */ mr r5, r6
/* 8001F7E0 0001C720 4B FF FE D9 */ bl createAppend__FiP4cXyzP4cXyz
/* 8001F7E4 0001C724 7C 65 1B 79 */ or. r5, r3, r3
/* 8001F7E8 0001C728 40 82 00 0C */ bne lbl_8001F7F4
/* 8001F7EC 0001C72C 38 60 FF FF */ li r3, -1
/* 8001F7F0 0001C730 48 00 00 10 */ b lbl_8001F800
lbl_8001F7F4:
/* 8001F7F4 0001C734 7F C3 F3 78 */ mr r3, r30
/* 8001F7F8 0001C738 7F E4 FB 78 */ mr r4, r31
/* 8001F7FC 0001C73C 4B FF FF 6D */ bl fopKyM_Create__FsPFPv_iPv
lbl_8001F800:
/* 8001F800 0001C740 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001F804 0001C744 83 C1 00 08 */ lwz r30, 8(r1)
/* 8001F808 0001C748 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001F80C 0001C74C 7C 08 03 A6 */ mtlr r0
/* 8001F810 0001C750 38 21 00 10 */ addi r1, r1, 0x10
/* 8001F814 0001C754 4E 80 00 20 */ blr

27
include/f/f_op/f_op_kankyo_mng/asm/func_8001F818.s
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@ -1,27 +0,0 @@
/* 8001F818 0001C758 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001F81C 0001C75C 7C 08 02 A6 */ mflr r0
/* 8001F820 0001C760 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001F824 0001C764 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001F828 0001C768 93 C1 00 08 */ stw r30, 8(r1)
/* 8001F82C 0001C76C 7C 7E 1B 78 */ mr r30, r3
/* 8001F830 0001C770 7C FF 3B 78 */ mr r31, r7
/* 8001F834 0001C774 7C 83 23 78 */ mr r3, r4
/* 8001F838 0001C778 7C A4 2B 78 */ mr r4, r5
/* 8001F83C 0001C77C 7C C5 33 78 */ mr r5, r6
/* 8001F840 0001C780 4B FF FE 79 */ bl createAppend__FiP4cXyzP4cXyz
/* 8001F844 0001C784 7C 66 1B 79 */ or. r6, r3, r3
/* 8001F848 0001C788 40 82 00 0C */ bne lbl_8001F854
/* 8001F84C 0001C78C 38 60 00 00 */ li r3, 0
/* 8001F850 0001C790 48 00 00 14 */ b lbl_8001F864
lbl_8001F854:
/* 8001F854 0001C794 7F C3 F3 78 */ mr r3, r30
/* 8001F858 0001C798 7F E4 FB 78 */ mr r4, r31
/* 8001F85C 0001C79C 38 A0 00 00 */ li r5, 0
/* 8001F860 0001C7A0 48 00 2A 95 */ bl fpcM_FastCreate
lbl_8001F864:
/* 8001F864 0001C7A4 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001F868 0001C7A8 83 C1 00 08 */ lwz r30, 8(r1)
/* 8001F86C 0001C7AC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001F870 0001C7B0 7C 08 03 A6 */ mtlr r0
/* 8001F874 0001C7B4 38 21 00 10 */ addi r1, r1, 0x10
/* 8001F878 0001C7B8 4E 80 00 20 */ blr

10
include/f/f_op/f_op_overlap/asm/func_8001E37C.s
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@ -1,10 +0,0 @@
/* 8001E37C 0001B2BC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E380 0001B2C0 7C 08 02 A6 */ mflr r0
/* 8001E384 0001B2C4 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E388 0001B2C8 7C 64 1B 78 */ mr r4, r3
/* 8001E38C 0001B2CC 80 63 00 C0 */ lwz r3, 0xc0(r3)
/* 8001E390 0001B2D0 48 00 36 95 */ bl fpcLf_DrawMethod
/* 8001E394 0001B2D4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E398 0001B2D8 7C 08 03 A6 */ mtlr r0
/* 8001E39C 0001B2DC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E3A0 0001B2E0 4E 80 00 20 */ blr

10
include/f/f_op/f_op_overlap/asm/func_8001E3A4.s
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@ -1,10 +0,0 @@
/* 8001E3A4 0001B2E4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E3A8 0001B2E8 7C 08 02 A6 */ mflr r0
/* 8001E3AC 0001B2EC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E3B0 0001B2F0 7C 64 1B 78 */ mr r4, r3
/* 8001E3B4 0001B2F4 80 63 00 C0 */ lwz r3, 0xc0(r3)
/* 8001E3B8 0001B2F8 48 00 40 A9 */ bl fpcMtd_Execute
/* 8001E3BC 0001B2FC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E3C0 0001B300 7C 08 03 A6 */ mtlr r0
/* 8001E3C4 0001B304 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E3C8 0001B308 4E 80 00 20 */ blr

10
include/f/f_op/f_op_overlap/asm/func_8001E3CC.s
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@ -1,10 +0,0 @@
/* 8001E3CC 0001B30C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E3D0 0001B310 7C 08 02 A6 */ mflr r0
/* 8001E3D4 0001B314 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E3D8 0001B318 7C 64 1B 78 */ mr r4, r3
/* 8001E3DC 0001B31C 80 63 00 C0 */ lwz r3, 0xc0(r3)
/* 8001E3E0 0001B320 48 00 40 A5 */ bl fpcMtd_IsDelete
/* 8001E3E4 0001B324 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E3E8 0001B328 7C 08 03 A6 */ mtlr r0
/* 8001E3EC 0001B32C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E3F0 0001B330 4E 80 00 20 */ blr

10
include/f/f_op/f_op_overlap/asm/func_8001E3F4.s
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@ -1,10 +0,0 @@
/* 8001E3F4 0001B334 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E3F8 0001B338 7C 08 02 A6 */ mflr r0
/* 8001E3FC 0001B33C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E400 0001B340 7C 64 1B 78 */ mr r4, r3
/* 8001E404 0001B344 80 63 00 C0 */ lwz r3, 0xc0(r3)
/* 8001E408 0001B348 48 00 40 A1 */ bl fpcMtd_Delete
/* 8001E40C 0001B34C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E410 0001B350 7C 08 03 A6 */ mtlr r0
/* 8001E414 0001B354 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E418 0001B358 4E 80 00 20 */ blr

25
include/f/f_op/f_op_overlap_req/asm/func_8001E6EC.s
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@ -1,25 +0,0 @@
/* 8001E6EC 0001B62C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E6F0 0001B630 7C 08 02 A6 */ mflr r0
/* 8001E6F4 0001B634 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E6F8 0001B638 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001E6FC 0001B63C 7C 7F 1B 78 */ mr r31, r3
/* 8001E700 0001B640 80 63 00 20 */ lwz r3, 0x20(r3)
/* 8001E704 0001B644 48 00 3A 15 */ bl fpcM_Delete
/* 8001E708 0001B648 2C 03 00 01 */ cmpwi r3, 1
/* 8001E70C 0001B64C 40 82 00 24 */ bne lbl_8001E730
/* 8001E710 0001B650 38 00 00 00 */ li r0, 0
/* 8001E714 0001B654 90 1F 00 20 */ stw r0, 0x20(r31)
/* 8001E718 0001B658 B0 1F 00 04 */ sth r0, 4(r31)
/* 8001E71C 0001B65C B0 1F 00 06 */ sth r0, 6(r31)
/* 8001E720 0001B660 90 1F 00 08 */ stw r0, 8(r31)
/* 8001E724 0001B664 90 1F 00 0C */ stw r0, 0xc(r31)
/* 8001E728 0001B668 38 60 00 02 */ li r3, 2
/* 8001E72C 0001B66C 48 00 00 08 */ b lbl_8001E734
lbl_8001E730:
/* 8001E730 0001B670 38 60 00 00 */ li r3, 0
lbl_8001E734:
/* 8001E734 0001B674 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001E738 0001B678 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E73C 0001B67C 7C 08 03 A6 */ mtlr r0
/* 8001E740 0001B680 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E744 0001B684 4E 80 00 20 */ blr

19
include/f/f_op/f_op_overlap_req/asm/func_8001E748.s
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@ -1,19 +0,0 @@
/* 8001E748 0001B688 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E74C 0001B68C 7C 08 02 A6 */ mflr r0
/* 8001E750 0001B690 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E754 0001B694 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001E758 0001B698 7C 7F 1B 78 */ mr r31, r3
/* 8001E75C 0001B69C 48 24 80 A5 */ bl cReq_Done__FP18request_base_class
/* 8001E760 0001B6A0 A8 7F 00 02 */ lha r3, 2(r31)
/* 8001E764 0001B6A4 38 03 FF FF */ addi r0, r3, -1
/* 8001E768 0001B6A8 B0 1F 00 02 */ sth r0, 2(r31)
/* 8001E76C 0001B6AC 7C 03 00 D0 */ neg r0, r3
/* 8001E770 0001B6B0 7C 60 03 38 */ orc r0, r3, r0
/* 8001E774 0001B6B4 7C 03 FE 70 */ srawi r3, r0, 0x1f
/* 8001E778 0001B6B8 38 00 00 02 */ li r0, 2
/* 8001E77C 0001B6BC 7C 03 18 38 */ and r3, r0, r3
/* 8001E780 0001B6C0 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001E784 0001B6C4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E788 0001B6C8 7C 08 03 A6 */ mtlr r0
/* 8001E78C 0001B6CC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E790 0001B6D0 4E 80 00 20 */ blr

22
include/f/f_op/f_op_overlap_req/asm/func_8001E794.s
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@ -1,22 +0,0 @@
/* 8001E794 0001B6D4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E798 0001B6D8 7C 08 02 A6 */ mflr r0
/* 8001E79C 0001B6DC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E7A0 0001B6E0 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001E7A4 0001B6E4 7C 7F 1B 78 */ mr r31, r3
/* 8001E7A8 0001B6E8 80 63 00 20 */ lwz r3, 0x20(r3)
/* 8001E7AC 0001B6EC 38 63 00 C4 */ addi r3, r3, 0xc4
/* 8001E7B0 0001B6F0 48 24 80 25 */ bl cReq_Is_Done__FP18request_base_class
/* 8001E7B4 0001B6F4 2C 03 00 00 */ cmpwi r3, 0
/* 8001E7B8 0001B6F8 41 82 00 14 */ beq lbl_8001E7CC
/* 8001E7BC 0001B6FC 38 00 00 00 */ li r0, 0
/* 8001E7C0 0001B700 90 1F 00 08 */ stw r0, 8(r31)
/* 8001E7C4 0001B704 38 60 00 02 */ li r3, 2
/* 8001E7C8 0001B708 48 00 00 08 */ b lbl_8001E7D0
lbl_8001E7CC:
/* 8001E7CC 0001B70C 38 60 00 00 */ li r3, 0
lbl_8001E7D0:
/* 8001E7D0 0001B710 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001E7D4 0001B714 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E7D8 0001B718 7C 08 03 A6 */ mtlr r0
/* 8001E7DC 0001B71C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E7E0 0001B720 4E 80 00 20 */ blr

31
include/f/f_op/f_op_overlap_req/asm/func_8001E7E4.s
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@ -1,31 +0,0 @@
/* 8001E7E4 0001B724 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E7E8 0001B728 7C 08 02 A6 */ mflr r0
/* 8001E7EC 0001B72C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E7F0 0001B730 A0 83 00 06 */ lhz r4, 6(r3)
/* 8001E7F4 0001B734 28 04 00 00 */ cmplwi r4, 0
/* 8001E7F8 0001B738 41 82 00 0C */ beq lbl_8001E804
/* 8001E7FC 0001B73C 38 04 FF FF */ addi r0, r4, -1
/* 8001E800 0001B740 B0 03 00 06 */ sth r0, 6(r3)
lbl_8001E804:
/* 8001E804 0001B744 88 03 00 00 */ lbz r0, 0(r3)
/* 8001E808 0001B748 54 00 06 BE */ clrlwi r0, r0, 0x1a
/* 8001E80C 0001B74C 28 00 00 02 */ cmplwi r0, 2
/* 8001E810 0001B750 40 82 00 28 */ bne lbl_8001E838
/* 8001E814 0001B754 A0 03 00 06 */ lhz r0, 6(r3)
/* 8001E818 0001B758 28 00 00 00 */ cmplwi r0, 0
/* 8001E81C 0001B75C 40 82 00 1C */ bne lbl_8001E838
/* 8001E820 0001B760 80 63 00 20 */ lwz r3, 0x20(r3)
/* 8001E824 0001B764 38 63 00 C4 */ addi r3, r3, 0xc4
/* 8001E828 0001B768 38 80 00 02 */ li r4, 2
/* 8001E82C 0001B76C 48 24 80 05 */ bl cReq_Command__FP18request_base_classUc
/* 8001E830 0001B770 38 60 00 02 */ li r3, 2
/* 8001E834 0001B774 48 00 00 10 */ b lbl_8001E844
lbl_8001E838:
/* 8001E838 0001B778 38 00 00 01 */ li r0, 1
/* 8001E83C 0001B77C 90 03 00 08 */ stw r0, 8(r3)
/* 8001E840 0001B780 38 60 00 00 */ li r3, 0
lbl_8001E844:
/* 8001E844 0001B784 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E848 0001B788 7C 08 03 A6 */ mtlr r0
/* 8001E84C 0001B78C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E850 0001B790 4E 80 00 20 */ blr

22
include/f/f_op/f_op_overlap_req/asm/func_8001E854.s
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@ -1,22 +0,0 @@
/* 8001E854 0001B794 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E858 0001B798 7C 08 02 A6 */ mflr r0
/* 8001E85C 0001B79C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E860 0001B7A0 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001E864 0001B7A4 7C 7F 1B 78 */ mr r31, r3
/* 8001E868 0001B7A8 80 63 00 20 */ lwz r3, 0x20(r3)
/* 8001E86C 0001B7AC 38 63 00 C4 */ addi r3, r3, 0xc4
/* 8001E870 0001B7B0 48 24 7F 65 */ bl cReq_Is_Done__FP18request_base_class
/* 8001E874 0001B7B4 2C 03 00 00 */ cmpwi r3, 0
/* 8001E878 0001B7B8 41 82 00 14 */ beq lbl_8001E88C
/* 8001E87C 0001B7BC 7F E3 FB 78 */ mr r3, r31
/* 8001E880 0001B7C0 48 24 7F 81 */ bl cReq_Done__FP18request_base_class
/* 8001E884 0001B7C4 38 60 00 02 */ li r3, 2
/* 8001E888 0001B7C8 48 00 00 08 */ b lbl_8001E890
lbl_8001E88C:
/* 8001E88C 0001B7CC 38 60 00 00 */ li r3, 0
lbl_8001E890:
/* 8001E890 0001B7D0 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001E894 0001B7D4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E898 0001B7D8 7C 08 03 A6 */ mtlr r0
/* 8001E89C 0001B7DC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E8A0 0001B7E0 4E 80 00 20 */ blr

27
include/f/f_op/f_op_overlap_req/asm/func_8001E8A4.s
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@ -1,27 +0,0 @@
/* 8001E8A4 0001B7E4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E8A8 0001B7E8 7C 08 02 A6 */ mflr r0
/* 8001E8AC 0001B7EC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E8B0 0001B7F0 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001E8B4 0001B7F4 7C 7F 1B 78 */ mr r31, r3
/* 8001E8B8 0001B7F8 80 63 00 14 */ lwz r3, 0x14(r3)
/* 8001E8BC 0001B7FC 48 00 38 7D */ bl fpcM_IsCreating
/* 8001E8C0 0001B800 2C 03 00 00 */ cmpwi r3, 0
/* 8001E8C4 0001B804 40 82 00 28 */ bne lbl_8001E8EC
/* 8001E8C8 0001B808 80 7F 00 14 */ lwz r3, 0x14(r31)
/* 8001E8CC 0001B80C 48 00 2A 8D */ bl fpcEx_SearchByID
/* 8001E8D0 0001B810 28 03 00 00 */ cmplwi r3, 0
/* 8001E8D4 0001B814 40 82 00 0C */ bne lbl_8001E8E0
/* 8001E8D8 0001B818 38 60 00 05 */ li r3, 5
/* 8001E8DC 0001B81C 48 00 00 14 */ b lbl_8001E8F0
lbl_8001E8E0:
/* 8001E8E0 0001B820 90 7F 00 20 */ stw r3, 0x20(r31)
/* 8001E8E4 0001B824 38 60 00 02 */ li r3, 2
/* 8001E8E8 0001B828 48 00 00 08 */ b lbl_8001E8F0
lbl_8001E8EC:
/* 8001E8EC 0001B82C 38 60 00 00 */ li r3, 0
lbl_8001E8F0:
/* 8001E8F0 0001B830 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001E8F4 0001B834 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E8F8 0001B838 7C 08 03 A6 */ mtlr r0
/* 8001E8FC 0001B83C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E900 0001B840 4E 80 00 20 */ blr

20
include/f/f_op/f_op_overlap_req/asm/func_8001E904.s
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@ -1,20 +0,0 @@
/* 8001E904 0001B844 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E908 0001B848 7C 08 02 A6 */ mflr r0
/* 8001E90C 0001B84C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E910 0001B850 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001E914 0001B854 7C 7F 1B 78 */ mr r31, r3
/* 8001E918 0001B858 80 63 00 24 */ lwz r3, 0x24(r3)
/* 8001E91C 0001B85C 48 00 2D D1 */ bl fpcLy_SetCurrentLayer
/* 8001E920 0001B860 48 00 2D D5 */ bl fpcLy_CurrentLayer
/* 8001E924 0001B864 A8 9F 00 10 */ lha r4, 0x10(r31)
/* 8001E928 0001B868 38 A0 00 00 */ li r5, 0
/* 8001E92C 0001B86C 38 C0 00 00 */ li r6, 0
/* 8001E930 0001B870 38 E0 00 00 */ li r7, 0
/* 8001E934 0001B874 48 00 54 61 */ bl fpcSCtRq_Request
/* 8001E938 0001B878 90 7F 00 14 */ stw r3, 0x14(r31)
/* 8001E93C 0001B87C 38 60 00 02 */ li r3, 2
/* 8001E940 0001B880 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001E944 0001B884 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E948 0001B888 7C 08 03 A6 */ mtlr r0
/* 8001E94C 0001B88C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E950 0001B890 4E 80 00 20 */ blr

41
include/f/f_op/f_op_overlap_req/asm/func_8001E954.s
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@ -1,41 +0,0 @@
/* 8001E954 0001B894 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8001E958 0001B898 7C 08 02 A6 */ mflr r0
/* 8001E95C 0001B89C 90 01 00 24 */ stw r0, 0x24(r1)
/* 8001E960 0001B8A0 39 61 00 20 */ addi r11, r1, 0x20
/* 8001E964 0001B8A4 48 34 38 79 */ bl _savegpr_29
/* 8001E968 0001B8A8 7C 7D 1B 78 */ mr r29, r3
/* 8001E96C 0001B8AC 7C 9E 23 78 */ mr r30, r4
/* 8001E970 0001B8B0 7C BF 2B 78 */ mr r31, r5
/* 8001E974 0001B8B4 A0 03 00 04 */ lhz r0, 4(r3)
/* 8001E978 0001B8B8 28 00 00 01 */ cmplwi r0, 1
/* 8001E97C 0001B8BC 40 82 00 0C */ bne lbl_8001E988
/* 8001E980 0001B8C0 38 60 00 00 */ li r3, 0
/* 8001E984 0001B8C4 48 00 00 54 */ b lbl_8001E9D8
lbl_8001E988:
/* 8001E988 0001B8C8 38 80 00 01 */ li r4, 1
/* 8001E98C 0001B8CC 48 24 7E A5 */ bl cReq_Command__FP18request_base_classUc
/* 8001E990 0001B8D0 B3 DD 00 10 */ sth r30, 0x10(r29)
/* 8001E994 0001B8D4 38 7D 00 18 */ addi r3, r29, 0x18
/* 8001E998 0001B8D8 3C 80 80 3A */ lis r4, phaseMethod@ha
/* 8001E99C 0001B8DC 38 84 38 90 */ addi r4, r4, phaseMethod@l
/* 8001E9A0 0001B8E0 48 24 7C 91 */ bl cPhs_Set
/* 8001E9A4 0001B8E4 7F A3 EB 78 */ mr r3, r29
/* 8001E9A8 0001B8E8 7F E4 FB 78 */ mr r4, r31
/* 8001E9AC 0001B8EC 48 00 01 19 */ bl fopOvlpReq_SetPeektime__FP21overlap_request_classUs
/* 8001E9B0 0001B8F0 38 00 00 01 */ li r0, 1
/* 8001E9B4 0001B8F4 B0 1D 00 04 */ sth r0, 4(r29)
/* 8001E9B8 0001B8F8 B0 1D 00 02 */ sth r0, 2(r29)
/* 8001E9BC 0001B8FC 38 00 00 00 */ li r0, 0
/* 8001E9C0 0001B900 90 1D 00 20 */ stw r0, 0x20(r29)
/* 8001E9C4 0001B904 90 1D 00 08 */ stw r0, 8(r29)
/* 8001E9C8 0001B908 90 1D 00 0C */ stw r0, 0xc(r29)
/* 8001E9CC 0001B90C 48 00 2D 11 */ bl fpcLy_RootLayer
/* 8001E9D0 0001B910 90 7D 00 24 */ stw r3, 0x24(r29)
/* 8001E9D4 0001B914 7F A3 EB 78 */ mr r3, r29
lbl_8001E9D8:
/* 8001E9D8 0001B918 39 61 00 20 */ addi r11, r1, 0x20
/* 8001E9DC 0001B91C 48 34 38 4D */ bl _restgpr_29
/* 8001E9E0 0001B920 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8001E9E4 0001B924 7C 08 03 A6 */ mtlr r0
/* 8001E9E8 0001B928 38 21 00 20 */ addi r1, r1, 0x20
/* 8001E9EC 0001B92C 4E 80 00 20 */ blr

46
include/f/f_op/f_op_overlap_req/asm/func_8001E9F0.s
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@ -1,46 +0,0 @@
/* 8001E9F0 0001B930 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E9F4 0001B934 7C 08 02 A6 */ mflr r0
/* 8001E9F8 0001B938 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E9FC 0001B93C 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001EA00 0001B940 7C 7F 1B 78 */ mr r31, r3
/* 8001EA04 0001B944 38 7F 00 18 */ addi r3, r31, 0x18
/* 8001EA08 0001B948 7F E4 FB 78 */ mr r4, r31
/* 8001EA0C 0001B94C 48 24 7C CD */ bl cPhs_Do
/* 8001EA10 0001B950 2C 03 00 03 */ cmpwi r3, 3
/* 8001EA14 0001B954 41 82 00 54 */ beq lbl_8001EA68
/* 8001EA18 0001B958 40 80 00 1C */ bge lbl_8001EA34
/* 8001EA1C 0001B95C 2C 03 00 01 */ cmpwi r3, 1
/* 8001EA20 0001B960 41 82 00 38 */ beq lbl_8001EA58
/* 8001EA24 0001B964 40 80 00 20 */ bge lbl_8001EA44
/* 8001EA28 0001B968 2C 03 00 00 */ cmpwi r3, 0
/* 8001EA2C 0001B96C 40 80 00 24 */ bge lbl_8001EA50
/* 8001EA30 0001B970 48 00 00 40 */ b lbl_8001EA70
lbl_8001EA34:
/* 8001EA34 0001B974 2C 03 00 05 */ cmpwi r3, 5
/* 8001EA38 0001B978 41 82 00 30 */ beq lbl_8001EA68
/* 8001EA3C 0001B97C 40 80 00 34 */ bge lbl_8001EA70
/* 8001EA40 0001B980 48 00 00 20 */ b lbl_8001EA60
lbl_8001EA44:
/* 8001EA44 0001B984 7F E3 FB 78 */ mr r3, r31
/* 8001EA48 0001B988 4B FF FF A9 */ bl fopOvlpReq_Handler__FP21overlap_request_class
/* 8001EA4C 0001B98C 48 00 00 28 */ b lbl_8001EA74
lbl_8001EA50:
/* 8001EA50 0001B990 38 60 00 00 */ li r3, 0
/* 8001EA54 0001B994 48 00 00 20 */ b lbl_8001EA74
lbl_8001EA58:
/* 8001EA58 0001B998 38 60 00 00 */ li r3, 0
/* 8001EA5C 0001B99C 48 00 00 18 */ b lbl_8001EA74
lbl_8001EA60:
/* 8001EA60 0001B9A0 38 60 00 04 */ li r3, 4
/* 8001EA64 0001B9A4 48 00 00 10 */ b lbl_8001EA74
lbl_8001EA68:
/* 8001EA68 0001B9A8 38 60 00 05 */ li r3, 5
/* 8001EA6C 0001B9AC 48 00 00 08 */ b lbl_8001EA74
lbl_8001EA70:
/* 8001EA70 0001B9B0 38 60 00 05 */ li r3, 5
lbl_8001EA74:
/* 8001EA74 0001B9B4 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001EA78 0001B9B8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EA7C 0001B9BC 7C 08 03 A6 */ mtlr r0
/* 8001EA80 0001B9C0 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EA84 0001B9C4 4E 80 00 20 */ blr

11
include/f/f_op/f_op_overlap_req/asm/func_8001EA88.s
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@ -1,11 +0,0 @@
/* 8001EA88 0001B9C8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EA8C 0001B9CC 7C 08 02 A6 */ mflr r0
/* 8001EA90 0001B9D0 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EA94 0001B9D4 4B FF FC 59 */ bl fopOvlpReq_phase_Done__FP21overlap_request_class
/* 8001EA98 0001B9D8 20 03 00 02 */ subfic r0, r3, 2
/* 8001EA9C 0001B9DC 7C 00 00 34 */ cntlzw r0, r0
/* 8001EAA0 0001B9E0 54 03 D9 7E */ srwi r3, r0, 5
/* 8001EAA4 0001B9E4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EAA8 0001B9E8 7C 08 03 A6 */ mtlr r0
/* 8001EAAC 0001B9EC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EAB0 0001B9F0 4E 80 00 20 */ blr

4
include/f/f_op/f_op_overlap_req/asm/func_8001EAB4.s
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@ -1,4 +0,0 @@
/* 8001EAB4 0001B9F4 A0 03 00 06 */ lhz r0, 6(r3)
/* 8001EAB8 0001B9F8 7C 00 00 34 */ cntlzw r0, r0
/* 8001EABC 0001B9FC 54 03 D9 7E */ srwi r3, r0, 5
/* 8001EAC0 0001BA00 4E 80 00 20 */ blr

5
include/f/f_op/f_op_overlap_req/asm/func_8001EAC4.s
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@ -1,5 +0,0 @@
/* 8001EAC4 0001BA04 54 80 04 3E */ clrlwi r0, r4, 0x10
/* 8001EAC8 0001BA08 28 00 7F FF */ cmplwi r0, 0x7fff
/* 8001EACC 0001BA0C 4D 81 00 20 */ bgtlr
/* 8001EAD0 0001BA10 B0 83 00 06 */ sth r4, 6(r3)
/* 8001EAD4 0001BA14 4E 80 00 20 */ blr

26
include/f/f_op/f_op_overlap_req/asm/func_8001EAD8.s
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@ -1,26 +0,0 @@
/* 8001EAD8 0001BA18 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EADC 0001BA1C 7C 08 02 A6 */ mflr r0
/* 8001EAE0 0001BA20 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EAE4 0001BA24 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001EAE8 0001BA28 7C 7F 1B 78 */ mr r31, r3
/* 8001EAEC 0001BA2C 88 03 00 00 */ lbz r0, 0(r3)
/* 8001EAF0 0001BA30 54 00 CF FE */ rlwinm r0, r0, 0x19, 0x1f, 0x1f
/* 8001EAF4 0001BA34 28 00 00 01 */ cmplwi r0, 1
/* 8001EAF8 0001BA38 41 82 00 10 */ beq lbl_8001EB08
/* 8001EAFC 0001BA3C 4B FF FF B9 */ bl fopOvlpReq_Is_PeektimeLimit__FP21overlap_request_class
/* 8001EB00 0001BA40 2C 03 00 00 */ cmpwi r3, 0
/* 8001EB04 0001BA44 40 82 00 0C */ bne lbl_8001EB10
lbl_8001EB08:
/* 8001EB08 0001BA48 38 60 00 00 */ li r3, 0
/* 8001EB0C 0001BA4C 48 00 00 14 */ b lbl_8001EB20
lbl_8001EB10:
/* 8001EB10 0001BA50 7F E3 FB 78 */ mr r3, r31
/* 8001EB14 0001BA54 38 80 00 02 */ li r4, 2
/* 8001EB18 0001BA58 48 24 7D 39 */ bl cReq_Create__FP18request_base_classUc
/* 8001EB1C 0001BA5C 38 60 00 01 */ li r3, 1
lbl_8001EB20:
/* 8001EB20 0001BA60 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001EB24 0001BA64 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EB28 0001BA68 7C 08 03 A6 */ mtlr r0
/* 8001EB2C 0001BA6C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EB30 0001BA70 4E 80 00 20 */ blr

17
include/f/f_op/f_op_scene_iter/asm/func_8001EC74.s
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@ -1,17 +0,0 @@
/* 8001EC74 0001BBB4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EC78 0001BBB8 7C 08 02 A6 */ mflr r0
/* 8001EC7C 0001BBBC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EC80 0001BBC0 90 61 00 08 */ stw r3, 8(r1)
/* 8001EC84 0001BBC4 90 81 00 0C */ stw r4, 0xc(r1)
/* 8001EC88 0001BBC8 3C 60 80 3A */ lis r3, lbl_803A3918@ha
/* 8001EC8C 0001BBCC 38 63 39 18 */ addi r3, r3, lbl_803A3918@l
/*.global cTgIt_JudgeFilter*/
/* 8001EC90 0001BBD0 3C 80 80 26 */ lis r4, cTgIt_JudgeFilter@ha
/*.global cTgIt_JudgeFilter*/
/* 8001EC94 0001BBD4 38 84 6A B0 */ addi r4, r4, cTgIt_JudgeFilter@l
/* 8001EC98 0001BBD8 38 A1 00 08 */ addi r5, r1, 8
/* 8001EC9C 0001BBDC 48 24 73 FD */ bl cLsIt_Judge
/* 8001ECA0 0001BBE0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001ECA4 0001BBE4 7C 08 03 A6 */ mtlr r0
/* 8001ECA8 0001BBE8 38 21 00 10 */ addi r1, r1, 0x10
/* 8001ECAC 0001BBEC 4E 80 00 20 */ blr

2
include/f/f_op/f_op_scene_mng.h
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@ -6,7 +6,7 @@
void* fopScnM_SearchByID(unsigned int id);
int fopScnM_ChangeReq(scene_class*, s16, s16, u16);
unsigned int fopScnM_DeleteReq(scene_class*);
void fopScnM_CreateReq(s16, s16, u16, u32);
int fopScnM_CreateReq(s16, s16, u16, u32);
u32 fopScnM_ReRequest(s16, u32);
void fopScnM_Management(void);
void fopScnM_Init(void);

21
include/f/f_op/f_op_scene_pause/asm/func_80020548.s
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@ -1,21 +0,0 @@
/* 80020548 0001D488 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8002054C 0001D48C 7C 08 02 A6 */ mflr r0
/* 80020550 0001D490 90 01 00 14 */ stw r0, 0x14(r1)
/* 80020554 0001D494 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80020558 0001D498 7C 7F 1B 79 */ or. r31, r3, r3
/* 8002055C 0001D49C 41 82 00 20 */ beq lbl_8002057C
/* 80020560 0001D4A0 38 80 00 01 */ li r4, 1
/* 80020564 0001D4A4 48 00 1E 09 */ bl fpcM_PauseEnable
/* 80020568 0001D4A8 7F E3 FB 78 */ mr r3, r31
/* 8002056C 0001D4AC 38 80 00 02 */ li r4, 2
/* 80020570 0001D4B0 48 00 1D FD */ bl fpcM_PauseEnable
/* 80020574 0001D4B4 38 60 00 01 */ li r3, 1
/* 80020578 0001D4B8 48 00 00 08 */ b lbl_80020580
lbl_8002057C:
/* 8002057C 0001D4BC 38 60 00 00 */ li r3, 0
lbl_80020580:
/* 80020580 0001D4C0 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80020584 0001D4C4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80020588 0001D4C8 7C 08 03 A6 */ mtlr r0
/* 8002058C 0001D4CC 38 21 00 10 */ addi r1, r1, 0x10
/* 80020590 0001D4D0 4E 80 00 20 */ blr

51
include/f/f_op/f_op_scene_pause/asm/func_80020594.s
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@ -1,51 +0,0 @@
/* 80020594 0001D4D4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80020598 0001D4D8 7C 08 02 A6 */ mflr r0
/* 8002059C 0001D4DC 90 01 00 14 */ stw r0, 0x14(r1)
/* 800205A0 0001D4E0 93 E1 00 0C */ stw r31, 0xc(r1)
/* 800205A4 0001D4E4 93 C1 00 08 */ stw r30, 8(r1)
/* 800205A8 0001D4E8 7C 7E 1B 79 */ or. r30, r3, r3
/* 800205AC 0001D4EC 41 82 00 84 */ beq lbl_80020630
/* 800205B0 0001D4F0 80 9E 00 2C */ lwz r4, 0x2c(r30)
/* 800205B4 0001D4F4 83 E4 00 18 */ lwz r31, 0x18(r4)
/* 800205B8 0001D4F8 28 1F 00 00 */ cmplwi r31, 0
/* 800205BC 0001D4FC 40 82 00 1C */ bne lbl_800205D8
/* 800205C0 0001D500 38 80 00 01 */ li r4, 1
/* 800205C4 0001D504 48 00 1D CD */ bl fpcM_PauseDisable
/* 800205C8 0001D508 7F C3 F3 78 */ mr r3, r30
/* 800205CC 0001D50C 38 80 00 02 */ li r4, 2
/* 800205D0 0001D510 48 00 1D C1 */ bl fpcM_PauseDisable
/* 800205D4 0001D514 48 00 00 54 */ b lbl_80020628
lbl_800205D8:
/* 800205D8 0001D518 80 7F 00 04 */ lwz r3, 4(r31)
/* 800205DC 0001D51C 48 00 0D C1 */ bl fpcEx_IsExist
/* 800205E0 0001D520 2C 03 00 01 */ cmpwi r3, 1
/* 800205E4 0001D524 40 82 00 44 */ bne lbl_80020628
/* 800205E8 0001D528 7F E3 FB 78 */ mr r3, r31
/* 800205EC 0001D52C 38 80 00 01 */ li r4, 1
/* 800205F0 0001D530 48 00 1D 59 */ bl fpcM_IsPause
/* 800205F4 0001D534 2C 03 00 00 */ cmpwi r3, 0
/* 800205F8 0001D538 40 82 00 10 */ bne lbl_80020608
/* 800205FC 0001D53C 7F C3 F3 78 */ mr r3, r30
/* 80020600 0001D540 38 80 00 01 */ li r4, 1
/* 80020604 0001D544 48 00 1D 8D */ bl fpcM_PauseDisable
lbl_80020608:
/* 80020608 0001D548 7F E3 FB 78 */ mr r3, r31
/* 8002060C 0001D54C 38 80 00 02 */ li r4, 2
/* 80020610 0001D550 48 00 1D 39 */ bl fpcM_IsPause
/* 80020614 0001D554 2C 03 00 00 */ cmpwi r3, 0
/* 80020618 0001D558 40 82 00 10 */ bne lbl_80020628
/* 8002061C 0001D55C 7F C3 F3 78 */ mr r3, r30
/* 80020620 0001D560 38 80 00 02 */ li r4, 2
/* 80020624 0001D564 48 00 1D 6D */ bl fpcM_PauseDisable
lbl_80020628:
/* 80020628 0001D568 38 60 00 01 */ li r3, 1
/* 8002062C 0001D56C 48 00 00 08 */ b lbl_80020634
lbl_80020630:
/* 80020630 0001D570 38 60 00 00 */ li r3, 0
lbl_80020634:
/* 80020634 0001D574 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80020638 0001D578 83 C1 00 08 */ lwz r30, 8(r1)
/* 8002063C 0001D57C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80020640 0001D580 7C 08 03 A6 */ mtlr r0
/* 80020644 0001D584 38 21 00 10 */ addi r1, r1, 0x10
/* 80020648 0001D588 4E 80 00 20 */ blr

13
include/f/f_op/f_op_scene_req/asm/func_8001EE34.s
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@ -1,13 +0,0 @@
/* 8001EE34 0001BD74 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EE38 0001BD78 7C 08 02 A6 */ mflr r0
/* 8001EE3C 0001BD7C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EE40 0001BD80 4B FF F7 91 */ bl fopOvlpM_ClearOfReq__Fv
/* 8001EE44 0001BD84 2C 03 00 01 */ cmpwi r3, 1
/* 8001EE48 0001BD88 38 60 00 00 */ li r3, 0
/* 8001EE4C 0001BD8C 40 82 00 08 */ bne lbl_8001EE54
/* 8001EE50 0001BD90 38 60 00 02 */ li r3, 2
lbl_8001EE54:
/* 8001EE54 0001BD94 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EE58 0001BD98 7C 08 03 A6 */ mtlr r0
/* 8001EE5C 0001BD9C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EE60 0001BDA0 4E 80 00 20 */ blr

8
include/f/f_op/f_op_scene_req/asm/func_8001EE64.s
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@ -1,8 +0,0 @@
/* 8001EE64 0001BDA4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EE68 0001BDA8 7C 08 02 A6 */ mflr r0
/* 8001EE6C 0001BDAC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EE70 0001BDB0 48 00 3B 69 */ bl fpcNdRq_Execute
/* 8001EE74 0001BDB4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EE78 0001BDB8 7C 08 03 A6 */ mtlr r0
/* 8001EE7C 0001BDBC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EE80 0001BDC0 4E 80 00 20 */ blr

13
include/f/f_op/f_op_scene_req/asm/func_8001EE84.s
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@ -1,13 +0,0 @@
/* 8001EE84 0001BDC4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EE88 0001BDC8 7C 08 02 A6 */ mflr r0
/* 8001EE8C 0001BDCC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EE90 0001BDD0 4B FF F7 19 */ bl fopOvlpM_IsDoingReq__Fv
/* 8001EE94 0001BDD4 2C 03 00 01 */ cmpwi r3, 1
/* 8001EE98 0001BDD8 38 60 00 00 */ li r3, 0
/* 8001EE9C 0001BDDC 40 82 00 08 */ bne lbl_8001EEA4
/* 8001EEA0 0001BDE0 38 60 00 02 */ li r3, 2
lbl_8001EEA4:
/* 8001EEA4 0001BDE4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EEA8 0001BDE8 7C 08 03 A6 */ mtlr r0
/* 8001EEAC 0001BDEC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EEB0 0001BDF0 4E 80 00 20 */ blr

13
include/f/f_op/f_op_scene_req/asm/func_8001EEB4.s
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@ -1,13 +0,0 @@
/* 8001EEB4 0001BDF4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EEB8 0001BDF8 7C 08 02 A6 */ mflr r0
/* 8001EEBC 0001BDFC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EEC0 0001BE00 4B FF F6 B5 */ bl fopOvlpM_IsDone__Fv
/* 8001EEC4 0001BE04 2C 03 00 01 */ cmpwi r3, 1
/* 8001EEC8 0001BE08 38 60 00 00 */ li r3, 0
/* 8001EECC 0001BE0C 40 82 00 08 */ bne lbl_8001EED4
/* 8001EED0 0001BE10 38 60 00 02 */ li r3, 2
lbl_8001EED4:
/* 8001EED4 0001BE14 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EED8 0001BE18 7C 08 03 A6 */ mtlr r0
/* 8001EEDC 0001BE1C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EEE0 0001BE20 4E 80 00 20 */ blr

17
include/f/f_op/f_op_scene_req/asm/func_8001EEE4.s
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@ -1,17 +0,0 @@
/* 8001EEE4 0001BE24 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EEE8 0001BE28 7C 08 02 A6 */ mflr r0
/* 8001EEEC 0001BE2C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EEF0 0001BE30 80 03 00 40 */ lwz r0, 0x40(r3)
/* 8001EEF4 0001BE34 2C 00 00 01 */ cmpwi r0, 1
/* 8001EEF8 0001BE38 41 82 00 10 */ beq lbl_8001EF08
/* 8001EEFC 0001BE3C 80 63 00 54 */ lwz r3, 0x54(r3)
/* 8001EF00 0001BE40 48 00 24 59 */ bl fpcEx_SearchByID
/* 8001EF04 0001BE44 48 00 16 91 */ bl fopScnPause_Disable__FP11scene_class
lbl_8001EF08:
/* 8001EF08 0001BE48 38 00 00 00 */ li r0, 0
/* 8001EF0C 0001BE4C 90 0D 87 60 */ stw r0, lbl_80450CE0-_SDA_BASE_(r13)
/* 8001EF10 0001BE50 38 60 00 02 */ li r3, 2
/* 8001EF14 0001BE54 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EF18 0001BE58 7C 08 03 A6 */ mtlr r0
/* 8001EF1C 0001BE5C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EF20 0001BE60 4E 80 00 20 */ blr

20
include/f/f_op/f_op_scene_req/asm/func_8001EF24.s
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@ -1,20 +0,0 @@
/* 8001EF24 0001BE64 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EF28 0001BE68 7C 08 02 A6 */ mflr r0
/* 8001EF2C 0001BE6C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EF30 0001BE70 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001EF34 0001BE74 7C 7F 1B 78 */ mr r31, r3
/* 8001EF38 0001BE78 38 7F 00 68 */ addi r3, r31, 0x68
/* 8001EF3C 0001BE7C 7F E4 FB 78 */ mr r4, r31
/* 8001EF40 0001BE80 48 24 77 99 */ bl cPhs_Do
/* 8001EF44 0001BE84 2C 03 00 02 */ cmpwi r3, 2
/* 8001EF48 0001BE88 41 82 00 08 */ beq lbl_8001EF50
/* 8001EF4C 0001BE8C 48 00 00 0C */ b lbl_8001EF58
lbl_8001EF50:
/* 8001EF50 0001BE90 7F E3 FB 78 */ mr r3, r31
/* 8001EF54 0001BE94 4B FF FF D1 */ bl fopScnRq_Execute
lbl_8001EF58:
/* 8001EF58 0001BE98 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001EF5C 0001BE9C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EF60 0001BEA0 7C 08 03 A6 */ mtlr r0
/* 8001EF64 0001BEA4 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EF68 0001BEA8 4E 80 00 20 */ blr

18
include/f/f_op/f_op_scene_req/asm/func_8001EF6C.s
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@ -1,18 +0,0 @@
/* 8001EF6C 0001BEAC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EF70 0001BEB0 7C 08 02 A6 */ mflr r0
/* 8001EF74 0001BEB4 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EF78 0001BEB8 93 E1 00 0C */ stw r31, 0xc(r1)
/* 8001EF7C 0001BEBC 7C 7F 1B 78 */ mr r31, r3
/* 8001EF80 0001BEC0 80 04 00 64 */ lwz r0, 0x64(r4)
/* 8001EF84 0001BEC4 28 00 00 00 */ cmplwi r0, 0
/* 8001EF88 0001BEC8 41 82 00 10 */ beq lbl_8001EF98
/* 8001EF8C 0001BECC 48 00 15 BD */ bl fopScnPause_Enable__FP11scene_class
/* 8001EF90 0001BED0 80 7F 00 04 */ lwz r3, 4(r31)
/* 8001EF94 0001BED4 4B FF F5 AD */ bl fopOvlpM_ToldAboutID__FUi
lbl_8001EF98:
/* 8001EF98 0001BED8 38 60 00 01 */ li r3, 1
/* 8001EF9C 0001BEDC 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8001EFA0 0001BEE0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EFA4 0001BEE4 7C 08 03 A6 */ mtlr r0
/* 8001EFA8 0001BEE8 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EFAC 0001BEEC 4E 80 00 20 */ blr

18
include/f/f_op/f_op_scene_req/asm/func_8001EFB0.s
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@ -1,18 +0,0 @@
/* 8001EFB0 0001BEF0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EFB4 0001BEF4 7C 08 02 A6 */ mflr r0
/* 8001EFB8 0001BEF8 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EFBC 0001BEFC 80 03 00 64 */ lwz r0, 0x64(r3)
/* 8001EFC0 0001BF00 28 00 00 00 */ cmplwi r0, 0
/* 8001EFC4 0001BF04 41 82 00 18 */ beq lbl_8001EFDC
/* 8001EFC8 0001BF08 4B FF F6 D1 */ bl fopOvlpM_Cancel__Fv
/* 8001EFCC 0001BF0C 2C 03 00 00 */ cmpwi r3, 0
/* 8001EFD0 0001BF10 40 82 00 0C */ bne lbl_8001EFDC
/* 8001EFD4 0001BF14 38 60 00 00 */ li r3, 0
/* 8001EFD8 0001BF18 48 00 00 08 */ b lbl_8001EFE0
lbl_8001EFDC:
/* 8001EFDC 0001BF1C 38 60 00 01 */ li r3, 1
lbl_8001EFE0:
/* 8001EFE0 0001BF20 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EFE4 0001BF24 7C 08 03 A6 */ mtlr r0
/* 8001EFE8 0001BF28 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EFEC 0001BF2C 4E 80 00 20 */ blr

18
include/f/f_op/f_op_scene_req/asm/func_8001EFF0.s
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@ -1,18 +0,0 @@
/* 8001EFF0 0001BF30 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EFF4 0001BF34 7C 08 02 A6 */ mflr r0
/* 8001EFF8 0001BF38 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EFFC 0001BF3C 38 A0 00 00 */ li r5, 0
/* 8001F000 0001BF40 80 0D 87 60 */ lwz r0, lbl_80450CE0-_SDA_BASE_(r13)
/* 8001F004 0001BF44 2C 00 00 00 */ cmpwi r0, 0
/* 8001F008 0001BF48 40 82 00 18 */ bne lbl_8001F020
/* 8001F00C 0001BF4C 4B FF F5 F9 */ bl fopOvlpM_Request__FsUs
/* 8001F010 0001BF50 7C 65 1B 79 */ or. r5, r3, r3
/* 8001F014 0001BF54 41 82 00 0C */ beq lbl_8001F020
/* 8001F018 0001BF58 38 00 00 01 */ li r0, 1
/* 8001F01C 0001BF5C 90 0D 87 60 */ stw r0, lbl_80450CE0-_SDA_BASE_(r13)
lbl_8001F020:
/* 8001F020 0001BF60 7C A3 2B 78 */ mr r3, r5
/* 8001F024 0001BF64 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001F028 0001BF68 7C 08 03 A6 */ mtlr r0
/* 8001F02C 0001BF6C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001F030 0001BF70 4E 80 00 20 */ blr

53
include/f/f_op/f_op_scene_req/asm/func_8001F034.s
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@ -1,53 +0,0 @@
/* 8001F034 0001BF74 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8001F038 0001BF78 7C 08 02 A6 */ mflr r0
/* 8001F03C 0001BF7C 90 01 00 24 */ stw r0, 0x24(r1)
/* 8001F040 0001BF80 39 61 00 20 */ addi r11, r1, 0x20
/* 8001F044 0001BF84 48 34 31 8D */ bl _savegpr_26
/* 8001F048 0001BF88 7C 6B 1B 78 */ mr r11, r3
/* 8001F04C 0001BF8C 7C 8A 23 78 */ mr r10, r4
/* 8001F050 0001BF90 7C A9 2B 78 */ mr r9, r5
/* 8001F054 0001BF94 7C C0 33 78 */ mr r0, r6
/* 8001F058 0001BF98 7C FA 3B 78 */ mr r26, r7
/* 8001F05C 0001BF9C 7D 1B 43 78 */ mr r27, r8
/* 8001F060 0001BFA0 3C 60 80 3A */ lis r3, lbl_803A38C8@ha
/* 8001F064 0001BFA4 3B E3 38 C8 */ addi r31, r3, lbl_803A38C8@l
/* 8001F068 0001BFA8 3B C0 00 00 */ li r30, 0
/* 8001F06C 0001BFAC 3B BF 00 10 */ addi r29, r31, 0x10
/* 8001F070 0001BFB0 38 60 00 74 */ li r3, 0x74
/* 8001F074 0001BFB4 7D 64 5B 78 */ mr r4, r11
/* 8001F078 0001BFB8 7D 45 53 78 */ mr r5, r10
/* 8001F07C 0001BFBC 7D 26 4B 78 */ mr r6, r9
/* 8001F080 0001BFC0 7C 07 03 78 */ mr r7, r0
/* 8001F084 0001BFC4 39 1F 00 00 */ addi r8, r31, 0
/* 8001F088 0001BFC8 48 00 3F 61 */ bl fpcNdRq_Request
/* 8001F08C 0001BFCC 7C 7C 1B 79 */ or. r28, r3, r3
/* 8001F090 0001BFD0 40 82 00 0C */ bne lbl_8001F09C
/* 8001F094 0001BFD4 38 60 FF FF */ li r3, -1
/* 8001F098 0001BFD8 48 00 00 4C */ b lbl_8001F0E4
lbl_8001F09C:
/* 8001F09C 0001BFDC 7F 40 07 34 */ extsh r0, r26
/* 8001F0A0 0001BFE0 2C 00 7F FF */ cmpwi r0, 0x7fff
/* 8001F0A4 0001BFE4 41 82 00 2C */ beq lbl_8001F0D0
/* 8001F0A8 0001BFE8 3B BF 00 30 */ addi r29, r31, 0x30
/* 8001F0AC 0001BFEC 7F 43 D3 78 */ mr r3, r26
/* 8001F0B0 0001BFF0 7F 64 DB 78 */ mr r4, r27
/* 8001F0B4 0001BFF4 4B FF FF 3D */ bl fopScnRq_FadeRequest
/* 8001F0B8 0001BFF8 7C 7E 1B 79 */ or. r30, r3, r3
/* 8001F0BC 0001BFFC 40 82 00 14 */ bne lbl_8001F0D0
/* 8001F0C0 0001C000 7F 83 E3 78 */ mr r3, r28
/* 8001F0C4 0001C004 48 00 39 79 */ bl fpcNdRq_Delete
/* 8001F0C8 0001C008 38 60 FF FF */ li r3, -1
/* 8001F0CC 0001C00C 48 00 00 18 */ b lbl_8001F0E4
lbl_8001F0D0:
/* 8001F0D0 0001C010 93 DC 00 64 */ stw r30, 0x64(r28)
/* 8001F0D4 0001C014 38 7C 00 68 */ addi r3, r28, 0x68
/* 8001F0D8 0001C018 7F A4 EB 78 */ mr r4, r29
/* 8001F0DC 0001C01C 48 24 75 55 */ bl cPhs_Set
/* 8001F0E0 0001C020 80 7C 00 44 */ lwz r3, 0x44(r28)
lbl_8001F0E4:
/* 8001F0E4 0001C024 39 61 00 20 */ addi r11, r1, 0x20
/* 8001F0E8 0001C028 48 34 31 35 */ bl _restgpr_26
/* 8001F0EC 0001C02C 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8001F0F0 0001C030 7C 08 03 A6 */ mtlr r0
/* 8001F0F4 0001C034 38 21 00 20 */ addi r1, r1, 0x20
/* 8001F0F8 0001C038 4E 80 00 20 */ blr

8
include/f/f_op/f_op_scene_req/asm/func_8001F0FC.s
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@ -1,8 +0,0 @@
/* 8001F0FC 0001C03C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001F100 0001C040 7C 08 02 A6 */ mflr r0
/* 8001F104 0001C044 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001F108 0001C048 48 00 40 09 */ bl fpcNdRq_ReRequest
/* 8001F10C 0001C04C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001F110 0001C050 7C 08 03 A6 */ mtlr r0
/* 8001F114 0001C054 38 21 00 10 */ addi r1, r1, 0x10
/* 8001F118 0001C058 4E 80 00 20 */ blr

8
include/f/f_op/f_op_scene_req/asm/func_8001F11C.s
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@ -1,8 +0,0 @@
/* 8001F11C 0001C05C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001F120 0001C060 7C 08 02 A6 */ mflr r0
/* 8001F124 0001C064 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001F128 0001C068 48 00 39 D5 */ bl fpcNdRq_Handler
/* 8001F12C 0001C06C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001F130 0001C070 7C 08 03 A6 */ mtlr r0
/* 8001F134 0001C074 38 21 00 10 */ addi r1, r1, 0x10
/* 8001F138 0001C078 4E 80 00 20 */ blr

18
include/f/f_op_overlap_mng/asm/func_8001E484.s
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@ -1,18 +0,0 @@
/* 8001E484 0001B3C4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E488 0001B3C8 7C 08 02 A6 */ mflr r0
/* 8001E48C 0001B3CC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E490 0001B3D0 80 6D 80 30 */ lwz r3, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E494 0001B3D4 28 03 00 00 */ cmplwi r3, 0
/* 8001E498 0001B3D8 41 82 00 18 */ beq lbl_8001E4B0
/* 8001E49C 0001B3DC 80 63 00 20 */ lwz r3, 0x20(r3)
/* 8001E4A0 0001B3E0 80 63 00 C8 */ lwz r3, 0xc8(r3)
/* 8001E4A4 0001B3E4 48 00 2E B5 */ bl fpcEx_SearchByID
/* 8001E4A8 0001B3E8 48 00 20 A1 */ bl fopScnPause_Enable__FP11scene_class
/* 8001E4AC 0001B3EC 48 00 00 08 */ b lbl_8001E4B4
lbl_8001E4B0:
/* 8001E4B0 0001B3F0 38 60 00 00 */ li r3, 0
lbl_8001E4B4:
/* 8001E4B4 0001B3F4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E4B8 0001B3F8 7C 08 03 A6 */ mtlr r0
/* 8001E4BC 0001B3FC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E4C0 0001B400 4E 80 00 20 */ blr

18
include/f/f_op_overlap_mng/asm/func_8001E4C4.s
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@ -1,18 +0,0 @@
/* 8001E4C4 0001B404 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E4C8 0001B408 7C 08 02 A6 */ mflr r0
/* 8001E4CC 0001B40C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E4D0 0001B410 80 6D 80 30 */ lwz r3, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E4D4 0001B414 28 03 00 00 */ cmplwi r3, 0
/* 8001E4D8 0001B418 41 82 00 18 */ beq lbl_8001E4F0
/* 8001E4DC 0001B41C 80 63 00 20 */ lwz r3, 0x20(r3)
/* 8001E4E0 0001B420 80 63 00 C8 */ lwz r3, 0xc8(r3)
/* 8001E4E4 0001B424 48 00 2E 75 */ bl fpcEx_SearchByID
/* 8001E4E8 0001B428 48 00 20 AD */ bl fopScnPause_Disable__FP11scene_class
/* 8001E4EC 0001B42C 48 00 00 08 */ b lbl_8001E4F4
lbl_8001E4F0:
/* 8001E4F0 0001B430 38 60 00 00 */ li r3, 0
lbl_8001E4F4:
/* 8001E4F4 0001B434 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E4F8 0001B438 7C 08 03 A6 */ mtlr r0
/* 8001E4FC 0001B43C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E500 0001B440 4E 80 00 20 */ blr

6
include/f/f_op_overlap_mng/asm/func_8001E504.s
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@ -1,6 +0,0 @@
/* 8001E504 0001B444 88 03 00 C4 */ lbz r0, 0xc4(r3)
/* 8001E508 0001B448 54 00 06 BE */ clrlwi r0, r0, 0x1a
/* 8001E50C 0001B44C 20 00 00 02 */ subfic r0, r0, 2
/* 8001E510 0001B450 7C 00 00 34 */ cntlzw r0, r0
/* 8001E514 0001B454 54 03 DE 3E */ rlwinm r3, r0, 0x1b, 0x18, 0x1f
/* 8001E518 0001B458 4E 80 00 20 */ blr

9
include/f/f_op_overlap_mng/asm/func_8001E51C.s
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@ -1,9 +0,0 @@
/* 8001E51C 0001B45C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E520 0001B460 7C 08 02 A6 */ mflr r0
/* 8001E524 0001B464 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E528 0001B468 38 63 00 C4 */ addi r3, r3, 0xc4
/* 8001E52C 0001B46C 48 24 82 D5 */ bl cReq_Done__FP18request_base_class
/* 8001E530 0001B470 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E534 0001B474 7C 08 03 A6 */ mtlr r0
/* 8001E538 0001B478 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E53C 0001B47C 4E 80 00 20 */ blr

6
include/f/f_op_overlap_mng/asm/func_8001E540.s
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@ -1,6 +0,0 @@
/* 8001E540 0001B480 80 8D 80 30 */ lwz r4, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E544 0001B484 28 04 00 00 */ cmplwi r4, 0
/* 8001E548 0001B488 4D 82 00 20 */ beqlr
/* 8001E54C 0001B48C 80 84 00 20 */ lwz r4, 0x20(r4)
/* 8001E550 0001B490 90 64 00 C8 */ stw r3, 0xc8(r4)
/* 8001E554 0001B494 4E 80 00 20 */ blr

8
include/f/f_op_overlap_mng/asm/func_8001E558.s
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@ -1,8 +0,0 @@
/* 8001E558 0001B498 80 6D 80 30 */ lwz r3, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E55C 0001B49C 28 03 00 00 */ cmplwi r3, 0
/* 8001E560 0001B4A0 41 82 00 0C */ beq lbl_8001E56C
/* 8001E564 0001B4A4 80 63 00 08 */ lwz r3, 8(r3)
/* 8001E568 0001B4A8 4E 80 00 20 */ blr
lbl_8001E56C:
/* 8001E56C 0001B4AC 38 60 00 00 */ li r3, 0
/* 8001E570 0001B4B0 4E 80 00 20 */ blr

15
include/f/f_op_overlap_mng/asm/func_8001E574.s
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@ -1,15 +0,0 @@
/* 8001E574 0001B4B4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E578 0001B4B8 7C 08 02 A6 */ mflr r0
/* 8001E57C 0001B4BC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E580 0001B4C0 80 6D 80 30 */ lwz r3, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E584 0001B4C4 28 03 00 00 */ cmplwi r3, 0
/* 8001E588 0001B4C8 41 82 00 0C */ beq lbl_8001E594
/* 8001E58C 0001B4CC 48 24 82 49 */ bl cReq_Is_Done__FP18request_base_class
/* 8001E590 0001B4D0 48 00 00 08 */ b lbl_8001E598
lbl_8001E594:
/* 8001E594 0001B4D4 38 60 00 00 */ li r3, 0
lbl_8001E598:
/* 8001E598 0001B4D8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E59C 0001B4DC 7C 08 03 A6 */ mtlr r0
/* 8001E5A0 0001B4E0 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E5A4 0001B4E4 4E 80 00 20 */ blr

11
include/f/f_op_overlap_mng/asm/func_8001E5A8.s
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@ -1,11 +0,0 @@
/* 8001E5A8 0001B4E8 80 6D 80 30 */ lwz r3, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E5AC 0001B4EC 28 03 00 00 */ cmplwi r3, 0
/* 8001E5B0 0001B4F0 41 82 00 18 */ beq lbl_8001E5C8
/* 8001E5B4 0001B4F4 A0 03 00 04 */ lhz r0, 4(r3)
/* 8001E5B8 0001B4F8 28 00 00 01 */ cmplwi r0, 1
/* 8001E5BC 0001B4FC 40 82 00 0C */ bne lbl_8001E5C8
/* 8001E5C0 0001B500 38 60 00 01 */ li r3, 1
/* 8001E5C4 0001B504 4E 80 00 20 */ blr
lbl_8001E5C8:
/* 8001E5C8 0001B508 38 60 00 00 */ li r3, 0
/* 8001E5CC 0001B50C 4E 80 00 20 */ blr

15
include/f/f_op_overlap_mng/asm/func_8001E5D0.s
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@ -1,15 +0,0 @@
/* 8001E5D0 0001B510 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E5D4 0001B514 7C 08 02 A6 */ mflr r0
/* 8001E5D8 0001B518 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E5DC 0001B51C 80 6D 80 30 */ lwz r3, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E5E0 0001B520 28 03 00 00 */ cmplwi r3, 0
/* 8001E5E4 0001B524 41 82 00 0C */ beq lbl_8001E5F0
/* 8001E5E8 0001B528 48 00 04 F1 */ bl fopOvlpReq_OverlapClr__FP21overlap_request_class
/* 8001E5EC 0001B52C 48 00 00 08 */ b lbl_8001E5F4
lbl_8001E5F0:
/* 8001E5F0 0001B530 38 60 00 00 */ li r3, 0
lbl_8001E5F4:
/* 8001E5F4 0001B534 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E5F8 0001B538 7C 08 03 A6 */ mtlr r0
/* 8001E5FC 0001B53C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E600 0001B540 4E 80 00 20 */ blr

21
include/f/f_op_overlap_mng/asm/func_8001E604.s
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@ -1,21 +0,0 @@
/* 8001E604 0001B544 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E608 0001B548 7C 08 02 A6 */ mflr r0
/* 8001E60C 0001B54C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E610 0001B550 7C 66 1B 78 */ mr r6, r3
/* 8001E614 0001B554 7C 85 23 78 */ mr r5, r4
/* 8001E618 0001B558 80 0D 80 30 */ lwz r0, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E61C 0001B55C 28 00 00 00 */ cmplwi r0, 0
/* 8001E620 0001B560 40 82 00 1C */ bne lbl_8001E63C
/* 8001E624 0001B564 3C 60 80 3F */ lis r3, l_fopOvlpM_Request@ha
/* 8001E628 0001B568 38 63 1D E8 */ addi r3, r3, l_fopOvlpM_Request@l
/* 8001E62C 0001B56C 7C C4 33 78 */ mr r4, r6
/* 8001E630 0001B570 48 00 03 25 */ bl fopOvlpReq_Request__FP21overlap_request_classsUs
/* 8001E634 0001B574 90 6D 80 30 */ stw r3, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E638 0001B578 48 00 00 08 */ b lbl_8001E640
lbl_8001E63C:
/* 8001E63C 0001B57C 38 60 00 00 */ li r3, 0
lbl_8001E640:
/* 8001E640 0001B580 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E644 0001B584 7C 08 03 A6 */ mtlr r0
/* 8001E648 0001B588 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E64C 0001B58C 4E 80 00 20 */ blr

20
include/f/f_op_overlap_mng/asm/func_8001E650.s
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@ -1,20 +0,0 @@
/* 8001E650 0001B590 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E654 0001B594 7C 08 02 A6 */ mflr r0
/* 8001E658 0001B598 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E65C 0001B59C 80 6D 80 30 */ lwz r3, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E660 0001B5A0 28 03 00 00 */ cmplwi r3, 0
/* 8001E664 0001B5A4 41 82 00 24 */ beq lbl_8001E688
/* 8001E668 0001B5A8 48 00 03 89 */ bl fopOvlpReq_Handler__FP21overlap_request_class
/* 8001E66C 0001B5AC 2C 03 00 06 */ cmpwi r3, 6
/* 8001E670 0001B5B0 40 80 00 18 */ bge lbl_8001E688
/* 8001E674 0001B5B4 2C 03 00 03 */ cmpwi r3, 3
/* 8001E678 0001B5B8 40 80 00 08 */ bge lbl_8001E680
/* 8001E67C 0001B5BC 48 00 00 0C */ b lbl_8001E688
lbl_8001E680:
/* 8001E680 0001B5C0 38 00 00 00 */ li r0, 0
/* 8001E684 0001B5C4 90 0D 80 30 */ stw r0, l_fopOvlpM_overlap-_SDA_BASE_(r13)
lbl_8001E688:
/* 8001E688 0001B5C8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E68C 0001B5CC 7C 08 03 A6 */ mtlr r0
/* 8001E690 0001B5D0 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E694 0001B5D4 4E 80 00 20 */ blr

23
include/f/f_op_overlap_mng/asm/func_8001E698.s
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@ -1,23 +0,0 @@
/* 8001E698 0001B5D8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E69C 0001B5DC 7C 08 02 A6 */ mflr r0
/* 8001E6A0 0001B5E0 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E6A4 0001B5E4 80 6D 80 30 */ lwz r3, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E6A8 0001B5E8 28 03 00 00 */ cmplwi r3, 0
/* 8001E6AC 0001B5EC 40 82 00 0C */ bne lbl_8001E6B8
/* 8001E6B0 0001B5F0 38 60 00 01 */ li r3, 1
/* 8001E6B4 0001B5F4 48 00 00 24 */ b lbl_8001E6D8
lbl_8001E6B8:
/* 8001E6B8 0001B5F8 48 00 03 D1 */ bl fopOvlpReq_Cancel__FP21overlap_request_class
/* 8001E6BC 0001B5FC 2C 03 00 01 */ cmpwi r3, 1
/* 8001E6C0 0001B600 40 82 00 14 */ bne lbl_8001E6D4
/* 8001E6C4 0001B604 38 00 00 00 */ li r0, 0
/* 8001E6C8 0001B608 90 0D 80 30 */ stw r0, l_fopOvlpM_overlap-_SDA_BASE_(r13)
/* 8001E6CC 0001B60C 38 60 00 01 */ li r3, 1
/* 8001E6D0 0001B610 48 00 00 08 */ b lbl_8001E6D8
lbl_8001E6D4:
/* 8001E6D4 0001B614 38 60 00 00 */ li r3, 0
lbl_8001E6D8:
/* 8001E6D8 0001B618 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E6DC 0001B61C 7C 08 03 A6 */ mtlr r0
/* 8001E6E0 0001B620 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E6E4 0001B624 4E 80 00 20 */ blr

1
include/f/f_op_overlap_mng/asm/func_8001E6E8.s
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@ -1 +0,0 @@
/* 8001E6E8 0001B628 4E 80 00 20 */ blr

14
include/f/f_op_scene_mng/asm/func_8001ECB0.s
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@ -1,14 +0,0 @@
/* 8001ECB0 0001BBF0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001ECB4 0001BBF4 7C 08 02 A6 */ mflr r0
/* 8001ECB8 0001BBF8 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001ECBC 0001BBFC 90 61 00 08 */ stw r3, 8(r1)
/*.global fpcSch_JudgeByID*/
/* 8001ECC0 0001BC00 3C 60 80 02 */ lis r3, fpcSch_JudgeByID@ha
/*.global fpcSch_JudgeByID*/
/* 8001ECC4 0001BC04 38 63 35 90 */ addi r3, r3, fpcSch_JudgeByID@l
/* 8001ECC8 0001BC08 38 81 00 08 */ addi r4, r1, 8
/* 8001ECCC 0001BC0C 4B FF FF A9 */ bl fopScnIt_Judge__FPFPvPv_PvPv
/* 8001ECD0 0001BC10 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001ECD4 0001BC14 7C 08 03 A6 */ mtlr r0
/* 8001ECD8 0001BC18 38 21 00 10 */ addi r1, r1, 0x10
/* 8001ECDC 0001BC1C 4E 80 00 20 */ blr

25
include/f/f_op_scene_mng/asm/func_8001ECE0.s
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@ -1,25 +0,0 @@
/* 8001ECE0 0001BC20 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001ECE4 0001BC24 7C 08 02 A6 */ mflr r0
/* 8001ECE8 0001BC28 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001ECEC 0001BC2C 7C 69 1B 78 */ mr r9, r3
/* 8001ECF0 0001BC30 7C 80 23 78 */ mr r0, r4
/* 8001ECF4 0001BC34 7C A7 2B 78 */ mr r7, r5
/* 8001ECF8 0001BC38 7C C8 33 78 */ mr r8, r6
/* 8001ECFC 0001BC3C 38 60 00 02 */ li r3, 2
/* 8001ED00 0001BC40 7D 24 4B 78 */ mr r4, r9
/* 8001ED04 0001BC44 7C 05 03 78 */ mr r5, r0
/* 8001ED08 0001BC48 38 C0 00 00 */ li r6, 0
/* 8001ED0C 0001BC4C 48 00 03 29 */ bl fopScnRq_Request__FiP11scene_classsPvsUs
/* 8001ED10 0001BC50 3C 03 00 01 */ addis r0, r3, 1
/* 8001ED14 0001BC54 28 00 FF FF */ cmplwi r0, 0xffff
/* 8001ED18 0001BC58 40 82 00 0C */ bne lbl_8001ED24
/* 8001ED1C 0001BC5C 38 60 00 00 */ li r3, 0
/* 8001ED20 0001BC60 48 00 00 0C */ b lbl_8001ED2C
lbl_8001ED24:
/* 8001ED24 0001BC64 90 6D 80 38 */ stw r3, l_scnRqID-_SDA_BASE_(r13)
/* 8001ED28 0001BC68 38 60 00 01 */ li r3, 1
lbl_8001ED2C:
/* 8001ED2C 0001BC6C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001ED30 0001BC70 7C 08 03 A6 */ mtlr r0
/* 8001ED34 0001BC74 38 21 00 10 */ addi r1, r1, 0x10
/* 8001ED38 0001BC78 4E 80 00 20 */ blr

18
include/f/f_op_scene_mng/asm/func_8001ED3C.s
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@ -1,18 +0,0 @@
/* 8001ED3C 0001BC7C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001ED40 0001BC80 7C 08 02 A6 */ mflr r0
/* 8001ED44 0001BC84 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001ED48 0001BC88 7C 64 1B 78 */ mr r4, r3
/* 8001ED4C 0001BC8C 38 60 00 01 */ li r3, 1
/* 8001ED50 0001BC90 38 A0 7F FF */ li r5, 0x7fff
/* 8001ED54 0001BC94 38 C0 00 00 */ li r6, 0
/* 8001ED58 0001BC98 38 E0 7F FF */ li r7, 0x7fff
/* 8001ED5C 0001BC9C 39 00 00 00 */ li r8, 0
/* 8001ED60 0001BCA0 48 00 02 D5 */ bl fopScnRq_Request__FiP11scene_classsPvsUs
/* 8001ED64 0001BCA4 20 63 FF FF */ subfic r3, r3, -1
/* 8001ED68 0001BCA8 30 03 FF FF */ addic r0, r3, -1
/* 8001ED6C 0001BCAC 7C 00 19 10 */ subfe r0, r0, r3
/* 8001ED70 0001BCB0 54 03 06 3E */ clrlwi r3, r0, 0x18
/* 8001ED74 0001BCB4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001ED78 0001BCB8 7C 08 03 A6 */ mtlr r0
/* 8001ED7C 0001BCBC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001ED80 0001BCC0 4E 80 00 20 */ blr

18
include/f/f_op_scene_mng/asm/func_8001ED84.s
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@ -1,18 +0,0 @@
/* 8001ED84 0001BCC4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001ED88 0001BCC8 7C 08 02 A6 */ mflr r0
/* 8001ED8C 0001BCCC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001ED90 0001BCD0 7C 60 1B 78 */ mr r0, r3
/* 8001ED94 0001BCD4 7C 87 23 78 */ mr r7, r4
/* 8001ED98 0001BCD8 7C A8 2B 78 */ mr r8, r5
/* 8001ED9C 0001BCDC 38 60 00 00 */ li r3, 0
/* 8001EDA0 0001BCE0 38 80 00 00 */ li r4, 0
/* 8001EDA4 0001BCE4 7C 05 03 78 */ mr r5, r0
/* 8001EDA8 0001BCE8 48 00 02 8D */ bl fopScnRq_Request__FiP11scene_classsPvsUs
/* 8001EDAC 0001BCEC 20 63 FF FF */ subfic r3, r3, -1
/* 8001EDB0 0001BCF0 30 03 FF FF */ addic r0, r3, -1
/* 8001EDB4 0001BCF4 7C 00 19 10 */ subfe r0, r0, r3
/* 8001EDB8 0001BCF8 54 03 06 3E */ clrlwi r3, r0, 0x18
/* 8001EDBC 0001BCFC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EDC0 0001BD00 7C 08 03 A6 */ mtlr r0
/* 8001EDC4 0001BD04 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EDC8 0001BD08 4E 80 00 20 */ blr

19
include/f/f_op_scene_mng/asm/func_8001EDCC.s
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@ -1,19 +0,0 @@
/* 8001EDCC 0001BD0C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EDD0 0001BD10 7C 08 02 A6 */ mflr r0
/* 8001EDD4 0001BD14 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EDD8 0001BD18 7C 66 1B 78 */ mr r6, r3
/* 8001EDDC 0001BD1C 7C 85 23 78 */ mr r5, r4
/* 8001EDE0 0001BD20 80 6D 80 38 */ lwz r3, l_scnRqID-_SDA_BASE_(r13)
/* 8001EDE4 0001BD24 3C 03 00 01 */ addis r0, r3, 1
/* 8001EDE8 0001BD28 28 00 FF FF */ cmplwi r0, 0xffff
/* 8001EDEC 0001BD2C 40 82 00 0C */ bne lbl_8001EDF8
/* 8001EDF0 0001BD30 38 60 00 00 */ li r3, 0
/* 8001EDF4 0001BD34 48 00 00 0C */ b lbl_8001EE00
lbl_8001EDF8:
/* 8001EDF8 0001BD38 7C C4 33 78 */ mr r4, r6
/* 8001EDFC 0001BD3C 48 00 03 01 */ bl fopScnRq_ReRequest__FUisPv
lbl_8001EE00:
/* 8001EE00 0001BD40 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EE04 0001BD44 7C 08 03 A6 */ mtlr r0
/* 8001EE08 0001BD48 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EE0C 0001BD4C 4E 80 00 20 */ blr

8
include/f/f_op_scene_mng/asm/func_8001EE10.s
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@ -1,8 +0,0 @@
/* 8001EE10 0001BD50 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EE14 0001BD54 7C 08 02 A6 */ mflr r0
/* 8001EE18 0001BD58 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EE1C 0001BD5C 48 00 03 01 */ bl fopScnRq_Handler
/* 8001EE20 0001BD60 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EE24 0001BD64 7C 08 03 A6 */ mtlr r0
/* 8001EE28 0001BD68 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EE2C 0001BD6C 4E 80 00 20 */ blr

1
include/f/f_op_scene_mng/asm/func_8001EE30.s
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@ -1 +0,0 @@
/* 8001EE30 0001BD70 4E 80 00 20 */ blr

10
include/m_Do/m_Do_graphic/asm/func_80008078.s
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@ -1,10 +0,0 @@
/* 80008078 00004FB8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8000807C 00004FBC 7C 08 02 A6 */ mflr r0
/* 80008080 00004FC0 90 01 00 14 */ stw r0, 0x14(r1)
/* 80008084 00004FC4 3C 60 80 3A */ lis r3, lbl_803A2FD8@ha
/* 80008088 00004FC8 38 63 2F D8 */ addi r3, r3, lbl_803A2FD8@l
/* 8000808C 00004FCC 48 00 00 15 */ bl onBlure__13mDoGph_gInf_cFPA4_Cf
/* 80008090 00004FD0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80008094 00004FD4 7C 08 03 A6 */ mtlr r0
/* 80008098 00004FD8 38 21 00 10 */ addi r1, r1, 0x10
/* 8000809C 00004FDC 4E 80 00 20 */ blr

12
include/m_Do/m_Do_graphic/asm/func_800080A0.s
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@ -1,12 +0,0 @@
/* 800080A0 00004FE0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800080A4 00004FE4 7C 08 02 A6 */ mflr r0
/* 800080A8 00004FE8 90 01 00 14 */ stw r0, 0x14(r1)
/* 800080AC 00004FEC 38 00 00 01 */ li r0, 1
/* 800080B0 00004FF0 98 0D 86 64 */ stb r0, lbl_80450BE4-_SDA_BASE_(r13)
/* 800080B4 00004FF4 3C 80 80 3E */ lis r4, lbl_803DD43C@ha
/* 800080B8 00004FF8 38 84 D4 3C */ addi r4, r4, lbl_803DD43C@l
/* 800080BC 00004FFC 48 33 E3 F5 */ bl PSMTXCopy
/* 800080C0 00005000 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800080C4 00005004 7C 08 03 A6 */ mtlr r0
/* 800080C8 00005008 38 21 00 10 */ addi r1, r1, 0x10
/* 800080CC 0000500C 4E 80 00 20 */ blr

9
include/m_Do/m_Do_graphic/asm/func_800080D0.s
View File

@ -1,9 +0,0 @@
/* 800080D0 00005010 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800080D4 00005014 7C 08 02 A6 */ mflr r0
/* 800080D8 00005018 90 01 00 14 */ stw r0, 0x14(r1)
/* 800080DC 0000501C 38 6D 80 80 */ addi r3, r13, 0x80450600 - 0x80458580 /*SDA HACK; original: lbl_80450600-_SDA_BASE_*/
/* 800080E0 00005020 4B FF FE F9 */ bl fadeOut__13mDoGph_gInf_cFfR8_GXColor
/* 800080E4 00005024 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800080E8 00005028 7C 08 03 A6 */ mtlr r0
/* 800080EC 0000502C 38 21 00 10 */ addi r1, r1, 0x10
/* 800080F0 00005030 4E 80 00 20 */ blr

1
include/m_Do/m_Do_graphic/asm/func_8000841C.s
View File

@ -1 +0,0 @@
/* 8000841C 0000535C 4E 80 00 20 */ blr

1
include/m_Do/m_Do_graphic/asm/func_80008420.s
View File

@ -1 +0,0 @@
/* 80008420 00005360 4E 80 00 20 */ blr

9
include/m_Do/m_Do_graphic/asm/func_80008450.s
View File

@ -1,9 +0,0 @@
/* 80008450 00005390 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80008454 00005394 7C 08 02 A6 */ mflr r0
/* 80008458 00005398 90 01 00 14 */ stw r0, 0x14(r1)
/* 8000845C 0000539C 4B FF FF C9 */ bl dScnPly_BeforeOfPaint__Fv
/* 80008460 000053A0 38 60 00 01 */ li r3, 1
/* 80008464 000053A4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80008468 000053A8 7C 08 03 A6 */ mtlr r0
/* 8000846C 000053AC 38 21 00 10 */ addi r1, r1, 0x10
/* 80008470 000053B0 4E 80 00 20 */ blr

2
include/m_Do/m_Do_graphic/asm/func_8000B1E4.s
View File

@ -1,2 +0,0 @@
/* 8000B1E4 00008124 38 60 FF FF */ li r3, -1
/* 8000B1E8 00008128 4E 80 00 20 */ blr

11
include/m_Do/m_Do_printf/asm/func_800067C8.s
View File

@ -1,11 +0,0 @@
/* 800067C8 00003708 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800067CC 0000370C 7C 08 02 A6 */ mflr r0
/* 800067D0 00003710 90 01 00 14 */ stw r0, 0x14(r1)
/* 800067D4 00003714 3C 80 80 3D */ lis r4, lbl_803D29B0@ha
/* 800067D8 00003718 38 84 29 B0 */ addi r4, r4, lbl_803D29B0@l
/* 800067DC 0000371C 38 84 00 50 */ addi r4, r4, 0x50
/* 800067E0 00003720 48 35 E9 F9 */ bl fputs
/* 800067E4 00003724 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800067E8 00003728 7C 08 03 A6 */ mtlr r0
/* 800067EC 0000372C 38 21 00 10 */ addi r1, r1, 0x10
/* 800067F0 00003730 4E 80 00 20 */ blr

8
include/m_Do/m_Do_printf/asm/func_800067F4.s
View File

@ -1,8 +0,0 @@
/* 800067F4 00003734 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 800067F8 00003738 7C 08 02 A6 */ mflr r0
/* 800067FC 0000373C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80006800 00003740 48 00 01 85 */ bl mDoPrintf_vprintf__FPCcP16__va_list_struct
/* 80006804 00003744 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80006808 00003748 7C 08 03 A6 */ mtlr r0
/* 8000680C 0000374C 38 21 00 10 */ addi r1, r1, 0x10
/* 80006810 00003750 4E 80 00 20 */ blr

3
include/m_Do/m_Do_printf/asm/func_80006894.s
View File

@ -1,3 +0,0 @@
/* 80006894 000037D4 38 00 00 01 */ li r0, 1
/* 80006898 000037D8 98 0D 86 18 */ stb r0, lbl_80450B98-_SDA_BASE_(r13)
/* 8000689C 000037DC 4E 80 00 20 */ blr

3
include/m_Do/m_Do_printf/asm/func_800068A0.s
View File

@ -1,3 +0,0 @@
/* 800068A0 000037E0 38 00 00 00 */ li r0, 0
/* 800068A4 000037E4 98 0D 86 18 */ stb r0, lbl_80450B98-_SDA_BASE_(r13)
/* 800068A8 000037E8 4E 80 00 20 */ blr

3
include/m_Do/m_Do_printf/asm/func_800068AC.s
View File

@ -1,3 +0,0 @@
/* 800068AC 000037EC 38 00 00 01 */ li r0, 1
/* 800068B0 000037F0 98 0D 86 1C */ stb r0, lbl_80450B9C-_SDA_BASE_(r13)
/* 800068B4 000037F4 4E 80 00 20 */ blr

3
include/m_Do/m_Do_printf/asm/func_800068B8.s
View File

@ -1,3 +0,0 @@
/* 800068B8 000037F8 38 00 00 00 */ li r0, 0
/* 800068BC 000037FC 98 0D 86 1C */ stb r0, lbl_80450B9C-_SDA_BASE_(r13)
/* 800068C0 00003800 4E 80 00 20 */ blr

6
include/m_Do/m_Do_printf/asm/func_800068C4.s
View File

@ -1,6 +0,0 @@
/* 800068C4 00003804 88 0D 86 34 */ lbz r0, lbl_80450BB4-_SDA_BASE_(r13)
/* 800068C8 00003808 28 00 00 00 */ cmplwi r0, 0
/* 800068CC 0000380C 4C 82 00 20 */ bnelr
/* 800068D0 00003810 38 00 00 01 */ li r0, 1
/* 800068D4 00003814 98 0D 86 34 */ stb r0, lbl_80450BB4-_SDA_BASE_(r13)
/* 800068D8 00003818 4E 80 00 20 */ blr

35
include/m_Do/m_Do_printf/asm/func_800068DC.s
View File

@ -1,35 +0,0 @@
/* 800068DC 0000381C 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 800068E0 00003820 7C 08 02 A6 */ mflr r0
/* 800068E4 00003824 90 01 00 24 */ stw r0, 0x24(r1)
/* 800068E8 00003828 39 61 00 20 */ addi r11, r1, 0x20
/* 800068EC 0000382C 48 35 B8 F1 */ bl _savegpr_29
/* 800068F0 00003830 7C 7D 1B 78 */ mr r29, r3
/* 800068F4 00003834 7C 9E 23 78 */ mr r30, r4
/* 800068F8 00003838 48 33 6D FD */ bl __RAS_OSDisableInterrupts_begin
/* 800068FC 0000383C 7C 7F 1B 78 */ mr r31, r3
/* 80006900 00003840 88 0D 86 35 */ lbz r0, lbl_80450BB5-_SDA_BASE_(r13)
/* 80006904 00003844 28 00 00 00 */ cmplwi r0, 0
/* 80006908 00003848 40 82 00 3C */ bne lbl_80006944
/* 8000690C 0000384C 38 00 00 01 */ li r0, 1
/* 80006910 00003850 98 0D 86 35 */ stb r0, lbl_80450BB5-_SDA_BASE_(r13)
/* 80006914 00003854 7F A3 EB 78 */ mr r3, r29
/* 80006918 00003858 7F C4 F3 78 */ mr r4, r30
/* 8000691C 0000385C 38 A0 00 00 */ li r5, 0
/* 80006920 00003860 38 C0 00 00 */ li r6, 0
/* 80006924 00003864 3C E0 80 36 */ lis r7, vprintf@ha
/* 80006928 00003868 38 E7 67 04 */ addi r7, r7, vprintf@l
/* 8000692C 0000386C 3D 00 80 3E */ lis r8, lbl_803DB740@ha
/* 80006930 00003870 39 08 B7 40 */ addi r8, r8, lbl_803DB740@l
/* 80006934 00003874 39 08 08 00 */ addi r8, r8, 0x800
/* 80006938 00003878 4B FF FE 61 */ bl OSSwitchFiberEx__FUlUlUlUlUlUl
/* 8000693C 0000387C 38 00 00 00 */ li r0, 0
/* 80006940 00003880 98 0D 86 35 */ stb r0, lbl_80450BB5-_SDA_BASE_(r13)
lbl_80006944:
/* 80006944 00003884 7F E3 FB 78 */ mr r3, r31
/* 80006948 00003888 48 33 6D D5 */ bl OSRestoreInterrupts
/* 8000694C 0000388C 39 61 00 20 */ addi r11, r1, 0x20
/* 80006950 00003890 48 35 B8 D9 */ bl _restgpr_29
/* 80006954 00003894 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80006958 00003898 7C 08 03 A6 */ mtlr r0
/* 8000695C 0000389C 38 21 00 20 */ addi r1, r1, 0x20
/* 80006960 000038A0 4E 80 00 20 */ blr

8
include/m_Do/m_Do_printf/asm/func_80006964.s
View File

@ -1,8 +0,0 @@
/* 80006964 000038A4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80006968 000038A8 7C 08 02 A6 */ mflr r0
/* 8000696C 000038AC 90 01 00 14 */ stw r0, 0x14(r1)
/* 80006970 000038B0 48 35 FD 95 */ bl vprintf
/* 80006974 000038B4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80006978 000038B8 7C 08 03 A6 */ mtlr r0
/* 8000697C 000038BC 38 21 00 10 */ addi r1, r1, 0x10
/* 80006980 000038C0 4E 80 00 20 */ blr

39
include/m_Do/m_Do_printf/asm/func_80006984.s
View File

@ -1,39 +0,0 @@
/* 80006984 000038C4 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80006988 000038C8 7C 08 02 A6 */ mflr r0
/* 8000698C 000038CC 90 01 00 24 */ stw r0, 0x24(r1)
/* 80006990 000038D0 39 61 00 20 */ addi r11, r1, 0x20
/* 80006994 000038D4 48 35 B8 49 */ bl _savegpr_29
/* 80006998 000038D8 7C 7D 1B 78 */ mr r29, r3
/* 8000699C 000038DC 7C 9E 23 78 */ mr r30, r4
/* 800069A0 000038E0 48 00 E3 C5 */ bl mDoExt_GetCurrentRunningThread__Fv
/* 800069A4 000038E4 7C 7F 1B 79 */ or. r31, r3, r3
/* 800069A8 000038E8 40 82 00 14 */ bne lbl_800069BC
/* 800069AC 000038EC 7F A3 EB 78 */ mr r3, r29
/* 800069B0 000038F0 7F C4 F3 78 */ mr r4, r30
/* 800069B4 000038F4 4B FF FF 29 */ bl mDoPrintf_vprintf_Interrupt__FPCcP16__va_list_struct
/* 800069B8 000038F8 48 00 00 40 */ b lbl_800069F8
lbl_800069BC:
/* 800069BC 000038FC 48 33 56 3D */ bl OSGetStackPointer
/* 800069C0 00003900 80 9F 03 08 */ lwz r4, 0x308(r31)
/* 800069C4 00003904 38 04 0A 00 */ addi r0, r4, 0xa00
/* 800069C8 00003908 7C 03 00 40 */ cmplw r3, r0
/* 800069CC 0000390C 41 80 00 10 */ blt lbl_800069DC
/* 800069D0 00003910 80 1F 03 04 */ lwz r0, 0x304(r31)
/* 800069D4 00003914 7C 03 00 40 */ cmplw r3, r0
/* 800069D8 00003918 40 81 00 14 */ ble lbl_800069EC
lbl_800069DC:
/* 800069DC 0000391C 7F A3 EB 78 */ mr r3, r29
/* 800069E0 00003920 7F C4 F3 78 */ mr r4, r30
/* 800069E4 00003924 4B FF FE F9 */ bl mDoPrintf_vprintf_Interrupt__FPCcP16__va_list_struct
/* 800069E8 00003928 48 00 00 10 */ b lbl_800069F8
lbl_800069EC:
/* 800069EC 0000392C 7F A3 EB 78 */ mr r3, r29
/* 800069F0 00003930 7F C4 F3 78 */ mr r4, r30
/* 800069F4 00003934 4B FF FF 71 */ bl mDoPrintf_vprintf_Thread__FPCcP16__va_list_struct
lbl_800069F8:
/* 800069F8 00003938 39 61 00 20 */ addi r11, r1, 0x20
/* 800069FC 0000393C 48 35 B8 2D */ bl _restgpr_29
/* 80006A00 00003940 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80006A04 00003944 7C 08 03 A6 */ mtlr r0
/* 80006A08 00003948 38 21 00 20 */ addi r1, r1, 0x20
/* 80006A0C 0000394C 4E 80 00 20 */ blr

39
include/m_Do/m_Do_printf/asm/func_80006A10.s
View File

@ -1,39 +0,0 @@
/* 80006A10 00003950 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80006A14 00003954 7C 08 02 A6 */ mflr r0
/* 80006A18 00003958 90 01 00 14 */ stw r0, 0x14(r1)
/* 80006A1C 0000395C 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80006A20 00003960 93 C1 00 08 */ stw r30, 8(r1)
/* 80006A24 00003964 7C 7E 1B 78 */ mr r30, r3
/* 80006A28 00003968 7C 9F 23 78 */ mr r31, r4
/* 80006A2C 0000396C 88 0D 86 34 */ lbz r0, lbl_80450BB4-_SDA_BASE_(r13)
/* 80006A30 00003970 28 00 00 00 */ cmplwi r0, 0
/* 80006A34 00003974 40 82 00 08 */ bne lbl_80006A3C
/* 80006A38 00003978 4B FF FE 8D */ bl OSReportInit__Fv
lbl_80006A3C:
/* 80006A3C 0000397C 88 0D 86 1C */ lbz r0, lbl_80450B9C-_SDA_BASE_(r13)
/* 80006A40 00003980 28 00 00 00 */ cmplwi r0, 0
/* 80006A44 00003984 40 82 00 10 */ bne lbl_80006A54
/* 80006A48 00003988 88 0D 86 18 */ lbz r0, lbl_80450B98-_SDA_BASE_(r13)
/* 80006A4C 0000398C 28 00 00 00 */ cmplwi r0, 0
/* 80006A50 00003990 40 82 00 34 */ bne lbl_80006A84
lbl_80006A54:
/* 80006A54 00003994 48 00 E3 11 */ bl mDoExt_GetCurrentRunningThread__Fv
/* 80006A58 00003998 80 0D 86 20 */ lwz r0, lbl_80450BA0-_SDA_BASE_(r13)
/* 80006A5C 0000399C 28 00 00 00 */ cmplwi r0, 0
/* 80006A60 000039A0 41 82 00 0C */ beq lbl_80006A6C
/* 80006A64 000039A4 7C 00 18 40 */ cmplw r0, r3
/* 80006A68 000039A8 40 82 00 1C */ bne lbl_80006A84
lbl_80006A6C:
/* 80006A6C 000039AC 7F C3 F3 78 */ mr r3, r30
/* 80006A70 000039B0 7F E4 FB 78 */ mr r4, r31
/* 80006A74 000039B4 4B FF FF 11 */ bl mDoPrintf_vprintf__FPCcP16__va_list_struct
/* 80006A78 000039B8 80 6D 86 24 */ lwz r3, lbl_80450BA4-_SDA_BASE_(r13)
/* 80006A7C 000039BC 38 03 00 01 */ addi r0, r3, 1
/* 80006A80 000039C0 90 0D 86 24 */ stw r0, lbl_80450BA4-_SDA_BASE_(r13)
lbl_80006A84:
/* 80006A84 000039C4 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80006A88 000039C8 83 C1 00 08 */ lwz r30, 8(r1)
/* 80006A8C 000039CC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80006A90 000039D0 7C 08 03 A6 */ mtlr r0
/* 80006A94 000039D4 38 21 00 10 */ addi r1, r1, 0x10
/* 80006A98 000039D8 4E 80 00 20 */ blr

8
include/m_Do/m_Do_printf/asm/func_80006A9C.s
View File

@ -1,8 +0,0 @@
/* 80006A9C 000039DC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80006AA0 000039E0 7C 08 02 A6 */ mflr r0
/* 80006AA4 000039E4 90 01 00 14 */ stw r0, 0x14(r1)
/* 80006AA8 000039E8 4B FF FF 69 */ bl mDoPrintf_VReport
/* 80006AAC 000039EC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80006AB0 000039F0 7C 08 03 A6 */ mtlr r0
/* 80006AB4 000039F4 38 21 00 10 */ addi r1, r1, 0x10
/* 80006AB8 000039F8 4E 80 00 20 */ blr

1
libs/SSystem/SComponent/c_xyz.cpp
View File

@ -171,6 +171,7 @@ inline f32 VecMagXZ(const cXyz& xyz) {
// return cXyz(xyz.x, 0, xyz.z).getSquareMag(); // matches, but screws up data
}
// this belongs to msl_c/math.h, but can't go there currently because of data
inline f32 sqrtf(f32 mag) {
if (mag > FLOAT_LABEL(lbl_80455080)) {
f64 tmpd = __frsqrte(mag);

4
src/f/f_op/f_op_actor_iter.cpp
View File

@ -13,7 +13,7 @@ int fopAcIt_Executor(fopAcIt_ExecutorFunc pExecFunc, void* pData) {
} userData;
userData.func = pExecFunc;
userData.data = pData;
cLsIt_Method(&lbl_803A35E0, (cNdIt_MethodFunc)cTgIt_MethodCall, &userData);
return cLsIt_Method(&lbl_803A35E0, (cNdIt_MethodFunc)cTgIt_MethodCall, &userData);
}
// fopAcIt_Judge__FPFPvPv_PvPv
@ -24,5 +24,5 @@ void* fopAcIt_Judge(fopAcIt_JudgeFunc pJudgeFunc, void* pData) {
} userData;
userData.func = pJudgeFunc;
userData.data = pData;
cLsIt_Judge(&lbl_803A35E0, (cNdIt_JudgeFunc)cTgIt_JudgeFilter, &userData);
return cLsIt_Judge(&lbl_803A35E0, (cNdIt_JudgeFunc)cTgIt_JudgeFilter, &userData);
}

37
src/f/f_op/f_op_actor_mng.cpp
View File

@ -296,9 +296,26 @@ extern u8 lbl_80451C58;
extern u8 lbl_80451C5C;
extern u8 lbl_80451C60;
extern j3dsys lbl_80434AC8;
extern u8 lbl_80450AE0;
extern f32 lbl_80450AE0[4]; // array is fake, to force 2 step load
extern u8 lbl_803DD470;
// this belongs to msl_c/math.h, but can't go there currently because of data
inline f32 sqrtf(f32 mag) {
if (mag > FLOAT_LABEL(lbl_80451C04)) {
f64 tmpd = __frsqrte(mag);
tmpd = DOUBLE_LABEL(lbl_80451C08) * tmpd * (DOUBLE_LABEL(lbl_80451C10) - tmpd * tmpd * mag);
tmpd = DOUBLE_LABEL(lbl_80451C08) * tmpd * (DOUBLE_LABEL(lbl_80451C10) - tmpd * tmpd * mag);
return DOUBLE_LABEL(lbl_80451C08) * tmpd *
(DOUBLE_LABEL(lbl_80451C10) - tmpd * tmpd * mag) * mag;
} else if (mag < DOUBLE_LABEL(lbl_80451C18)) {
return /* __float_nan */ lbl_80450AE0[0];
} else if (fpclassify(mag) == 1) {
return /* __float_nan */ lbl_80450AE0[0];
} else {
return mag;
}
}
inline u32 fopAcM_GetID(const void* pProc) {
return fpcM_GetID(pProc);
}
@ -777,8 +794,9 @@ s32 fopAcM_seenActorAngleY(const fopAc_ac_c* pActorA, const fopAc_ac_c* pActorB)
}
// fopAcM_searchActorDistance__FPC10fopAc_ac_cPC10fopAc_ac_c
asm f32 fopAcM_searchActorDistance(const fopAc_ac_c*, const fopAc_ac_c*){nofralloc
#include "f/f_op/f_op_actor_mng/asm/func_8001A7E0.s"
f32 fopAcM_searchActorDistance(const fopAc_ac_c* pActorA, const fopAc_ac_c* pActorB) {
cXyz tmp = (pActorB->mPosition - pActorA->mPosition);
return sqrtf(tmp.abs2());
}
// fopAcM_searchActorDistance2__FPC10fopAc_ac_cPC10fopAc_ac_c
@ -787,18 +805,19 @@ f32 fopAcM_searchActorDistance2(const fopAc_ac_c* pActorA, const fopAc_ac_c* pAc
return tmp.abs2();
}
// fopAcM_searchActorDistanceXZ__FPC10fopAc_ac_cPC10fopAc_ac_c
asm f32 fopAcM_searchActorDistanceXZ(const fopAc_ac_c*, const fopAc_ac_c*) {
nofralloc
#include "f/f_op/f_op_actor_mng/asm/func_8001A964.s"
}
// TODO: replace calls to this with .abs2XZ, needs additional float constant at the moment
inline f32 cXyzAbs2XZ(const cXyz& ths) {
cXyz tmp(ths.x, /* 0.0f */ lbl_80451C04, ths.z);
return tmp.abs2();
}
// fopAcM_searchActorDistanceXZ__FPC10fopAc_ac_cPC10fopAc_ac_c
f32 fopAcM_searchActorDistanceXZ(const fopAc_ac_c* pActorA, const fopAc_ac_c* pActorB) {
const cXyz& posA = fopAcM_GetPosition_p(pActorA);
const cXyz& posB = fopAcM_GetPosition_p(pActorB);
return sqrtf(cXyzAbs2XZ(posB - posA));
}
// fopAcM_searchActorDistanceXZ2__FPC10fopAc_ac_cPC10fopAc_ac_c
f32 fopAcM_searchActorDistanceXZ2(const fopAc_ac_c* pActorA, const fopAc_ac_c* pActorB) {
const cXyz& posA = fopAcM_GetPosition_p(pActorA);

10
src/f/f_op/f_op_overlap_mng.cpp
View File

@ -43,17 +43,9 @@ int fopOvlpM_SceneIsStart(void) {
}
}
// 1 instruction off
#ifdef NONMATCHING
int fopOvlpM_IsOutReq(overlap_task_class* pTaskClass) {
return pTaskClass->field_0xc4 == 2;
return (pTaskClass->field_0xc4 & 0x3F) == 2;
}
#else
asm int fopOvlpM_IsOutReq(overlap_task_class* pTaskClass) {
nofralloc
#include "f/f_op_overlap_mng/asm/func_8001E504.s"
}
#endif
void fopOvlpM_Done(overlap_task_class* pTaskClass) {
cReq_Done((request_base_class*)&pTaskClass->field_0xc4);

33
src/f/f_op/f_op_overlap_req.cpp
View File

@ -50,19 +50,10 @@ int fopOvlpReq_phase_Done(overlap_request_class* pOvlpReq) {
return 0;
}
// return line is wrong
#ifdef NONMATCHING
s16 fopOvlpReq_phase_IsDone(overlap_request_class* param_1) {
s32 fopOvlpReq_phase_IsDone(overlap_request_class* param_1) {
cReq_Done((request_base_class*)param_1);
param_1->field_0x2--;
return ((int)param_1->field_0x2 | ~-(int)param_1->field_0x2) >> 0x1F & 2;
return param_1->field_0x2-- <= 0 ? 2 : 0;
}
#else
asm void fopOvlpReq_phase_IsDone(overlap_request_class*) {
nofralloc
#include "f/f_op/f_op_overlap_req/asm/func_8001E748.s"
}
#endif
int fopOvlpReq_phase_IsWaitOfFadeout(overlap_request_class* pOvlpReq) {
if (cReq_Is_Done((request_base_class*)(pOvlpReq->field_0x20 + 0xC4))) {
@ -131,9 +122,23 @@ request_base_class* fopOvlpReq_Request(overlap_request_class* pOvlpReq, s16 para
return (request_base_class*)pOvlpReq;
}
asm int fopOvlpReq_Handler(overlap_request_class*) {
nofralloc
#include "f/f_op/f_op_overlap_req/asm/func_8001E9F0.s"
int fopOvlpReq_Handler(overlap_request_class* pOvlpReq) {
int phsDo = cPhs_Do(&pOvlpReq->field_0x18, pOvlpReq);
switch (phsDo) {
case 2:
return fopOvlpReq_Handler(pOvlpReq);
case 0:
return 0;
case 1:
return 0;
case 4:
return 4;
case 3:
case 5:
return 5;
default:
return 5;
}
}
int fopOvlpReq_Cancel(overlap_request_class* pOvlpReq) {

22
src/f/f_op/f_op_scene_iter.cpp
View File

@ -1,21 +1,21 @@
/* f_op_scene_iter.cpp autogenerated by split.py v0.4 at 2021-02-15 20:27:34.795954 */
#include "f/f_op/f_op_scene_iter.h"
#include "SComponent/c_list.h"
#include "SComponent/c_list_iter.h"
#include "SComponent/c_tag_iter.h"
#include "global.h"
// additional symbols needed for f_op_scene_iter.cpp
// autogenerated by split.py v0.4 at 2021-02-15 20:27:34.795974
extern "C" {
void cLsIt_Judge(void);
void fopScnIt_Judge(void);
}
// additional symbols needed for f_op_scene_iter.cpp
// autogenerated by split.py v0.4 at 2021-02-15 20:27:34.795978
extern u8 lbl_803A3918;
extern node_list_class lbl_803A3918; // f_op_scene_tag::g_fopScnTg_SceneList
asm void* fopScnIt_Judge(fop_ScnItFunc pFunc1, void* pFunc2) {
nofralloc
#include "f/f_op/f_op_scene_iter/asm/func_8001EC74.s"
void* fopScnIt_Judge(fop_ScnItFunc pFunc1, void* pData) {
struct {
fop_ScnItFunc mFunc;
void* mpData;
} iterParams;
iterParams.mFunc = pFunc1;
iterParams.mpData = pData;
return cLsIt_Judge(&lbl_803A3918, (cNdIt_JudgeFunc)cTgIt_JudgeFilter, &iterParams);
}

33
src/f/f_op/f_op_scene_mng.cpp
View File

@ -14,53 +14,32 @@ void fopScnRq_Request__FiP11scene_classsPvsUs(void);
// autogenerated by split.py v0.4 at 2021-02-13 20:33:37.409412
extern unsigned int l_scnRqID;
// matches but can be improved
void* fopScnM_SearchByID(unsigned int id) {
unsigned int local_8[2];
local_8[0] = id;
return fopScnIt_Judge((fop_ScnItFunc)fpcSch_JudgeByID, (void*)local_8);
return fopScnIt_Judge((fop_ScnItFunc)fpcSch_JudgeByID, &id);
}
int fopScnM_ChangeReq(scene_class* pScene, s16 param_2, s16 param_3, u16 param_4) {
u32 sceneRequestID = fopScnRq_Request(2, pScene, param_2, 0, param_3, param_4);
// can't get a match unless the request id is unsigned
if (sceneRequestID == -1) {
if (sceneRequestID == 0xFFFFFFFF) {
return 0;
}
l_scnRqID = sceneRequestID;
return 1;
}
#ifdef NONMATCHING
unsigned int fopScnM_DeleteReq(scene_class* pScene) {
u32 sceneRequestID = fopScnRq_Request(1, pScene, 0x7fff, 0, 0x7fff, 0);
u32 tmp = (-sceneRequestID - 1);
u32 tmp2 = (tmp + -1);
return tmp2;
return sceneRequestID != 0xFFFFFFFF;
}
#else
asm unsigned int fopScnM_DeleteReq(scene_class*) {
nofralloc
#include "f/f_op_scene_mng/asm/func_8001ED3C.s"
}
#endif
#ifdef NONMATCHING
void fopScnM_CreateReq(s16 param_1, s16 param_2, u16 param_3, u32 param_4) {
int fopScnM_CreateReq(s16 param_1, s16 param_2, u16 param_3, u32 param_4) {
u32 sceneRequestID = fopScnRq_Request(0, 0, param_1, (void*)param_4, param_2, param_3);
u32 tmp = (-sceneRequestID + -1);
return tmp - (sceneRequestID == 0) + (-sceneRequestID + -2) & 0xFF;
return sceneRequestID != 0xFFFFFFFF;
}
#else
asm void fopScnM_CreateReq(s16, s16, u16, u32) {
nofralloc
#include "f/f_op_scene_mng/asm/func_8001ED84.s"
}
#endif
u32 fopScnM_ReRequest(s16 param_1, u32 param_2) {
if (l_scnRqID == -1) {
if (l_scnRqID == 0xFFFFFFFF) {
return 0;
}