mirror of https://github.com/zeldaret/tp.git
synced portions of TRK lib with other decomps
This commit is contained in:
parent
f3f944c797
commit
473736fb6a
16
Progress.md
16
Progress.md
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@ -7,22 +7,22 @@ Section | Percentage | Decompiled (bytes) | Total (bytes)
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.init | 97.972973% | 9280 | 9472
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.extab | 100.000000% | 96 | 96
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.extabindex | 100.000000% | 96 | 96
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.text | 29.950419% | 1077180 | 3596544
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.text | 30.410194% | 1093716 | 3596544
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.ctors | 100.000000% | 448 | 448
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.dtors | 100.000000% | 32 | 32
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||||
.rodata | 100.000000% | 193856 | 193856
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.data | 100.000000% | 197632 | 197632
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.sdata | 100.000000% | 1408 | 1408
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.sdata2 | 100.000000% | 20832 | 20832
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Total | 37.334953% | 1501116 | 4020672
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Total | 37.746227% | 1517652 | 4020672
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## Total
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Section | Percentage | Decompiled (bytes) | Total (bytes)
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---|---|---|---
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main.dol | 37.334953% | 1501116 | 4020672
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RELs | 34.025372% | 3913028 | 11500324
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Total | 34.882710% | 5414144 | 15520996
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main.dol | 37.746227% | 1517652 | 4020672
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RELs | 34.066692% | 3917780 | 11500324
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Total | 35.019866% | 5435432 | 15520996
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## RELs
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@ -199,7 +199,7 @@ d_a_kytag04 | 36.357481% | 2148 | 5908
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d_a_kytag05 | 100.000000% | 816 | 816
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d_a_kytag06 | 100.000000% | 14140 | 14140
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d_a_kytag07 | 100.000000% | 1272 | 1272
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d_a_kytag08 | 31.379026% | 1520 | 4844
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d_a_kytag08 | 35.590421% | 1724 | 4844
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d_a_kytag09 | 49.936948% | 1584 | 3172
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d_a_kytag10 | 43.413978% | 1292 | 2976
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d_a_kytag11 | 52.643172% | 956 | 1816
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@ -622,7 +622,7 @@ d_a_obj_swLight | 40.346767% | 3444 | 8536
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d_a_obj_swchain | 24.473297% | 3996 | 16328
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d_a_obj_swhang | 38.446450% | 3920 | 10196
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d_a_obj_sword | 45.479963% | 1952 | 4292
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d_a_obj_swpropeller | 39.765679% | 2308 | 5804
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d_a_obj_swpropeller | 98.552722% | 5720 | 5804
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d_a_obj_swpush | 31.657104% | 3752 | 11852
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d_a_obj_swpush2 | 34.150019% | 3624 | 10612
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d_a_obj_swpush5 | 39.210384% | 2900 | 7396
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@ -785,4 +785,4 @@ d_a_vrbox2 | 34.977578% | 2184 | 6244
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d_a_warp_bug | 100.000000% | 2024 | 2024
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d_a_ykgr | 44.400631% | 2252 | 5072
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f_pc_profile_lst | 100.000000% | 28156 | 28156
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Total | 34.035250% | 3914164 | 11500324
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Total | 34.066692% | 3917780 | 11500324
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@ -1,11 +0,0 @@
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lbl_8036CE40:
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/* 8036CE40 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 8036CE44 7C 08 02 A6 */ mflr r0
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/* 8036CE48 3C 60 80 3A */ lis r3, lit_133@ha /* 0x803A2688@ha */
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/* 8036CE4C 90 01 00 14 */ stw r0, 0x14(r1)
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/* 8036CE50 38 63 26 88 */ addi r3, r3, lit_133@l /* 0x803A2688@l */
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/* 8036CE54 48 00 4E 85 */ bl TRK_board_display
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/* 8036CE58 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 8036CE5C 7C 08 03 A6 */ mtlr r0
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/* 8036CE60 38 21 00 10 */ addi r1, r1, 0x10
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/* 8036CE64 4E 80 00 20 */ blr
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@ -1,20 +0,0 @@
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lbl_80371E10:
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/* 80371E10 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80371E14 7C 08 02 A6 */ mflr r0
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/* 80371E18 3C 60 80 45 */ lis r3, data_8044F820@ha /* 0x8044F820@ha */
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/* 80371E1C 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80371E20 88 03 F8 20 */ lbz r0, data_8044F820@l(r3) /* 0x8044F820@l */
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/* 80371E24 28 00 00 00 */ cmplwi r0, 0
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/* 80371E28 40 82 00 20 */ bne lbl_80371E48
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/* 80371E2C 3C 60 80 3D */ lis r3, gDBCommTable@ha /* 0x803D32A8@ha */
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/* 80371E30 38 63 32 A8 */ addi r3, r3, gDBCommTable@l /* 0x803D32A8@l */
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/* 80371E34 81 83 00 04 */ lwz r12, 4(r3)
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/* 80371E38 28 0C 00 00 */ cmplwi r12, 0
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/* 80371E3C 41 82 00 0C */ beq lbl_80371E48
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/* 80371E40 7D 89 03 A6 */ mtctr r12
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/* 80371E44 4E 80 04 21 */ bctrl
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lbl_80371E48:
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/* 80371E48 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80371E4C 7C 08 03 A6 */ mtlr r0
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/* 80371E50 38 21 00 10 */ addi r1, r1, 0x10
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/* 80371E54 4E 80 00 20 */ blr
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@ -1,23 +0,0 @@
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lbl_80371C80:
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/* 80371C80 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80371C84 7C 08 02 A6 */ mflr r0
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/* 80371C88 3C 80 80 34 */ lis r4, PPCHalt@ha /* 0x80339D00@ha */
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/* 80371C8C 3C 60 80 3A */ lis r3, EndofProgramInstruction@ha /* 0x803A2C08@ha */
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/* 80371C90 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80371C94 38 A0 00 04 */ li r5, 4
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/* 80371C98 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 80371C9C 3B E4 9D 00 */ addi r31, r4, PPCHalt@l /* 0x80339D00@l */
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/* 80371CA0 38 83 2C 08 */ addi r4, r3, EndofProgramInstruction@l /* 0x803A2C08@l */
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/* 80371CA4 38 7F 00 04 */ addi r3, r31, 4
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/* 80371CA8 4B C9 19 19 */ bl TRK_memcpy
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/* 80371CAC 38 7F 00 04 */ addi r3, r31, 4
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/* 80371CB0 38 80 00 04 */ li r4, 4
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/* 80371CB4 4B FC 99 DD */ bl ICInvalidateRange
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/* 80371CB8 38 7F 00 04 */ addi r3, r31, 4
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/* 80371CBC 38 80 00 04 */ li r4, 4
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/* 80371CC0 4B FC 98 ED */ bl DCFlushRange
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/* 80371CC4 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80371CC8 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 80371CCC 7C 08 03 A6 */ mtlr r0
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/* 80371CD0 38 21 00 10 */ addi r1, r1, 0x10
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/* 80371CD4 4E 80 00 20 */ blr
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@ -1,13 +0,0 @@
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lbl_80371D38:
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/* 80371D38 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80371D3C 7C 08 02 A6 */ mflr r0
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/* 80371D40 3C 60 80 3D */ lis r3, gDBCommTable@ha /* 0x803D32A8@ha */
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/* 80371D44 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80371D48 38 63 32 A8 */ addi r3, r3, gDBCommTable@l /* 0x803D32A8@l */
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/* 80371D4C 81 83 00 24 */ lwz r12, 0x24(r3)
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/* 80371D50 7D 89 03 A6 */ mtctr r12
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/* 80371D54 4E 80 04 21 */ bctrl
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/* 80371D58 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80371D5C 7C 08 03 A6 */ mtlr r0
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/* 80371D60 38 21 00 10 */ addi r1, r1, 0x10
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/* 80371D64 4E 80 00 20 */ blr
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@ -1,15 +0,0 @@
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lbl_80372114:
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/* 80372114 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80372118 7C 08 02 A6 */ mflr r0
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/* 8037211C 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80372120 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 80372124 7C 9F 23 78 */ mr r31, r4
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/* 80372128 4B FC EB DD */ bl OSEnableScheduler
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/* 8037212C 7F E3 FB 78 */ mr r3, r31
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/* 80372130 38 80 05 00 */ li r4, 0x500
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/* 80372134 4B FF FA C1 */ bl TRKLoadContext
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/* 80372138 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 8037213C 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 80372140 7C 08 03 A6 */ mtlr r0
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/* 80372144 38 21 00 10 */ addi r1, r1, 0x10
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/* 80372148 4E 80 00 20 */ blr
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@ -1,21 +0,0 @@
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lbl_80371E58:
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/* 80371E58 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80371E5C 7C 08 02 A6 */ mflr r0
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/* 80371E60 3C 80 80 37 */ lis r4, TRKEXICallBack@ha /* 0x80372114@ha */
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/* 80371E64 3C 60 80 3D */ lis r3, gDBCommTable@ha /* 0x803D32A8@ha */
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/* 80371E68 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80371E6C 38 84 21 14 */ addi r4, r4, TRKEXICallBack@l /* 0x80372114@l */
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/* 80371E70 81 83 32 A8 */ lwz r12, gDBCommTable@l(r3) /* 0x803D32A8@l */
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/* 80371E74 7C C3 33 78 */ mr r3, r6
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/* 80371E78 7D 89 03 A6 */ mtctr r12
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/* 80371E7C 4E 80 04 21 */ bctrl
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/* 80371E80 3C 60 80 3D */ lis r3, gDBCommTable@ha /* 0x803D32A8@ha */
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/* 80371E84 38 63 32 A8 */ addi r3, r3, gDBCommTable@l /* 0x803D32A8@l */
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/* 80371E88 81 83 00 18 */ lwz r12, 0x18(r3)
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/* 80371E8C 7D 89 03 A6 */ mtctr r12
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/* 80371E90 4E 80 04 21 */ bctrl
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/* 80371E94 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80371E98 38 60 00 00 */ li r3, 0
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/* 80371E9C 7C 08 03 A6 */ mtlr r0
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/* 80371EA0 38 21 00 10 */ addi r1, r1, 0x10
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/* 80371EA4 4E 80 00 20 */ blr
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@ -1,13 +0,0 @@
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lbl_80371DE0:
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/* 80371DE0 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80371DE4 7C 08 02 A6 */ mflr r0
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/* 80371DE8 3C 60 80 3D */ lis r3, gDBCommTable@ha /* 0x803D32A8@ha */
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/* 80371DEC 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80371DF0 38 63 32 A8 */ addi r3, r3, gDBCommTable@l /* 0x803D32A8@l */
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/* 80371DF4 81 83 00 0C */ lwz r12, 0xc(r3)
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/* 80371DF8 7D 89 03 A6 */ mtctr r12
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/* 80371DFC 4E 80 04 21 */ bctrl
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/* 80371E00 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80371E04 7C 08 03 A6 */ mtlr r0
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/* 80371E08 38 21 00 10 */ addi r1, r1, 0x10
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/* 80371E0C 4E 80 00 20 */ blr
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@ -1,16 +0,0 @@
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lbl_80371DA4:
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/* 80371DA4 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80371DA8 7C 08 02 A6 */ mflr r0
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/* 80371DAC 3C A0 80 3D */ lis r5, gDBCommTable@ha /* 0x803D32A8@ha */
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/* 80371DB0 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80371DB4 38 A5 32 A8 */ addi r5, r5, gDBCommTable@l /* 0x803D32A8@l */
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/* 80371DB8 81 85 00 10 */ lwz r12, 0x10(r5)
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/* 80371DBC 7D 89 03 A6 */ mtctr r12
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/* 80371DC0 4E 80 04 21 */ bctrl
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/* 80371DC4 7C 03 00 D0 */ neg r0, r3
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/* 80371DC8 7C 00 1B 78 */ or r0, r0, r3
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/* 80371DCC 7C 03 FE 70 */ srawi r3, r0, 0x1f
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/* 80371DD0 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80371DD4 7C 08 03 A6 */ mtlr r0
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/* 80371DD8 38 21 00 10 */ addi r1, r1, 0x10
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/* 80371DDC 4E 80 00 20 */ blr
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@ -1,16 +0,0 @@
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lbl_80371D68:
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/* 80371D68 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80371D6C 7C 08 02 A6 */ mflr r0
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/* 80371D70 3C A0 80 3D */ lis r5, gDBCommTable@ha /* 0x803D32A8@ha */
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/* 80371D74 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80371D78 38 A5 32 A8 */ addi r5, r5, gDBCommTable@l /* 0x803D32A8@l */
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/* 80371D7C 81 85 00 14 */ lwz r12, 0x14(r5)
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/* 80371D80 7D 89 03 A6 */ mtctr r12
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/* 80371D84 4E 80 04 21 */ bctrl
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/* 80371D88 7C 03 00 D0 */ neg r0, r3
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/* 80371D8C 7C 00 1B 78 */ or r0, r0, r3
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/* 80371D90 7C 03 FE 70 */ srawi r3, r0, 0x1f
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/* 80371D94 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80371D98 7C 08 03 A6 */ mtlr r0
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/* 80371D9C 38 21 00 10 */ addi r1, r1, 0x10
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/* 80371DA0 4E 80 00 20 */ blr
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@ -1,13 +0,0 @@
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lbl_80371D08:
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/* 80371D08 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80371D0C 7C 08 02 A6 */ mflr r0
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/* 80371D10 3C 60 80 3D */ lis r3, gDBCommTable@ha /* 0x803D32A8@ha */
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/* 80371D14 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80371D18 38 63 32 A8 */ addi r3, r3, gDBCommTable@l /* 0x803D32A8@l */
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/* 80371D1C 81 83 00 20 */ lwz r12, 0x20(r3)
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/* 80371D20 7D 89 03 A6 */ mtctr r12
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/* 80371D24 4E 80 04 21 */ bctrl
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/* 80371D28 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80371D2C 7C 08 03 A6 */ mtlr r0
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/* 80371D30 38 21 00 10 */ addi r1, r1, 0x10
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/* 80371D34 4E 80 00 20 */ blr
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@ -3,6 +3,8 @@
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#include "dolphin/types.h"
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typedef int MessageBufferID;
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typedef struct TRKBuffer {
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u32 _00;
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u32 _04;
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@ -1,19 +1,33 @@
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#ifndef METROTRK_PORTABLE_NUBEVENT_H
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#define METROTRK_PORTABLE_NUBEVENT_H
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#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf.h"
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#include "dolphin/types.h"
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typedef struct TRKEventQueue {
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typedef u32 NubEventID;
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typedef enum NubEventType {
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NullEvent,
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ShutdownEvent,
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RequestEvent,
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BreakpointEvent,
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ExceptionEvent,
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SupportEvent
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} NubEventType;
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typedef struct NubEvent {
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NubEventType mType;
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NubEventID mID;
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MessageBufferID mMessageBufferID;
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} NubEvent;
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typedef struct EventQueue {
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s32 _00;
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s32 _04;
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s32 _08;
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s32 _0C;
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s32 _10;
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s32 _14;
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s32 _18;
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s32 _1C;
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s32 _20;
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u32 _24;
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} TRKEventQueue;
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s32 mCount;
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s32 mFirst;
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NubEvent mEventList[2];
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NubEventID mEventID;
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} EventQueue;
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EventQueue gTRKEventQueue;
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#endif /* METROTRK_PORTABLE_NUBEVENT_H */
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@ -1,8 +1,29 @@
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#ifndef OS_DOLPHIN_DOLPHIN_TRK_GLUE_H
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#define OS_DOLPHIN_DOLPHIN_TRK_GLUE_H
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#include "dolphin/os/OS.h"
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#include "dolphin/types.h"
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typedef enum { HARDWARE_GDEV = 0, HARDWARE_DDH = 1, HARDWARE_BBA = 2 } HardwareType;
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typedef int (*DBCommFunc)();
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typedef int (*DBCommInitFunc)(void*, OSInterruptHandler);
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typedef int (*DBCommReadFunc)(u8*, int);
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typedef int (*DBCommWriteFunc)(const u8*, int);
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typedef struct DBCommTable {
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DBCommInitFunc initialize_func;
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DBCommFunc initinterrupts_func;
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DBCommFunc shutdown_func;
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DBCommFunc peek_func;
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DBCommReadFunc read_func;
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DBCommWriteFunc write_func;
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DBCommFunc open_func;
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DBCommFunc close_func;
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DBCommFunc pre_continue_func;
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DBCommFunc post_stop_func;
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} DBCommTable;
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void UnreserveEXI2Port();
|
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void ReserveEXI2Port();
|
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s32 TRKWriteUARTN(const void*, u32);
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@ -6,21 +6,126 @@
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void TRKSwapAndGo();
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void TRKTargetSetStopped(s32);
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typedef struct Default_PPC {
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u32 GPR[32];
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u32 PC;
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u32 LR;
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||||
u32 CR;
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||||
u32 CTR;
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||||
u32 XER;
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} Default_PPC;
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typedef struct Float_PPC {
|
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u64 FPR[32];
|
||||
u64 FPSCR;
|
||||
u64 FPECR;
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} Float_PPC;
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typedef struct Extended1_PPC_6xx_7xx{
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u32 SR[16];
|
||||
u32 TBL;
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||||
u32 TBU;
|
||||
u32 HID0;
|
||||
u32 HID1;
|
||||
u32 MSR;
|
||||
u32 PVR;
|
||||
u32 IBAT0U;
|
||||
u32 IBAT0L;
|
||||
u32 IBAT1U;
|
||||
u32 IBAT1L;
|
||||
u32 IBAT2U;
|
||||
u32 IBAT2L;
|
||||
u32 IBAT3U;
|
||||
u32 IBAT3L;
|
||||
u32 DBAT0U;
|
||||
u32 DBAT0L;
|
||||
u32 DBAT1U;
|
||||
u32 DBAT1L;
|
||||
u32 DBAT2U;
|
||||
u32 DBAT2L;
|
||||
u32 DBAT3U;
|
||||
u32 DBAT3L;
|
||||
u32 DMISS;
|
||||
u32 DCMP;
|
||||
u32 HASH1;
|
||||
u32 HASH2;
|
||||
u32 IMISS;
|
||||
u32 ICMP;
|
||||
u32 RPA;
|
||||
u32 SDR1;
|
||||
u32 DAR;
|
||||
u32 DSISR;
|
||||
u32 SPRG0;
|
||||
u32 SPRG1;
|
||||
u32 SPRG2;
|
||||
u32 SPRG3;
|
||||
u32 DEC;
|
||||
u32 IABR;
|
||||
u32 EAR;
|
||||
u32 DABR;
|
||||
u32 PMC1;
|
||||
u32 PMC2;
|
||||
u32 PMC3;
|
||||
u32 PMC4;
|
||||
u32 SIA;
|
||||
u32 MMCR0;
|
||||
u32 MMCR1;
|
||||
u32 THRM1;
|
||||
u32 THRM2;
|
||||
u32 THRM3;
|
||||
u32 ICTC;
|
||||
u32 L2CR;
|
||||
u32 UMMCR2;
|
||||
u32 UBAMR;
|
||||
u32 UMMCR0;
|
||||
u32 UPMC1;
|
||||
u32 UPMC2;
|
||||
u32 USIA;
|
||||
u32 UMMCR1;
|
||||
u32 UPMC3;
|
||||
u32 UPMC4;
|
||||
u32 USDA;
|
||||
u32 MMCR2;
|
||||
u32 BAMR;
|
||||
u32 SDA;
|
||||
u32 MSSCR0;
|
||||
u32 MSSCR1;
|
||||
u32 PIR;
|
||||
u32 exceptionID;
|
||||
u32 GQR[8];
|
||||
u32 HID_G;
|
||||
u32 WPAR;
|
||||
u32 DMA_U;
|
||||
u32 DMA_L;
|
||||
} Extended1_PPC_6xx_7xx;
|
||||
|
||||
typedef struct Extended2_PPC_6xx_7xx{
|
||||
u32 PSR[32][2];
|
||||
} Extended2_PPC_6xx_7xx;
|
||||
|
||||
typedef struct ProcessorState_PPC_6xx_7xx{
|
||||
Default_PPC Default;
|
||||
Float_PPC Float;
|
||||
Extended1_PPC_6xx_7xx Extended1;
|
||||
Extended2_PPC_6xx_7xx Extended2;
|
||||
u32 transport_handler_saved_ra;
|
||||
} ProcessorState_PPC_6xx_7xx;
|
||||
|
||||
typedef ProcessorState_PPC_6xx_7xx ProcessorState_PPC;
|
||||
ProcessorState_PPC gTRKCPUState;
|
||||
|
||||
typedef struct TRKState {
|
||||
/* 0x00 */ u32 field_0x00[35];
|
||||
/* 0x8C */ u32 msr;
|
||||
/* 0x90 */ u32 field_0x90[2];
|
||||
/* 0x98 */ u32 target;
|
||||
/* 0x9C */ u32 field_0x9C;
|
||||
/* 0x00 */ u32 GPR[32];
|
||||
/* 0x80 */ u32 LR;
|
||||
/* 0x84 */ u32 CTR;
|
||||
/* 0x88 */ u32 XER;
|
||||
/* 0x8C */ u32 MSR;
|
||||
/* 0x90 */ u32 DAR;
|
||||
/* 0x94 */ u32 DSISR;
|
||||
/* 0x98 */ u32 stopped;
|
||||
/* 0x9C */ u32 inputActivated;
|
||||
/* 0xA0 */ void* inputPendingPtr;
|
||||
} TRKState;
|
||||
TRKState gTRKState;
|
||||
|
||||
typedef struct TRKCPUState {
|
||||
/* 0x00 */ u32 field_0x00[32];
|
||||
/* 0x80 */ u32 pc;
|
||||
/* 0x84 */ u32 field_0x84[235];
|
||||
} TRKCPUState;
|
||||
TRKCPUState gTRKCPUState;
|
||||
|
||||
#endif /* PPC_GENERIC_TARGIMPL_H */
|
||||
|
|
|
|||
|
|
@ -4,18 +4,18 @@
|
|||
#include "dolphin/types.h"
|
||||
|
||||
typedef struct CircleBuffer {
|
||||
int field_0x0;
|
||||
int field_0x4;
|
||||
int field_0x8;
|
||||
u8* field_0x0;
|
||||
u8* field_0x4;
|
||||
u8* field_0x8;
|
||||
u32 field_0xc;
|
||||
s32 readBuf;
|
||||
u32 field_0x14;
|
||||
u32 criticalSection;
|
||||
s32 mBytesToRead;
|
||||
u32 mBytesToWrite;
|
||||
u32 mCriticalSection;
|
||||
} CircleBuffer;
|
||||
|
||||
s32 CircleBufferReadBytes(CircleBuffer*, u32, u32);
|
||||
s32 CircleBufferWriteBytes(CircleBuffer* buf, s32 param_2, u32 param_3);
|
||||
void CircleBufferInitialize(CircleBuffer* buf, s32 param_2, s32 param_3);
|
||||
s32 CBGetBytesAvailableForRead(CircleBuffer* buf);
|
||||
s32 CircleBufferReadBytes(CircleBuffer*, u8*, u32);
|
||||
s32 CircleBufferWriteBytes(CircleBuffer*, u8*, u32);
|
||||
void CircleBufferInitialize(CircleBuffer*, u8*, s32);
|
||||
s32 CBGetBytesAvailableForRead(CircleBuffer*);
|
||||
|
||||
#endif /* UTILS_COMMON_CIRCLEBUFFER_H */
|
||||
|
|
|
|||
|
|
@ -14,9 +14,9 @@
|
|||
//
|
||||
|
||||
void TRKDestructEvent();
|
||||
void TRKConstructEvent();
|
||||
void TRKConstructEvent(NubEvent*, NubEventType);
|
||||
void TRKPostEvent();
|
||||
u8 TRKGetNextEvent();
|
||||
u8 TRKGetNextEvent(NubEvent*);
|
||||
u8 TRKInitializeEventQueue();
|
||||
|
||||
//
|
||||
|
|
@ -31,21 +31,17 @@ void TRKReleaseBuffer();
|
|||
//
|
||||
|
||||
/* 8036CC18-8036CC3C 367558 0024+00 0/0 1/1 0/0 .text TRKDestructEvent */
|
||||
void TRKDestructEvent(TRKBuffer* buf) {
|
||||
TRKReleaseBuffer(buf->_08);
|
||||
void TRKDestructEvent(NubEvent* event) {
|
||||
TRKReleaseBuffer(event->mMessageBufferID);
|
||||
}
|
||||
|
||||
/* 8036CC3C-8036CC54 36757C 0018+00 0/0 5/5 0/0 .text TRKConstructEvent */
|
||||
void TRKConstructEvent(TRKBuffer* buf, u32 param_1) {
|
||||
buf->_00 = param_1;
|
||||
buf->_04 = 0;
|
||||
buf->_08 = -1;
|
||||
void TRKConstructEvent(NubEvent* event, NubEventType eventType) {
|
||||
event->mType = eventType;
|
||||
event->mID = 0;
|
||||
event->mMessageBufferID = -1;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 8044D890-8044D8B8 07A5B0 0028+00 3/3 0/0 0/0 .bss gTRKEventQueue */
|
||||
static TRKEventQueue gTRKEventQueue;
|
||||
|
||||
/* 8036CC54-8036CD34 367594 00E0+00 0/0 5/5 0/0 .text TRKPostEvent */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
|
|
@ -57,15 +53,14 @@ asm void TRKPostEvent() {
|
|||
#pragma pop
|
||||
|
||||
/* 8036CD34-8036CDE8 367674 00B4+00 0/0 1/1 0/0 .text TRKGetNextEvent */
|
||||
u8 TRKGetNextEvent(void* event) {
|
||||
u8 TRKGetNextEvent(NubEvent* event) {
|
||||
u8 status = 0;
|
||||
TRKAcquireMutex(&gTRKEventQueue);
|
||||
if (0 < gTRKEventQueue._04) {
|
||||
TRK_memcpy(event, &gTRKEventQueue._0C + gTRKEventQueue._08 * 3, 12);
|
||||
gTRKEventQueue._04 -= 1;
|
||||
gTRKEventQueue._08 += 1;
|
||||
if (gTRKEventQueue._08 == 2) {
|
||||
gTRKEventQueue._08 = 0;
|
||||
if (0 < gTRKEventQueue.mCount) {
|
||||
TRK_memcpy(event, &gTRKEventQueue.mEventList[gTRKEventQueue.mFirst], sizeof(NubEvent));
|
||||
gTRKEventQueue.mCount--;
|
||||
if (++gTRKEventQueue.mFirst == 2) {
|
||||
gTRKEventQueue.mFirst = 0;
|
||||
}
|
||||
status = 1;
|
||||
}
|
||||
|
|
@ -77,9 +72,9 @@ u8 TRKGetNextEvent(void* event) {
|
|||
u8 TRKInitializeEventQueue() {
|
||||
TRKInitializeMutex(&gTRKEventQueue);
|
||||
TRKAcquireMutex(&gTRKEventQueue);
|
||||
gTRKEventQueue._04 = 0;
|
||||
gTRKEventQueue._08 = 0;
|
||||
gTRKEventQueue._24 = 0x100;
|
||||
gTRKEventQueue.mCount = 0;
|
||||
gTRKEventQueue.mFirst = 0;
|
||||
gTRKEventQueue.mEventID = 0x100;
|
||||
TRKReleaseMutex();
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubinit.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
#include "dol2asm.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
|
|
@ -11,18 +12,17 @@
|
|||
// External References:
|
||||
//
|
||||
|
||||
void TRKInitializeEventQueue();
|
||||
void TRKInitializeMessageBuffers();
|
||||
int TRKInitializeEventQueue();
|
||||
int TRKInitializeMessageBuffers();
|
||||
u8 TRKTerminateSerialHandler();
|
||||
void TRKInitializeSerialHandler();
|
||||
int TRKInitializeSerialHandler();
|
||||
void usr_put_initialize();
|
||||
u8 TRKInitializeDispatcher();
|
||||
void TRKTargetSetInputPendingPtr();
|
||||
void TRKInitializeTarget();
|
||||
int TRKInitializeDispatcher();
|
||||
void TRKTargetSetInputPendingPtr(void*);
|
||||
int TRKInitializeTarget();
|
||||
void InitializeProgramEndTrap();
|
||||
void TRK_board_display(const char*);
|
||||
void TRKInitializeIntDrivenUART();
|
||||
void MWTRACE();
|
||||
int TRKInitializeIntDrivenUART(u32, u32, u32, void*);
|
||||
extern u8 gTRKInputPendingPtr[4 + 4 /* padding */];
|
||||
|
||||
//
|
||||
|
|
@ -35,14 +35,9 @@ SECTION_RODATA static char const lit_133[] = "MetroTRK for GAMECUBE v2.6";
|
|||
COMPILER_STRIP_GATE(0x803A2688, &lit_133);
|
||||
|
||||
/* 8036CE40-8036CE68 367780 0028+00 0/0 1/1 0/0 .text TRKNubWelcome */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKNubWelcome(void) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubinit/TRKNubWelcome.s"
|
||||
void TRKNubWelcome(void) {
|
||||
TRK_board_display(lit_133);
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036CE68-8036CE8C 3677A8 0024+00 0/0 1/1 0/0 .text TRKTerminateNub */
|
||||
s32 TRKTerminateNub(void) {
|
||||
|
|
@ -59,6 +54,26 @@ COMPILER_STRIP_GATE(0x803A26A4, &lit_154);
|
|||
SECTION_BSS extern BOOL gTRKBigEndian;
|
||||
SECTION_BSS BOOL gTRKBigEndian;
|
||||
|
||||
inline BOOL TRKInitializeEndian() {
|
||||
BOOL res = FALSE;
|
||||
u8 bendian[4];
|
||||
u32 load;
|
||||
gTRKBigEndian = TRUE;
|
||||
bendian[0] = 0x12;
|
||||
bendian[1] = 0x34;
|
||||
bendian[2] = 0x56;
|
||||
bendian[3] = 0x78;
|
||||
load = *(u32*)bendian;
|
||||
if (load == 0x12345678) {
|
||||
gTRKBigEndian = TRUE;
|
||||
} else if (load == 0x78563412) {
|
||||
gTRKBigEndian = FALSE;
|
||||
} else {
|
||||
res = TRUE;
|
||||
}
|
||||
return res;
|
||||
}
|
||||
|
||||
/* 8036CE8C-8036CFD8 3677CC 014C+00 0/0 1/1 0/0 .text TRKInitializeNub */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
|
|
@ -67,4 +82,3 @@ asm s32 TRKInitializeNub(void) {
|
|||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubinit/TRKInitializeNub.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
|
|
|||
|
|
@ -84,85 +84,23 @@ asm void TRK__read_aram() {
|
|||
|
||||
/* ############################################################################################## */
|
||||
/* 8044F810-8044F818 07C530 0004+04 3/3 0/0 0/0 .bss lc_base */
|
||||
SECTION_BSS static u32 lc_base[1 + 1 /*padding*/];
|
||||
SECTION_BSS static u32 lc_base;
|
||||
|
||||
/* 803719AC-803719F8 36C2EC 004C+00 0/0 1/1 0/0 .text TRKInitializeTarget */
|
||||
int TRKInitializeTarget() {
|
||||
gTRKState.target = 1;
|
||||
gTRKState.msr = __TRK_get_MSR();
|
||||
*lc_base = 0xE0000000;
|
||||
gTRKState.stopped = TRUE;
|
||||
gTRKState.MSR = __TRK_get_MSR();
|
||||
lc_base = 0xE0000000;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803D3268-803D32A8 030388 003C+04 1/1 0/0 0/0 .data TRK_ISR_OFFSETS */
|
||||
SECTION_DATA static u8 TRK_ISR_OFFSETS[60 + 4 /* padding */] = {
|
||||
0x00,
|
||||
0x00,
|
||||
0x01,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x02,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x03,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x04,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x05,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x06,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x07,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x08,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x09,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x0C,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x0D,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x0F,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x13,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x14,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x17,
|
||||
0x00,
|
||||
static u32 TRK_ISR_OFFSETS[15 + 1 /* padding */] = {
|
||||
0x100, 0x200, 0x300, 0x400, 0x500, 0x600, 0x700, 0x800, 0x900, 0xC00, 0xD00, 0xF00, 0x1300,
|
||||
0x1400, 0x1700,
|
||||
/* padding */
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
};
|
||||
0};
|
||||
|
||||
/* 803719F8-80371B24 36C338 012C+00 0/0 1/1 0/0 .text __TRK_copy_vectors */
|
||||
#pragma push
|
||||
|
|
@ -176,8 +114,8 @@ asm void __TRK_copy_vectors() {
|
|||
|
||||
/* 80371B24-80371B7C 36C464 0058+00 0/0 1/1 0/0 .text TRKTargetTranslate */
|
||||
u32 TRKTargetTranslate(u32 param_0) {
|
||||
if (param_0 >= *lc_base) {
|
||||
if ((param_0 < *lc_base + 0x4000) && ((gTRKCPUState.field_0x84[109] & 3) != 0)) {
|
||||
if (param_0 >= lc_base) {
|
||||
if ((param_0 < lc_base + 0x4000) && ((gTRKCPUState.Extended1.DBAT3U & 3) != 0)) {
|
||||
return param_0;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -15,12 +15,12 @@ static void TRKLoadContext();
|
|||
void TRKUARTInterruptHandler();
|
||||
void InitializeProgramEndTrap();
|
||||
void TRK_board_display();
|
||||
void TRKReadUARTN();
|
||||
void TRKPollUART();
|
||||
int TRKReadUARTN(void*, u32);
|
||||
int TRKPollUART();
|
||||
void EnableEXI2Interrupts();
|
||||
void TRKInitializeIntDrivenUART();
|
||||
int TRKInitializeIntDrivenUART();
|
||||
void InitMetroTRKCommTable();
|
||||
static void TRKEXICallBack();
|
||||
static void TRKEXICallBack(s16 param_0, OSContext* ctx);
|
||||
SECTION_BSS extern u8 data_8044F828[8];
|
||||
|
||||
//
|
||||
|
|
@ -28,11 +28,9 @@ SECTION_BSS extern u8 data_8044F828[8];
|
|||
//
|
||||
|
||||
SECTION_INIT void TRK_memcpy();
|
||||
void OSReport();
|
||||
void PPCHalt();
|
||||
void DCFlushRange();
|
||||
void ICInvalidateRange();
|
||||
void OSEnableScheduler();
|
||||
void TRKInterruptHandler();
|
||||
s32 udp_cc_post_stop();
|
||||
s32 udp_cc_pre_continue();
|
||||
|
|
@ -87,23 +85,17 @@ void TRKUARTInterruptHandler() {
|
|||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2C08-803A2C0C 02F268 0004+00 2/2 0/0 0/0 .rodata EndofProgramInstruction$162 */
|
||||
SECTION_RODATA static u8 const EndofProgramInstruction[4] = {
|
||||
0x00,
|
||||
0x45,
|
||||
0x4E,
|
||||
0x44,
|
||||
};
|
||||
SECTION_RODATA static u32 const EndofProgramInstruction = 0x00454E44; // \0END
|
||||
COMPILER_STRIP_GATE(0x803A2C08, &EndofProgramInstruction);
|
||||
|
||||
/* 80371C80-80371CD8 36C5C0 0058+00 0/0 1/1 0/0 .text InitializeProgramEndTrap */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void InitializeProgramEndTrap() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue/InitializeProgramEndTrap.s"
|
||||
void InitializeProgramEndTrap() {
|
||||
u8* endOfProgramInstructionBytes = (u8*)&EndofProgramInstruction;
|
||||
u8* ppcHaltPtr = (u8*)PPCHalt;
|
||||
TRK_memcpy(ppcHaltPtr + 4, endOfProgramInstructionBytes, 4);
|
||||
ICInvalidateRange(ppcHaltPtr + 4, 4);
|
||||
DCFlushRange(ppcHaltPtr + 4, 4);
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2C0C-803A2C10 02F26C 0004+00 1/1 0/0 0/0 .rodata @165 */
|
||||
|
|
@ -122,85 +114,54 @@ asm void TRK_board_display() {
|
|||
|
||||
/* ############################################################################################## */
|
||||
/* 803D32A8-803D32D0 0303C8 0028+00 8/8 0/0 0/0 .data gDBCommTable */
|
||||
SECTION_DATA static u8 gDBCommTable[40] = {
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
};
|
||||
static DBCommTable gDBCommTable = {};
|
||||
|
||||
/* 80371D08-80371D38 36C648 0030+00 0/0 1/1 0/0 .text UnreserveEXI2Port */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void UnreserveEXI2Port() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue/UnreserveEXI2Port.s"
|
||||
void UnreserveEXI2Port() {
|
||||
gDBCommTable.pre_continue_func();
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 80371D38-80371D68 36C678 0030+00 0/0 1/1 0/0 .text ReserveEXI2Port */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void ReserveEXI2Port() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue/ReserveEXI2Port.s"
|
||||
void ReserveEXI2Port() {
|
||||
gDBCommTable.post_stop_func();
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 80371D68-80371DA4 36C6A8 003C+00 0/0 13/13 0/0 .text TRKWriteUARTN */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKWriteUARTN(const void*, u32) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue/TRKWriteUARTN.s"
|
||||
s32 TRKWriteUARTN(const void* bytes, u32 length) {
|
||||
int r3 = gDBCommTable.write_func(bytes, length);
|
||||
return ((-r3 | r3)) >> 31;
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 80371DA4-80371DE0 36C6E4 003C+00 0/0 1/1 0/0 .text TRKReadUARTN */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKReadUARTN() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue/TRKReadUARTN.s"
|
||||
int TRKReadUARTN(void* bytes, u32 limit) {
|
||||
int r3 = gDBCommTable.read_func(bytes, limit);
|
||||
return ((-r3 | r3)) >> 31;
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 80371DE0-80371E10 36C720 0030+00 0/0 1/1 0/0 .text TRKPollUART */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKPollUART() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue/TRKPollUART.s"
|
||||
int TRKPollUART() {
|
||||
return gDBCommTable.peek_func();
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 8044F820-8044F824 07C540 0004+00 2/2 0/0 0/0 .bss None */
|
||||
SECTION_BSS static u8 data_8044F820[4];
|
||||
|
||||
/* 80371E10-80371E58 36C750 0048+00 0/0 1/1 0/0 .text EnableEXI2Interrupts */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void EnableEXI2Interrupts() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue/EnableEXI2Interrupts.s"
|
||||
void EnableEXI2Interrupts() {
|
||||
if (!*data_8044F820) {
|
||||
if (gDBCommTable.initinterrupts_func != NULL) {
|
||||
gDBCommTable.initinterrupts_func();
|
||||
}
|
||||
}
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 80371E58-80371EA8 36C798 0050+00 0/0 1/1 0/0 .text TRKInitializeIntDrivenUART */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKInitializeIntDrivenUART() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue/TRKInitializeIntDrivenUART.s"
|
||||
int TRKInitializeIntDrivenUART(u32 param_0, u32 param_1, u32 param_2, void* param_3) {
|
||||
gDBCommTable.initialize_func(param_3, TRKEXICallBack);
|
||||
gDBCommTable.open_func();
|
||||
return 0;
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2C10-803A2C28 02F270 0015+03 0/1 0/0 0/0 .rodata @215 */
|
||||
|
|
@ -263,14 +224,10 @@ asm void InitMetroTRKCommTable() {
|
|||
#pragma pop
|
||||
|
||||
/* 80372114-8037214C 36CA54 0038+00 1/1 0/0 0/0 .text TRKEXICallBack */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
static asm void TRKEXICallBack() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue/TRKEXICallBack.s"
|
||||
static void TRKEXICallBack(s16 param_0, OSContext* ctx) {
|
||||
OSEnableScheduler();
|
||||
TRKLoadContext(ctx, 0x500);
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 8044F828-8044F830 07C548 0008+00 0/0 2/2 0/0 .bss None */
|
||||
|
|
|
|||
|
|
@ -204,18 +204,18 @@ void TRKTargetSetInputPendingPtr(void* ptr) {
|
|||
|
||||
/* 8036FAE8-8036FB00 36A428 0018+00 0/0 1/1 0/0 .text TRKTargetStop */
|
||||
u32 TRKTargetStop() {
|
||||
gTRKState.target = 1;
|
||||
gTRKState.stopped = TRUE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 8036FB00-8036FB10 36A440 0010+00 0/0 1/1 0/0 .text TRKTargetSetStopped */
|
||||
void TRKTargetSetStopped(s32 tgt) {
|
||||
gTRKState.target = tgt;
|
||||
void TRKTargetSetStopped(s32 isStopped) {
|
||||
gTRKState.stopped = isStopped;
|
||||
}
|
||||
|
||||
/* 8036FB10-8036FB20 36A450 0010+00 0/0 3/3 0/0 .text TRKTargetStopped */
|
||||
s32 TRKTargetStopped() {
|
||||
return gTRKState.target;
|
||||
return gTRKState.stopped;
|
||||
}
|
||||
|
||||
/* 8036FB20-8036FD20 36A460 0200+00 0/0 1/1 0/0 .text TRKTargetSupportRequest */
|
||||
|
|
@ -230,7 +230,7 @@ asm void TRKTargetSupportRequest() {
|
|||
|
||||
/* 8036FD20-8036FD30 36A660 0010+00 0/0 1/1 0/0 .text TRKTargetGetPC */
|
||||
u32 TRKTargetGetPC() {
|
||||
return gTRKCPUState.pc;
|
||||
return gTRKCPUState.Default.PC;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
|
|
|
|||
|
|
@ -5,74 +5,73 @@
|
|||
#include "dolphin/types.h"
|
||||
|
||||
/* 803726A0-803727A8 36CFE0 0108+00 0/0 2/2 0/0 .text CircleBufferReadBytes */
|
||||
s32 CircleBufferReadBytes(CircleBuffer* buf, u32 param_2, u32 param_3) {
|
||||
s32 CircleBufferReadBytes(CircleBuffer* cb, u8* buf, u32 size) {
|
||||
int temp;
|
||||
if (param_3 > buf->readBuf) {
|
||||
|
||||
if (size > cb->mBytesToRead) {
|
||||
return -1;
|
||||
} else {
|
||||
MWEnterCriticalSection(&buf->criticalSection);
|
||||
temp = buf->field_0xc - (buf->field_0x0 - buf->field_0x8);
|
||||
if (param_3 < temp) {
|
||||
memcpy(param_2, buf->field_0x0, param_3);
|
||||
buf->field_0x0 += param_3;
|
||||
} else {
|
||||
memcpy(param_2, buf->field_0x0, temp);
|
||||
memcpy(param_2 + temp, buf->field_0x8, param_3 - temp);
|
||||
buf->field_0x0 = buf->field_0x8 + param_3 - temp;
|
||||
}
|
||||
|
||||
if (buf->field_0xc == (buf->field_0x0 - buf->field_0x8)) {
|
||||
buf->field_0x0 = buf->field_0x8;
|
||||
}
|
||||
|
||||
buf->field_0x14 += param_3;
|
||||
buf->readBuf -= param_3;
|
||||
MWExitCriticalSection(&buf->criticalSection);
|
||||
return 0;
|
||||
}
|
||||
MWEnterCriticalSection(&cb->mCriticalSection);
|
||||
temp = cb->field_0xc - (cb->field_0x0 - cb->field_0x8);
|
||||
if (size < temp) {
|
||||
memcpy(buf, cb->field_0x0, size);
|
||||
cb->field_0x0 += size;
|
||||
} else {
|
||||
memcpy(buf, cb->field_0x0, temp);
|
||||
memcpy(buf + temp, cb->field_0x8, size - temp);
|
||||
cb->field_0x0 = cb->field_0x8 + size - temp;
|
||||
}
|
||||
|
||||
if (cb->field_0xc == (cb->field_0x0 - cb->field_0x8)) {
|
||||
cb->field_0x0 = cb->field_0x8;
|
||||
}
|
||||
|
||||
cb->mBytesToWrite += size;
|
||||
cb->mBytesToRead -= size;
|
||||
MWExitCriticalSection(&cb->mCriticalSection);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 803727A8-803728B0 36D0E8 0108+00 0/0 4/4 0/0 .text CircleBufferWriteBytes */
|
||||
s32 CircleBufferWriteBytes(CircleBuffer* buf, s32 param_2, u32 param_3) {
|
||||
s32 CircleBufferWriteBytes(CircleBuffer* cb, u8* buf, u32 size) {
|
||||
s32 temp;
|
||||
|
||||
if (param_3 > buf->field_0x14) {
|
||||
if (size > cb->mBytesToWrite) {
|
||||
return -1;
|
||||
} else {
|
||||
MWEnterCriticalSection(&buf->criticalSection);
|
||||
temp = buf->field_0xc - (buf->field_0x4 - buf->field_0x8);
|
||||
if (temp >= param_3) {
|
||||
memcpy(buf->field_0x4, param_2, param_3);
|
||||
buf->field_0x4 += param_3;
|
||||
} else {
|
||||
memcpy(buf->field_0x4, param_2, temp);
|
||||
memcpy(buf->field_0x8, param_2 + temp, param_3 - temp);
|
||||
buf->field_0x4 = buf->field_0x8 + param_3 - temp;
|
||||
}
|
||||
|
||||
if (buf->field_0xc == (buf->field_0x4 - buf->field_0x8)) {
|
||||
buf->field_0x4 = buf->field_0x8;
|
||||
}
|
||||
|
||||
buf->field_0x14 -= param_3;
|
||||
buf->readBuf += param_3;
|
||||
MWExitCriticalSection(&buf->criticalSection);
|
||||
return 0;
|
||||
}
|
||||
MWEnterCriticalSection(&cb->mCriticalSection);
|
||||
temp = cb->field_0xc - (cb->field_0x4 - cb->field_0x8);
|
||||
if (temp >= size) {
|
||||
memcpy(cb->field_0x4, buf, size);
|
||||
cb->field_0x4 += size;
|
||||
} else {
|
||||
memcpy(cb->field_0x4, buf, temp);
|
||||
memcpy(cb->field_0x8, buf + temp, size - temp);
|
||||
cb->field_0x4 = cb->field_0x8 + size - temp;
|
||||
}
|
||||
|
||||
if (cb->field_0xc == (cb->field_0x4 - cb->field_0x8)) {
|
||||
cb->field_0x4 = cb->field_0x8;
|
||||
}
|
||||
|
||||
cb->mBytesToWrite -= size;
|
||||
cb->mBytesToRead += size;
|
||||
MWExitCriticalSection(&cb->mCriticalSection);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 803728B0-80372900 36D1F0 0050+00 0/0 2/2 0/0 .text CircleBufferInitialize */
|
||||
void CircleBufferInitialize(CircleBuffer* buf, s32 param_2, s32 param_3) {
|
||||
buf->field_0x8 = param_2;
|
||||
buf->field_0xc = param_3;
|
||||
buf->field_0x0 = buf->field_0x8;
|
||||
buf->field_0x4 = buf->field_0x8;
|
||||
buf->readBuf = 0;
|
||||
buf->field_0x14 = buf->field_0xc;
|
||||
MWInitializeCriticalSection(&buf->criticalSection);
|
||||
void CircleBufferInitialize(CircleBuffer* cb, u8* buf, s32 size) {
|
||||
cb->field_0x8 = buf;
|
||||
cb->field_0xc = size;
|
||||
cb->field_0x0 = cb->field_0x8;
|
||||
cb->field_0x4 = cb->field_0x8;
|
||||
cb->mBytesToRead = 0;
|
||||
cb->mBytesToWrite = cb->field_0xc;
|
||||
MWInitializeCriticalSection(&cb->mCriticalSection);
|
||||
}
|
||||
|
||||
/* 80372900-80372908 36D240 0008+00 0/0 2/2 0/0 .text CBGetBytesAvailableForRead */
|
||||
s32 CBGetBytesAvailableForRead(CircleBuffer* buf) {
|
||||
return buf->readBuf;
|
||||
s32 CBGetBytesAvailableForRead(CircleBuffer* cb) {
|
||||
return cb->mBytesToRead;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue