mirror of https://github.com/zeldaret/tp.git
most of TRK done / some misc work (#2030)
* work on d_file_sel_warning * various cleanup * attempt to fix d_gameover * event cleanup * trk work * most of TRK done * remove asm
This commit is contained in:
parent
f342bd7171
commit
4bd825e76c
2
Makefile
2
Makefile
|
|
@ -82,7 +82,7 @@ MAKEREL := tools/makerel.py
|
|||
IMAGENAME := gz2e01.iso
|
||||
|
||||
# Options
|
||||
INCLUDES := -i include -i include/dolphin/ -i src -i libs/PowerPC_EABI_Support/MSL/MSL_C/MSL_Common/Include -i libs/PowerPC_EABI_Support/MSL/MSL_C/MSL_Common_Embedded/Math/Include -i libs/PowerPC_EABI_Support/MSL/MSL_C/PPC_EABI/Include -i libs/PowerPC_EABI_Support/MSL/MSL_C++/MSL_Common/Include -i libs/PowerPC_EABI_Support/Runtime/Inc/
|
||||
INCLUDES := -i include -i include/dolphin/ -i src -i libs/PowerPC_EABI_Support/MSL/MSL_C/MSL_Common/Include -i libs/PowerPC_EABI_Support/MSL/MSL_C/MSL_Common_Embedded/Math/Include -i libs/PowerPC_EABI_Support/MSL/MSL_C/PPC_EABI/Include -i libs/PowerPC_EABI_Support/MSL/MSL_C++/MSL_Common/Include -i libs/PowerPC_EABI_Support/Runtime/Inc/ -i libs/PowerPC_EABI_Support/MetroTRK/
|
||||
|
||||
# Assembler flags
|
||||
ASFLAGS := -mgekko -I include
|
||||
|
|
|
|||
|
|
@ -7,22 +7,22 @@ Section | Percentage | Decompiled (bytes) | Total (bytes)
|
|||
.init | 97.972973% | 9280 | 9472
|
||||
.extab | 100.000000% | 96 | 96
|
||||
.extabindex | 100.000000% | 96 | 96
|
||||
.text | 38.943497% | 1400620 | 3596544
|
||||
.text | 41.046627% | 1476260 | 3596544
|
||||
.ctors | 100.000000% | 448 | 448
|
||||
.dtors | 100.000000% | 32 | 32
|
||||
.rodata | 100.000000% | 193856 | 193856
|
||||
.data | 100.000000% | 197632 | 197632
|
||||
.sdata | 100.000000% | 1408 | 1408
|
||||
.sdata2 | 100.000000% | 20832 | 20832
|
||||
Total | 45.379379% | 1824556 | 4020672
|
||||
Total | 47.260657% | 1900196 | 4020672
|
||||
|
||||
## Total
|
||||
|
||||
Section | Percentage | Decompiled (bytes) | Total (bytes)
|
||||
---|---|---|---
|
||||
main.dol | 45.379379% | 1824556 | 4020672
|
||||
main.dol | 47.260657% | 1900196 | 4020672
|
||||
RELs | 35.420985% | 4073528 | 11500324
|
||||
Total | 38.000680% | 5898084 | 15520996
|
||||
Total | 38.488020% | 5973724 | 15520996
|
||||
|
||||
## RELs
|
||||
|
||||
|
|
|
|||
|
|
@ -1,35 +0,0 @@
|
|||
lbl_80372618:
|
||||
/* 80372618 94 21 FF F0 */ stwu r1, -0x10(r1)
|
||||
/* 8037261C 7C 08 02 A6 */ mflr r0
|
||||
/* 80372620 3C A0 80 3A */ lis r5, lit_349@ha /* 0x803A2DC4@ha */
|
||||
/* 80372624 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 80372628 38 05 2D C4 */ addi r0, r5, lit_349@l /* 0x803A2DC4@l */
|
||||
/* 8037262C 93 E1 00 0C */ stw r31, 0xc(r1)
|
||||
/* 80372630 7C 9F 23 78 */ mr r31, r4
|
||||
/* 80372634 7C 04 03 78 */ mr r4, r0
|
||||
/* 80372638 93 C1 00 08 */ stw r30, 8(r1)
|
||||
/* 8037263C 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 80372640 38 60 00 01 */ li r3, 1
|
||||
/* 80372644 4C C6 31 82 */ crclr 6
|
||||
/* 80372648 48 00 06 0D */ bl MWTRACE
|
||||
/* 8037264C 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80372650 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80372654 48 00 06 A9 */ bl EXI2_Init
|
||||
/* 80372658 3C 80 80 3A */ lis r4, lit_350@ha /* 0x803A2DD8@ha */
|
||||
/* 8037265C 38 60 00 01 */ li r3, 1
|
||||
/* 80372660 38 84 2D D8 */ addi r4, r4, lit_350@l /* 0x803A2DD8@l */
|
||||
/* 80372664 4C C6 31 82 */ crclr 6
|
||||
/* 80372668 48 00 05 ED */ bl MWTRACE
|
||||
/* 8037266C 3C 60 80 45 */ lis r3, gRecvCB@ha /* 0x80450030@ha */
|
||||
/* 80372670 3C 80 80 45 */ lis r4, gRecvBuf@ha /* 0x8044F830@ha */
|
||||
/* 80372674 38 63 00 30 */ addi r3, r3, gRecvCB@l /* 0x80450030@l */
|
||||
/* 80372678 38 A0 08 00 */ li r5, 0x800
|
||||
/* 8037267C 38 84 F8 30 */ addi r4, r4, gRecvBuf@l /* 0x8044F830@l */
|
||||
/* 80372680 48 00 02 31 */ bl CircleBufferInitialize
|
||||
/* 80372684 80 01 00 14 */ lwz r0, 0x14(r1)
|
||||
/* 80372688 38 60 00 00 */ li r3, 0
|
||||
/* 8037268C 83 E1 00 0C */ lwz r31, 0xc(r1)
|
||||
/* 80372690 83 C1 00 08 */ lwz r30, 8(r1)
|
||||
/* 80372694 7C 08 03 A6 */ mtlr r0
|
||||
/* 80372698 38 21 00 10 */ addi r1, r1, 0x10
|
||||
/* 8037269C 4E 80 00 20 */ blr
|
||||
|
|
@ -1,33 +0,0 @@
|
|||
lbl_80372380:
|
||||
/* 80372380 94 21 F7 F0 */ stwu r1, -0x810(r1)
|
||||
/* 80372384 7C 08 02 A6 */ mflr r0
|
||||
/* 80372388 90 01 08 14 */ stw r0, 0x814(r1)
|
||||
/* 8037238C 93 E1 08 0C */ stw r31, 0x80c(r1)
|
||||
/* 80372390 48 00 09 75 */ bl EXI2_Poll
|
||||
/* 80372394 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 80372398 41 81 00 0C */ bgt lbl_803723A4
|
||||
/* 8037239C 38 60 00 00 */ li r3, 0
|
||||
/* 803723A0 48 00 00 3C */ b lbl_803723DC
|
||||
lbl_803723A4:
|
||||
/* 803723A4 7F E4 FB 78 */ mr r4, r31
|
||||
/* 803723A8 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 803723AC 48 00 09 61 */ bl EXI2_ReadN
|
||||
/* 803723B0 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 803723B4 40 82 00 1C */ bne lbl_803723D0
|
||||
/* 803723B8 3C 60 80 45 */ lis r3, gRecvCB@ha /* 0x80450030@ha */
|
||||
/* 803723BC 7F E5 FB 78 */ mr r5, r31
|
||||
/* 803723C0 38 63 00 30 */ addi r3, r3, gRecvCB@l /* 0x80450030@l */
|
||||
/* 803723C4 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 803723C8 48 00 03 E1 */ bl CircleBufferWriteBytes
|
||||
/* 803723CC 48 00 00 0C */ b lbl_803723D8
|
||||
lbl_803723D0:
|
||||
/* 803723D0 38 60 D8 E7 */ li r3, -10009
|
||||
/* 803723D4 48 00 00 08 */ b lbl_803723DC
|
||||
lbl_803723D8:
|
||||
/* 803723D8 7F E3 FB 78 */ mr r3, r31
|
||||
lbl_803723DC:
|
||||
/* 803723DC 80 01 08 14 */ lwz r0, 0x814(r1)
|
||||
/* 803723E0 83 E1 08 0C */ lwz r31, 0x80c(r1)
|
||||
/* 803723E4 7C 08 03 A6 */ mtlr r0
|
||||
/* 803723E8 38 21 08 10 */ addi r1, r1, 0x810
|
||||
/* 803723EC 4E 80 00 20 */ blr
|
||||
|
|
@ -1,66 +0,0 @@
|
|||
lbl_803724F8:
|
||||
/* 803724F8 94 21 F7 E0 */ stwu r1, -0x820(r1)
|
||||
/* 803724FC 7C 08 02 A6 */ mflr r0
|
||||
/* 80372500 90 01 08 24 */ stw r0, 0x824(r1)
|
||||
/* 80372504 BF 61 08 0C */ stmw r27, 0x80c(r1)
|
||||
/* 80372508 7C 7B 1B 78 */ mr r27, r3
|
||||
/* 8037250C 7C 9E 23 78 */ mr r30, r4
|
||||
/* 80372510 3B A0 00 00 */ li r29, 0
|
||||
/* 80372514 80 0D 94 40 */ lwz r0, gIsInitialized(r13)
|
||||
/* 80372518 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 8037251C 40 82 00 0C */ bne lbl_80372528
|
||||
/* 80372520 38 60 D8 EF */ li r3, -10001
|
||||
/* 80372524 48 00 00 AC */ b lbl_803725D0
|
||||
lbl_80372528:
|
||||
/* 80372528 3C 60 80 3A */ lis r3, lit_342@ha /* 0x803A2D6C@ha */
|
||||
/* 8037252C 7F C5 F3 78 */ mr r5, r30
|
||||
/* 80372530 38 83 2D 6C */ addi r4, r3, lit_342@l /* 0x803A2D6C@l */
|
||||
/* 80372534 7F C6 F3 78 */ mr r6, r30
|
||||
/* 80372538 38 60 00 01 */ li r3, 1
|
||||
/* 8037253C 4C C6 31 82 */ crclr 6
|
||||
/* 80372540 48 00 07 15 */ bl MWTRACE
|
||||
/* 80372544 3C 60 80 45 */ lis r3, gRecvCB@ha /* 0x80450030@ha */
|
||||
/* 80372548 3B E3 00 30 */ addi r31, r3, gRecvCB@l /* 0x80450030@l */
|
||||
/* 8037254C 48 00 00 38 */ b lbl_80372584
|
||||
lbl_80372550:
|
||||
/* 80372550 3B A0 00 00 */ li r29, 0
|
||||
/* 80372554 48 00 07 B1 */ bl EXI2_Poll
|
||||
/* 80372558 7C 7C 1B 79 */ or. r28, r3, r3
|
||||
/* 8037255C 41 82 00 28 */ beq lbl_80372584
|
||||
/* 80372560 7F 84 E3 78 */ mr r4, r28
|
||||
/* 80372564 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 80372568 48 00 07 A5 */ bl EXI2_ReadN
|
||||
/* 8037256C 7C 7D 1B 79 */ or. r29, r3, r3
|
||||
/* 80372570 40 82 00 14 */ bne lbl_80372584
|
||||
/* 80372574 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80372578 7F 85 E3 78 */ mr r5, r28
|
||||
/* 8037257C 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 80372580 48 00 02 29 */ bl CircleBufferWriteBytes
|
||||
lbl_80372584:
|
||||
/* 80372584 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80372588 48 00 03 79 */ bl CBGetBytesAvailableForRead
|
||||
/* 8037258C 7C 03 F0 40 */ cmplw r3, r30
|
||||
/* 80372590 41 80 FF C0 */ blt lbl_80372550
|
||||
/* 80372594 28 1D 00 00 */ cmplwi r29, 0
|
||||
/* 80372598 40 82 00 1C */ bne lbl_803725B4
|
||||
/* 8037259C 3C 60 80 45 */ lis r3, gRecvCB@ha /* 0x80450030@ha */
|
||||
/* 803725A0 7F 64 DB 78 */ mr r4, r27
|
||||
/* 803725A4 38 63 00 30 */ addi r3, r3, gRecvCB@l /* 0x80450030@l */
|
||||
/* 803725A8 7F C5 F3 78 */ mr r5, r30
|
||||
/* 803725AC 48 00 00 F5 */ bl CircleBufferReadBytes
|
||||
/* 803725B0 48 00 00 1C */ b lbl_803725CC
|
||||
lbl_803725B4:
|
||||
/* 803725B4 3C 60 80 3A */ lis r3, lit_343@ha /* 0x803A2D94@ha */
|
||||
/* 803725B8 7F A5 EB 78 */ mr r5, r29
|
||||
/* 803725BC 38 83 2D 94 */ addi r4, r3, lit_343@l /* 0x803A2D94@l */
|
||||
/* 803725C0 38 60 00 08 */ li r3, 8
|
||||
/* 803725C4 4C C6 31 82 */ crclr 6
|
||||
/* 803725C8 48 00 06 8D */ bl MWTRACE
|
||||
lbl_803725CC:
|
||||
/* 803725CC 7F A3 EB 78 */ mr r3, r29
|
||||
lbl_803725D0:
|
||||
/* 803725D0 BB 61 08 0C */ lmw r27, 0x80c(r1)
|
||||
/* 803725D4 80 01 08 24 */ lwz r0, 0x824(r1)
|
||||
/* 803725D8 7C 08 03 A6 */ mtlr r0
|
||||
/* 803725DC 38 21 08 20 */ addi r1, r1, 0x820
|
||||
/* 803725E0 4E 80 00 20 */ blr
|
||||
|
|
@ -1,54 +0,0 @@
|
|||
lbl_80372438:
|
||||
/* 80372438 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 8037243C 7C 08 02 A6 */ mflr r0
|
||||
/* 80372440 3C A0 80 3A */ lis r5, lit_318@ha /* 0x803A2D10@ha */
|
||||
/* 80372444 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 80372448 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 8037244C 3B E5 2D 10 */ addi r31, r5, lit_318@l /* 0x803A2D10@l */
|
||||
/* 80372450 93 C1 00 18 */ stw r30, 0x18(r1)
|
||||
/* 80372454 7C 9E 23 78 */ mr r30, r4
|
||||
/* 80372458 93 A1 00 14 */ stw r29, 0x14(r1)
|
||||
/* 8037245C 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 80372460 80 0D 94 40 */ lwz r0, gIsInitialized(r13)
|
||||
/* 80372464 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 80372468 40 82 00 1C */ bne lbl_80372484
|
||||
/* 8037246C 38 9F 00 00 */ addi r4, r31, 0
|
||||
/* 80372470 38 60 00 08 */ li r3, 8
|
||||
/* 80372474 4C C6 31 82 */ crclr 6
|
||||
/* 80372478 48 00 07 DD */ bl MWTRACE
|
||||
/* 8037247C 38 60 D8 EF */ li r3, -10001
|
||||
/* 80372480 48 00 00 5C */ b lbl_803724DC
|
||||
lbl_80372484:
|
||||
/* 80372484 7C 65 1B 78 */ mr r5, r3
|
||||
/* 80372488 7C 86 23 78 */ mr r6, r4
|
||||
/* 8037248C 38 9F 00 14 */ addi r4, r31, 0x14
|
||||
/* 80372490 38 60 00 08 */ li r3, 8
|
||||
/* 80372494 4C C6 31 82 */ crclr 6
|
||||
/* 80372498 48 00 07 BD */ bl MWTRACE
|
||||
/* 8037249C 48 00 00 34 */ b lbl_803724D0
|
||||
lbl_803724A0:
|
||||
/* 803724A0 7F C5 F3 78 */ mr r5, r30
|
||||
/* 803724A4 38 9F 00 40 */ addi r4, r31, 0x40
|
||||
/* 803724A8 38 60 00 01 */ li r3, 1
|
||||
/* 803724AC 4C C6 31 82 */ crclr 6
|
||||
/* 803724B0 48 00 07 A5 */ bl MWTRACE
|
||||
/* 803724B4 7F A3 EB 78 */ mr r3, r29
|
||||
/* 803724B8 7F C4 F3 78 */ mr r4, r30
|
||||
/* 803724BC 48 00 08 59 */ bl EXI2_WriteN
|
||||
/* 803724C0 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 803724C4 41 82 00 14 */ beq lbl_803724D8
|
||||
/* 803724C8 7F BD 1A 14 */ add r29, r29, r3
|
||||
/* 803724CC 7F C3 F0 50 */ subf r30, r3, r30
|
||||
lbl_803724D0:
|
||||
/* 803724D0 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 803724D4 41 81 FF CC */ bgt lbl_803724A0
|
||||
lbl_803724D8:
|
||||
/* 803724D8 38 60 00 00 */ li r3, 0
|
||||
lbl_803724DC:
|
||||
/* 803724DC 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 803724E0 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 803724E4 83 C1 00 18 */ lwz r30, 0x18(r1)
|
||||
/* 803724E8 83 A1 00 14 */ lwz r29, 0x14(r1)
|
||||
/* 803724EC 7C 08 03 A6 */ mtlr r0
|
||||
/* 803724F0 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 803724F4 4E 80 00 20 */ blr
|
||||
|
|
@ -1,35 +0,0 @@
|
|||
lbl_80372BCC:
|
||||
/* 80372BCC 94 21 FF F0 */ stwu r1, -0x10(r1)
|
||||
/* 80372BD0 7C 08 02 A6 */ mflr r0
|
||||
/* 80372BD4 3C A0 80 3A */ lis r5, lit_348@ha /* 0x803A2EA4@ha */
|
||||
/* 80372BD8 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 80372BDC 38 05 2E A4 */ addi r0, r5, lit_348@l /* 0x803A2EA4@l */
|
||||
/* 80372BE0 93 E1 00 0C */ stw r31, 0xc(r1)
|
||||
/* 80372BE4 7C 9F 23 78 */ mr r31, r4
|
||||
/* 80372BE8 7C 04 03 78 */ mr r4, r0
|
||||
/* 80372BEC 93 C1 00 08 */ stw r30, 8(r1)
|
||||
/* 80372BF0 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 80372BF4 38 60 00 01 */ li r3, 1
|
||||
/* 80372BF8 4C C6 31 82 */ crclr 6
|
||||
/* 80372BFC 48 00 00 59 */ bl MWTRACE
|
||||
/* 80372C00 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80372C04 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80372C08 48 00 05 09 */ bl DBInitComm
|
||||
/* 80372C0C 3C 80 80 3A */ lis r4, lit_349@ha /* 0x803A2EB8@ha */
|
||||
/* 80372C10 38 60 00 01 */ li r3, 1
|
||||
/* 80372C14 38 84 2E B8 */ addi r4, r4, lit_349@l /* 0x803A2EB8@l */
|
||||
/* 80372C18 4C C6 31 82 */ crclr 6
|
||||
/* 80372C1C 48 00 00 39 */ bl MWTRACE
|
||||
/* 80372C20 3C 60 80 45 */ lis r3, gRecvCB@ha /* 0x80450550@ha */
|
||||
/* 80372C24 3C 80 80 45 */ lis r4, gRecvBuf@ha /* 0x80450050@ha */
|
||||
/* 80372C28 38 63 05 50 */ addi r3, r3, gRecvCB@l /* 0x80450550@l */
|
||||
/* 80372C2C 38 A0 05 00 */ li r5, 0x500
|
||||
/* 80372C30 38 84 00 50 */ addi r4, r4, gRecvBuf@l /* 0x80450050@l */
|
||||
/* 80372C34 4B FF FC 7D */ bl CircleBufferInitialize
|
||||
/* 80372C38 80 01 00 14 */ lwz r0, 0x14(r1)
|
||||
/* 80372C3C 38 60 00 00 */ li r3, 0
|
||||
/* 80372C40 83 E1 00 0C */ lwz r31, 0xc(r1)
|
||||
/* 80372C44 83 C1 00 08 */ lwz r30, 8(r1)
|
||||
/* 80372C48 7C 08 03 A6 */ mtlr r0
|
||||
/* 80372C4C 38 21 00 10 */ addi r1, r1, 0x10
|
||||
/* 80372C50 4E 80 00 20 */ blr
|
||||
|
|
@ -1,33 +0,0 @@
|
|||
lbl_8037292C:
|
||||
/* 8037292C 94 21 FA F0 */ stwu r1, -0x510(r1)
|
||||
/* 80372930 7C 08 02 A6 */ mflr r0
|
||||
/* 80372934 90 01 05 14 */ stw r0, 0x514(r1)
|
||||
/* 80372938 93 E1 05 0C */ stw r31, 0x50c(r1)
|
||||
/* 8037293C 48 00 06 E5 */ bl DBQueryData
|
||||
/* 80372940 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 80372944 41 81 00 0C */ bgt lbl_80372950
|
||||
/* 80372948 38 60 00 00 */ li r3, 0
|
||||
/* 8037294C 48 00 00 3C */ b lbl_80372988
|
||||
lbl_80372950:
|
||||
/* 80372950 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80372954 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 80372958 48 00 06 3D */ bl DBRead
|
||||
/* 8037295C 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80372960 40 82 00 1C */ bne lbl_8037297C
|
||||
/* 80372964 3C 60 80 45 */ lis r3, gRecvCB@ha /* 0x80450550@ha */
|
||||
/* 80372968 7F E5 FB 78 */ mr r5, r31
|
||||
/* 8037296C 38 63 05 50 */ addi r3, r3, gRecvCB@l /* 0x80450550@l */
|
||||
/* 80372970 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 80372974 4B FF FE 35 */ bl CircleBufferWriteBytes
|
||||
/* 80372978 48 00 00 0C */ b lbl_80372984
|
||||
lbl_8037297C:
|
||||
/* 8037297C 38 60 D8 E7 */ li r3, -10009
|
||||
/* 80372980 48 00 00 08 */ b lbl_80372988
|
||||
lbl_80372984:
|
||||
/* 80372984 7F E3 FB 78 */ mr r3, r31
|
||||
lbl_80372988:
|
||||
/* 80372988 80 01 05 14 */ lwz r0, 0x514(r1)
|
||||
/* 8037298C 83 E1 05 0C */ lwz r31, 0x50c(r1)
|
||||
/* 80372990 7C 08 03 A6 */ mtlr r0
|
||||
/* 80372994 38 21 05 10 */ addi r1, r1, 0x510
|
||||
/* 80372998 4E 80 00 20 */ blr
|
||||
|
|
@ -1,68 +0,0 @@
|
|||
lbl_80372AA4:
|
||||
/* 80372AA4 94 21 FA E0 */ stwu r1, -0x520(r1)
|
||||
/* 80372AA8 7C 08 02 A6 */ mflr r0
|
||||
/* 80372AAC 90 01 05 24 */ stw r0, 0x524(r1)
|
||||
/* 80372AB0 BF 41 05 08 */ stmw r26, 0x508(r1)
|
||||
/* 80372AB4 7C 7A 1B 78 */ mr r26, r3
|
||||
/* 80372AB8 7C 9B 23 78 */ mr r27, r4
|
||||
/* 80372ABC 3B 80 00 00 */ li r28, 0
|
||||
/* 80372AC0 80 0D 94 48 */ lwz r0, gIsInitialized(r13)
|
||||
/* 80372AC4 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 80372AC8 40 82 00 0C */ bne lbl_80372AD4
|
||||
/* 80372ACC 38 60 D8 EF */ li r3, -10001
|
||||
/* 80372AD0 48 00 00 B4 */ b lbl_80372B84
|
||||
lbl_80372AD4:
|
||||
/* 80372AD4 3C 60 80 3A */ lis r3, lit_341@ha /* 0x803A2E4C@ha */
|
||||
/* 80372AD8 7F 65 DB 78 */ mr r5, r27
|
||||
/* 80372ADC 38 83 2E 4C */ addi r4, r3, lit_341@l /* 0x803A2E4C@l */
|
||||
/* 80372AE0 7F 66 DB 78 */ mr r6, r27
|
||||
/* 80372AE4 38 60 00 01 */ li r3, 1
|
||||
/* 80372AE8 4C C6 31 82 */ crclr 6
|
||||
/* 80372AEC 48 00 01 69 */ bl MWTRACE
|
||||
/* 80372AF0 3C 60 80 45 */ lis r3, gRecvCB@ha /* 0x80450550@ha */
|
||||
/* 80372AF4 7F 7D DB 78 */ mr r29, r27
|
||||
/* 80372AF8 3B E3 05 50 */ addi r31, r3, gRecvCB@l /* 0x80450550@l */
|
||||
/* 80372AFC 7F 7E DB 78 */ mr r30, r27
|
||||
/* 80372B00 48 00 00 38 */ b lbl_80372B38
|
||||
lbl_80372B04:
|
||||
/* 80372B04 3B 80 00 00 */ li r28, 0
|
||||
/* 80372B08 48 00 05 19 */ bl DBQueryData
|
||||
/* 80372B0C 7C 7B 1B 79 */ or. r27, r3, r3
|
||||
/* 80372B10 41 82 00 28 */ beq lbl_80372B38
|
||||
/* 80372B14 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80372B18 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 80372B1C 48 00 04 79 */ bl DBRead
|
||||
/* 80372B20 7C 7C 1B 79 */ or. r28, r3, r3
|
||||
/* 80372B24 40 82 00 14 */ bne lbl_80372B38
|
||||
/* 80372B28 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80372B2C 7F 65 DB 78 */ mr r5, r27
|
||||
/* 80372B30 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 80372B34 4B FF FC 75 */ bl CircleBufferWriteBytes
|
||||
lbl_80372B38:
|
||||
/* 80372B38 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80372B3C 4B FF FD C5 */ bl CBGetBytesAvailableForRead
|
||||
/* 80372B40 7C 03 F0 40 */ cmplw r3, r30
|
||||
/* 80372B44 41 80 FF C0 */ blt lbl_80372B04
|
||||
/* 80372B48 28 1C 00 00 */ cmplwi r28, 0
|
||||
/* 80372B4C 40 82 00 1C */ bne lbl_80372B68
|
||||
/* 80372B50 3C 60 80 45 */ lis r3, gRecvCB@ha /* 0x80450550@ha */
|
||||
/* 80372B54 7F 44 D3 78 */ mr r4, r26
|
||||
/* 80372B58 38 63 05 50 */ addi r3, r3, gRecvCB@l /* 0x80450550@l */
|
||||
/* 80372B5C 7F A5 EB 78 */ mr r5, r29
|
||||
/* 80372B60 4B FF FB 41 */ bl CircleBufferReadBytes
|
||||
/* 80372B64 48 00 00 1C */ b lbl_80372B80
|
||||
lbl_80372B68:
|
||||
/* 80372B68 3C 60 80 3A */ lis r3, lit_342@ha /* 0x803A2E74@ha */
|
||||
/* 80372B6C 7F 85 E3 78 */ mr r5, r28
|
||||
/* 80372B70 38 83 2E 74 */ addi r4, r3, lit_342@l /* 0x803A2E74@l */
|
||||
/* 80372B74 38 60 00 08 */ li r3, 8
|
||||
/* 80372B78 4C C6 31 82 */ crclr 6
|
||||
/* 80372B7C 48 00 00 D9 */ bl MWTRACE
|
||||
lbl_80372B80:
|
||||
/* 80372B80 7F 83 E3 78 */ mr r3, r28
|
||||
lbl_80372B84:
|
||||
/* 80372B84 BB 41 05 08 */ lmw r26, 0x508(r1)
|
||||
/* 80372B88 80 01 05 24 */ lwz r0, 0x524(r1)
|
||||
/* 80372B8C 7C 08 03 A6 */ mtlr r0
|
||||
/* 80372B90 38 21 05 20 */ addi r1, r1, 0x520
|
||||
/* 80372B94 4E 80 00 20 */ blr
|
||||
|
|
@ -1,54 +0,0 @@
|
|||
lbl_803729E4:
|
||||
/* 803729E4 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 803729E8 7C 08 02 A6 */ mflr r0
|
||||
/* 803729EC 3C A0 80 3A */ lis r5, lit_318@ha /* 0x803A2DF0@ha */
|
||||
/* 803729F0 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 803729F4 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 803729F8 3B E5 2D F0 */ addi r31, r5, lit_318@l /* 0x803A2DF0@l */
|
||||
/* 803729FC 93 C1 00 18 */ stw r30, 0x18(r1)
|
||||
/* 80372A00 7C 9E 23 78 */ mr r30, r4
|
||||
/* 80372A04 93 A1 00 14 */ stw r29, 0x14(r1)
|
||||
/* 80372A08 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 80372A0C 80 0D 94 48 */ lwz r0, gIsInitialized(r13)
|
||||
/* 80372A10 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 80372A14 40 82 00 1C */ bne lbl_80372A30
|
||||
/* 80372A18 38 9F 00 00 */ addi r4, r31, 0
|
||||
/* 80372A1C 38 60 00 08 */ li r3, 8
|
||||
/* 80372A20 4C C6 31 82 */ crclr 6
|
||||
/* 80372A24 48 00 02 31 */ bl MWTRACE
|
||||
/* 80372A28 38 60 D8 EF */ li r3, -10001
|
||||
/* 80372A2C 48 00 00 5C */ b lbl_80372A88
|
||||
lbl_80372A30:
|
||||
/* 80372A30 7C 65 1B 78 */ mr r5, r3
|
||||
/* 80372A34 7C 86 23 78 */ mr r6, r4
|
||||
/* 80372A38 38 9F 00 14 */ addi r4, r31, 0x14
|
||||
/* 80372A3C 38 60 00 08 */ li r3, 8
|
||||
/* 80372A40 4C C6 31 82 */ crclr 6
|
||||
/* 80372A44 48 00 02 11 */ bl MWTRACE
|
||||
/* 80372A48 48 00 00 34 */ b lbl_80372A7C
|
||||
lbl_80372A4C:
|
||||
/* 80372A4C 7F C5 F3 78 */ mr r5, r30
|
||||
/* 80372A50 38 9F 00 40 */ addi r4, r31, 0x40
|
||||
/* 80372A54 38 60 00 01 */ li r3, 1
|
||||
/* 80372A58 4C C6 31 82 */ crclr 6
|
||||
/* 80372A5C 48 00 01 F9 */ bl MWTRACE
|
||||
/* 80372A60 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80372A64 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80372A68 48 00 02 CD */ bl DBWrite
|
||||
/* 80372A6C 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80372A70 41 82 00 14 */ beq lbl_80372A84
|
||||
/* 80372A74 7F BD 1A 14 */ add r29, r29, r3
|
||||
/* 80372A78 7F C3 F0 50 */ subf r30, r3, r30
|
||||
lbl_80372A7C:
|
||||
/* 80372A7C 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 80372A80 41 81 FF CC */ bgt lbl_80372A4C
|
||||
lbl_80372A84:
|
||||
/* 80372A84 38 60 00 00 */ li r3, 0
|
||||
lbl_80372A88:
|
||||
/* 80372A88 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 80372A8C 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 80372A90 83 C1 00 18 */ lwz r30, 0x18(r1)
|
||||
/* 80372A94 83 A1 00 14 */ lwz r29, 0x14(r1)
|
||||
/* 80372A98 7C 08 03 A6 */ mtlr r0
|
||||
/* 80372A9C 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 80372AA0 4E 80 00 20 */ blr
|
||||
|
|
@ -1,55 +0,0 @@
|
|||
lbl_8037219C:
|
||||
/* 8037219C 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 803721A0 7C 08 02 A6 */ mflr r0
|
||||
/* 803721A4 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 803721A8 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 803721AC 7C BF 2B 78 */ mr r31, r5
|
||||
/* 803721B0 93 C1 00 18 */ stw r30, 0x18(r1)
|
||||
/* 803721B4 7C 9E 23 78 */ mr r30, r4
|
||||
/* 803721B8 4B FF FF C9 */ bl GetUseSerialIO
|
||||
/* 803721BC 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
||||
/* 803721C0 40 82 00 0C */ bne lbl_803721CC
|
||||
/* 803721C4 38 60 00 01 */ li r3, 1
|
||||
/* 803721C8 48 00 00 78 */ b lbl_80372240
|
||||
lbl_803721CC:
|
||||
/* 803721CC 4B FF CB 01 */ bl GetTRKConnected
|
||||
/* 803721D0 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 803721D4 40 82 00 0C */ bne lbl_803721E0
|
||||
/* 803721D8 38 60 00 01 */ li r3, 1
|
||||
/* 803721DC 48 00 00 64 */ b lbl_80372240
|
||||
lbl_803721E0:
|
||||
/* 803721E0 80 1F 00 00 */ lwz r0, 0(r31)
|
||||
/* 803721E4 7F C6 F3 78 */ mr r6, r30
|
||||
/* 803721E8 38 A1 00 08 */ addi r5, r1, 8
|
||||
/* 803721EC 38 60 00 D0 */ li r3, 0xd0
|
||||
/* 803721F0 90 01 00 08 */ stw r0, 8(r1)
|
||||
/* 803721F4 38 80 00 01 */ li r4, 1
|
||||
/* 803721F8 4B FF EF D9 */ bl TRKAccessFile
|
||||
/* 803721FC 54 60 06 3E */ clrlwi r0, r3, 0x18
|
||||
/* 80372200 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 80372204 2C 00 00 01 */ cmpwi r0, 1
|
||||
/* 80372208 90 7F 00 00 */ stw r3, 0(r31)
|
||||
/* 8037220C 41 82 00 30 */ beq lbl_8037223C
|
||||
/* 80372210 40 80 00 10 */ bge lbl_80372220
|
||||
/* 80372214 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 80372218 40 80 00 14 */ bge lbl_8037222C
|
||||
/* 8037221C 48 00 00 20 */ b lbl_8037223C
|
||||
lbl_80372220:
|
||||
/* 80372220 2C 00 00 03 */ cmpwi r0, 3
|
||||
/* 80372224 40 80 00 18 */ bge lbl_8037223C
|
||||
/* 80372228 48 00 00 0C */ b lbl_80372234
|
||||
lbl_8037222C:
|
||||
/* 8037222C 38 60 00 00 */ li r3, 0
|
||||
/* 80372230 48 00 00 10 */ b lbl_80372240
|
||||
lbl_80372234:
|
||||
/* 80372234 38 60 00 02 */ li r3, 2
|
||||
/* 80372238 48 00 00 08 */ b lbl_80372240
|
||||
lbl_8037223C:
|
||||
/* 8037223C 38 60 00 01 */ li r3, 1
|
||||
lbl_80372240:
|
||||
/* 80372240 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 80372244 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 80372248 83 C1 00 18 */ lwz r30, 0x18(r1)
|
||||
/* 8037224C 7C 08 03 A6 */ mtlr r0
|
||||
/* 80372250 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 80372254 4E 80 00 20 */ blr
|
||||
|
|
@ -1,55 +0,0 @@
|
|||
lbl_80372258:
|
||||
/* 80372258 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 8037225C 7C 08 02 A6 */ mflr r0
|
||||
/* 80372260 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 80372264 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 80372268 7C BF 2B 78 */ mr r31, r5
|
||||
/* 8037226C 93 C1 00 18 */ stw r30, 0x18(r1)
|
||||
/* 80372270 7C 9E 23 78 */ mr r30, r4
|
||||
/* 80372274 4B FF FF 0D */ bl GetUseSerialIO
|
||||
/* 80372278 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
||||
/* 8037227C 40 82 00 0C */ bne lbl_80372288
|
||||
/* 80372280 38 60 00 01 */ li r3, 1
|
||||
/* 80372284 48 00 00 78 */ b lbl_803722FC
|
||||
lbl_80372288:
|
||||
/* 80372288 4B FF CA 45 */ bl GetTRKConnected
|
||||
/* 8037228C 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80372290 40 82 00 0C */ bne lbl_8037229C
|
||||
/* 80372294 38 60 00 01 */ li r3, 1
|
||||
/* 80372298 48 00 00 64 */ b lbl_803722FC
|
||||
lbl_8037229C:
|
||||
/* 8037229C 80 1F 00 00 */ lwz r0, 0(r31)
|
||||
/* 803722A0 7F C6 F3 78 */ mr r6, r30
|
||||
/* 803722A4 38 A1 00 08 */ addi r5, r1, 8
|
||||
/* 803722A8 38 60 00 D1 */ li r3, 0xd1
|
||||
/* 803722AC 90 01 00 08 */ stw r0, 8(r1)
|
||||
/* 803722B0 38 80 00 00 */ li r4, 0
|
||||
/* 803722B4 4B FF EF 1D */ bl TRKAccessFile
|
||||
/* 803722B8 54 60 06 3E */ clrlwi r0, r3, 0x18
|
||||
/* 803722BC 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 803722C0 2C 00 00 01 */ cmpwi r0, 1
|
||||
/* 803722C4 90 7F 00 00 */ stw r3, 0(r31)
|
||||
/* 803722C8 41 82 00 30 */ beq lbl_803722F8
|
||||
/* 803722CC 40 80 00 10 */ bge lbl_803722DC
|
||||
/* 803722D0 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 803722D4 40 80 00 14 */ bge lbl_803722E8
|
||||
/* 803722D8 48 00 00 20 */ b lbl_803722F8
|
||||
lbl_803722DC:
|
||||
/* 803722DC 2C 00 00 03 */ cmpwi r0, 3
|
||||
/* 803722E0 40 80 00 18 */ bge lbl_803722F8
|
||||
/* 803722E4 48 00 00 0C */ b lbl_803722F0
|
||||
lbl_803722E8:
|
||||
/* 803722E8 38 60 00 00 */ li r3, 0
|
||||
/* 803722EC 48 00 00 10 */ b lbl_803722FC
|
||||
lbl_803722F0:
|
||||
/* 803722F0 38 60 00 02 */ li r3, 2
|
||||
/* 803722F4 48 00 00 08 */ b lbl_803722FC
|
||||
lbl_803722F8:
|
||||
/* 803722F8 38 60 00 01 */ li r3, 1
|
||||
lbl_803722FC:
|
||||
/* 803722FC 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 80372300 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 80372304 83 C1 00 18 */ lwz r30, 0x18(r1)
|
||||
/* 80372308 7C 08 03 A6 */ mtlr r0
|
||||
/* 8037230C 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 80372310 4E 80 00 20 */ blr
|
||||
|
|
@ -1,75 +0,0 @@
|
|||
lbl_8036CB20:
|
||||
/* 8036CB20 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 8036CB24 7C 08 02 A6 */ mflr r0
|
||||
/* 8036CB28 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8036CB2C 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 8036CB30 3B E0 00 00 */ li r31, 0
|
||||
/* 8036CB34 93 C1 00 18 */ stw r30, 0x18(r1)
|
||||
/* 8036CB38 3B C0 00 00 */ li r30, 0
|
||||
/* 8036CB3C 48 00 00 BC */ b lbl_8036CBF8
|
||||
lbl_8036CB40:
|
||||
/* 8036CB40 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036CB44 48 00 01 F1 */ bl TRKGetNextEvent
|
||||
/* 8036CB48 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8036CB4C 41 82 00 6C */ beq lbl_8036CBB8
|
||||
/* 8036CB50 80 01 00 08 */ lwz r0, 8(r1)
|
||||
/* 8036CB54 3B C0 00 00 */ li r30, 0
|
||||
/* 8036CB58 2C 00 00 02 */ cmpwi r0, 2
|
||||
/* 8036CB5C 41 82 00 28 */ beq lbl_8036CB84
|
||||
/* 8036CB60 40 80 00 14 */ bge lbl_8036CB74
|
||||
/* 8036CB64 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 8036CB68 41 82 00 44 */ beq lbl_8036CBAC
|
||||
/* 8036CB6C 40 80 00 28 */ bge lbl_8036CB94
|
||||
/* 8036CB70 48 00 00 3C */ b lbl_8036CBAC
|
||||
lbl_8036CB74:
|
||||
/* 8036CB74 2C 00 00 05 */ cmpwi r0, 5
|
||||
/* 8036CB78 41 82 00 30 */ beq lbl_8036CBA8
|
||||
/* 8036CB7C 40 80 00 30 */ bge lbl_8036CBAC
|
||||
/* 8036CB80 48 00 00 1C */ b lbl_8036CB9C
|
||||
lbl_8036CB84:
|
||||
/* 8036CB84 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036CB88 48 00 0B 69 */ bl TRKGetBuffer
|
||||
/* 8036CB8C 48 00 10 11 */ bl TRKDispatchMessage
|
||||
/* 8036CB90 48 00 00 1C */ b lbl_8036CBAC
|
||||
lbl_8036CB94:
|
||||
/* 8036CB94 3B E0 00 01 */ li r31, 1
|
||||
/* 8036CB98 48 00 00 14 */ b lbl_8036CBAC
|
||||
lbl_8036CB9C:
|
||||
/* 8036CB9C 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036CBA0 48 00 34 05 */ bl TRKTargetInterrupt
|
||||
/* 8036CBA4 48 00 00 08 */ b lbl_8036CBAC
|
||||
lbl_8036CBA8:
|
||||
/* 8036CBA8 48 00 2F 79 */ bl TRKTargetSupportRequest
|
||||
lbl_8036CBAC:
|
||||
/* 8036CBAC 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036CBB0 48 00 00 69 */ bl TRKDestructEvent
|
||||
/* 8036CBB4 48 00 00 44 */ b lbl_8036CBF8
|
||||
lbl_8036CBB8:
|
||||
/* 8036CBB8 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036CBBC 41 82 00 1C */ beq lbl_8036CBD8
|
||||
/* 8036CBC0 3C 60 80 45 */ lis r3, gTRKInputPendingPtr@ha /* 0x804519B8@ha */
|
||||
/* 8036CBC4 38 63 19 B8 */ addi r3, r3, gTRKInputPendingPtr@l /* 0x804519B8@l */
|
||||
/* 8036CBC8 80 63 00 00 */ lwz r3, 0(r3)
|
||||
/* 8036CBCC 88 03 00 00 */ lbz r0, 0(r3)
|
||||
/* 8036CBD0 28 00 00 00 */ cmplwi r0, 0
|
||||
/* 8036CBD4 41 82 00 10 */ beq lbl_8036CBE4
|
||||
lbl_8036CBD8:
|
||||
/* 8036CBD8 3B C0 00 01 */ li r30, 1
|
||||
/* 8036CBDC 48 00 0D 99 */ bl TRKGetInput
|
||||
/* 8036CBE0 48 00 00 18 */ b lbl_8036CBF8
|
||||
lbl_8036CBE4:
|
||||
/* 8036CBE4 48 00 2F 2D */ bl TRKTargetStopped
|
||||
/* 8036CBE8 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8036CBEC 40 82 00 08 */ bne lbl_8036CBF4
|
||||
/* 8036CBF0 48 00 55 5D */ bl TRKTargetContinue
|
||||
lbl_8036CBF4:
|
||||
/* 8036CBF4 3B C0 00 00 */ li r30, 0
|
||||
lbl_8036CBF8:
|
||||
/* 8036CBF8 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036CBFC 41 82 FF 44 */ beq lbl_8036CB40
|
||||
/* 8036CC00 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 8036CC04 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 8036CC08 83 C1 00 18 */ lwz r30, 0x18(r1)
|
||||
/* 8036CC0C 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036CC10 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 8036CC14 4E 80 00 20 */ blr
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
lbl_8036ECDC:
|
||||
/* 8036ECDC 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 8036ECE0 7C 08 02 A6 */ mflr r0
|
||||
/* 8036ECE4 3C C0 80 3A */ lis r6, lit_573@ha /* 0x803A2AAC@ha */
|
||||
/* 8036ECE8 3C A0 80 3A */ lis r5, lit_574@ha /* 0x803A2AB4@ha */
|
||||
/* 8036ECEC 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8036ECF0 BF 61 00 0C */ stmw r27, 0xc(r1)
|
||||
/* 8036ECF4 7C 9B 23 78 */ mr r27, r4
|
||||
/* 8036ECF8 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036ECFC 3B A6 2A AC */ addi r29, r6, lit_573@l /* 0x803A2AAC@l */
|
||||
/* 8036ED00 3B C5 2A B4 */ addi r30, r5, lit_574@l /* 0x803A2AB4@l */
|
||||
/* 8036ED04 3B 80 00 00 */ li r28, 0
|
||||
/* 8036ED08 48 00 00 4C */ b lbl_8036ED54
|
||||
lbl_8036ED0C:
|
||||
/* 8036ED0C 88 BF 00 00 */ lbz r5, 0(r31)
|
||||
/* 8036ED10 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8036ED14 38 60 00 08 */ li r3, 8
|
||||
/* 8036ED18 4C C6 31 82 */ crclr 6
|
||||
/* 8036ED1C 48 00 3F 39 */ bl MWTRACE
|
||||
/* 8036ED20 57 80 E0 06 */ slwi r0, r28, 0x1c
|
||||
/* 8036ED24 57 83 0F FE */ srwi r3, r28, 0x1f
|
||||
/* 8036ED28 7C 03 00 50 */ subf r0, r3, r0
|
||||
/* 8036ED2C 54 00 20 3E */ rotlwi r0, r0, 4
|
||||
/* 8036ED30 7C 00 1A 14 */ add r0, r0, r3
|
||||
/* 8036ED34 2C 00 00 0F */ cmpwi r0, 0xf
|
||||
/* 8036ED38 40 82 00 14 */ bne lbl_8036ED4C
|
||||
/* 8036ED3C 7F C4 F3 78 */ mr r4, r30
|
||||
/* 8036ED40 38 60 00 08 */ li r3, 8
|
||||
/* 8036ED44 4C C6 31 82 */ crclr 6
|
||||
/* 8036ED48 48 00 3F 0D */ bl MWTRACE
|
||||
lbl_8036ED4C:
|
||||
/* 8036ED4C 3B 9C 00 01 */ addi r28, r28, 1
|
||||
/* 8036ED50 3B FF 00 01 */ addi r31, r31, 1
|
||||
lbl_8036ED54:
|
||||
/* 8036ED54 7C 1C D8 00 */ cmpw r28, r27
|
||||
/* 8036ED58 41 80 FF B4 */ blt lbl_8036ED0C
|
||||
/* 8036ED5C 3C 80 80 3A */ lis r4, lit_574@ha /* 0x803A2AB4@ha */
|
||||
/* 8036ED60 38 60 00 08 */ li r3, 8
|
||||
/* 8036ED64 38 84 2A B4 */ addi r4, r4, lit_574@l /* 0x803A2AB4@l */
|
||||
/* 8036ED68 4C C6 31 82 */ crclr 6
|
||||
/* 8036ED6C 48 00 3E E9 */ bl MWTRACE
|
||||
/* 8036ED70 BB 61 00 0C */ lmw r27, 0xc(r1)
|
||||
/* 8036ED74 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 8036ED78 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036ED7C 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 8036ED80 4E 80 00 20 */ blr
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
lbl_8036EC5C:
|
||||
/* 8036EC5C 94 21 FF B0 */ stwu r1, -0x50(r1)
|
||||
/* 8036EC60 7C 08 02 A6 */ mflr r0
|
||||
/* 8036EC64 3C 60 80 45 */ lis r3, IsTRKConnected@ha /* 0x8044F288@ha */
|
||||
/* 8036EC68 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EC6C 90 01 00 54 */ stw r0, 0x54(r1)
|
||||
/* 8036EC70 38 83 F2 88 */ addi r4, r3, IsTRKConnected@l /* 0x8044F288@l */
|
||||
/* 8036EC74 38 00 00 01 */ li r0, 1
|
||||
/* 8036EC78 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036EC7C 90 04 00 00 */ stw r0, 0(r4)
|
||||
/* 8036EC80 38 80 00 00 */ li r4, 0
|
||||
/* 8036EC84 4B C9 47 D5 */ bl memset
|
||||
/* 8036EC88 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036EC8C 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EC90 38 00 00 00 */ li r0, 0
|
||||
/* 8036EC94 98 61 00 0C */ stb r3, 0xc(r1)
|
||||
/* 8036EC98 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036EC9C 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036ECA0 90 A1 00 08 */ stw r5, 8(r1)
|
||||
/* 8036ECA4 98 01 00 10 */ stb r0, 0x10(r1)
|
||||
/* 8036ECA8 48 00 30 C1 */ bl TRKWriteUARTN
|
||||
/* 8036ECAC 80 01 00 54 */ lwz r0, 0x54(r1)
|
||||
/* 8036ECB0 38 60 00 00 */ li r3, 0
|
||||
/* 8036ECB4 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036ECB8 38 21 00 50 */ addi r1, r1, 0x50
|
||||
/* 8036ECBC 4E 80 00 20 */ blr
|
||||
|
|
@ -1,47 +0,0 @@
|
|||
lbl_8036E084:
|
||||
/* 8036E084 94 21 FF 70 */ stwu r1, -0x90(r1)
|
||||
/* 8036E088 7C 08 02 A6 */ mflr r0
|
||||
/* 8036E08C 3C 80 80 3A */ lis r4, lit_370@ha /* 0x803A2904@ha */
|
||||
/* 8036E090 38 60 00 01 */ li r3, 1
|
||||
/* 8036E094 90 01 00 94 */ stw r0, 0x94(r1)
|
||||
/* 8036E098 38 84 29 04 */ addi r4, r4, lit_370@l /* 0x803A2904@l */
|
||||
/* 8036E09C 4C C6 31 82 */ crclr 6
|
||||
/* 8036E0A0 48 00 4B B5 */ bl MWTRACE
|
||||
/* 8036E0A4 48 00 1A 6D */ bl TRKTargetStopped
|
||||
/* 8036E0A8 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8036E0AC 40 82 00 40 */ bne lbl_8036E0EC
|
||||
/* 8036E0B0 38 61 00 48 */ addi r3, r1, 0x48
|
||||
/* 8036E0B4 38 80 00 00 */ li r4, 0
|
||||
/* 8036E0B8 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E0BC 4B C9 53 9D */ bl memset
|
||||
/* 8036E0C0 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036E0C4 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E0C8 38 00 00 16 */ li r0, 0x16
|
||||
/* 8036E0CC 98 61 00 4C */ stb r3, 0x4c(r1)
|
||||
/* 8036E0D0 38 61 00 48 */ addi r3, r1, 0x48
|
||||
/* 8036E0D4 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E0D8 90 A1 00 48 */ stw r5, 0x48(r1)
|
||||
/* 8036E0DC 98 01 00 50 */ stb r0, 0x50(r1)
|
||||
/* 8036E0E0 48 00 3C 89 */ bl TRKWriteUARTN
|
||||
/* 8036E0E4 38 60 00 00 */ li r3, 0
|
||||
/* 8036E0E8 48 00 00 3C */ b lbl_8036E124
|
||||
lbl_8036E0EC:
|
||||
/* 8036E0EC 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036E0F0 38 80 00 00 */ li r4, 0
|
||||
/* 8036E0F4 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E0F8 4B C9 53 61 */ bl memset
|
||||
/* 8036E0FC 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036E100 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E104 38 00 00 00 */ li r0, 0
|
||||
/* 8036E108 98 61 00 0C */ stb r3, 0xc(r1)
|
||||
/* 8036E10C 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036E110 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E114 90 A1 00 08 */ stw r5, 8(r1)
|
||||
/* 8036E118 98 01 00 10 */ stb r0, 0x10(r1)
|
||||
/* 8036E11C 48 00 3C 4D */ bl TRKWriteUARTN
|
||||
/* 8036E120 48 00 40 2D */ bl TRKTargetContinue
|
||||
lbl_8036E124:
|
||||
/* 8036E124 80 01 00 94 */ lwz r0, 0x94(r1)
|
||||
/* 8036E128 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036E12C 38 21 00 90 */ addi r1, r1, 0x90
|
||||
/* 8036E130 4E 80 00 20 */ blr
|
||||
|
|
@ -1,31 +0,0 @@
|
|||
lbl_8036EBE4:
|
||||
/* 8036EBE4 94 21 FF A0 */ stwu r1, -0x60(r1)
|
||||
/* 8036EBE8 7C 08 02 A6 */ mflr r0
|
||||
/* 8036EBEC 3C 60 80 45 */ lis r3, IsTRKConnected@ha /* 0x8044F288@ha */
|
||||
/* 8036EBF0 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EBF4 90 01 00 64 */ stw r0, 0x64(r1)
|
||||
/* 8036EBF8 38 83 F2 88 */ addi r4, r3, IsTRKConnected@l /* 0x8044F288@l */
|
||||
/* 8036EBFC 38 00 00 00 */ li r0, 0
|
||||
/* 8036EC00 38 61 00 14 */ addi r3, r1, 0x14
|
||||
/* 8036EC04 90 04 00 00 */ stw r0, 0(r4)
|
||||
/* 8036EC08 38 80 00 00 */ li r4, 0
|
||||
/* 8036EC0C 4B C9 48 4D */ bl memset
|
||||
/* 8036EC10 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036EC14 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EC18 38 00 00 00 */ li r0, 0
|
||||
/* 8036EC1C 98 61 00 18 */ stb r3, 0x18(r1)
|
||||
/* 8036EC20 38 61 00 14 */ addi r3, r1, 0x14
|
||||
/* 8036EC24 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036EC28 90 A1 00 14 */ stw r5, 0x14(r1)
|
||||
/* 8036EC2C 98 01 00 1C */ stb r0, 0x1c(r1)
|
||||
/* 8036EC30 48 00 31 39 */ bl TRKWriteUARTN
|
||||
/* 8036EC34 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036EC38 38 80 00 01 */ li r4, 1
|
||||
/* 8036EC3C 4B FF E0 01 */ bl TRKConstructEvent
|
||||
/* 8036EC40 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036EC44 4B FF E0 11 */ bl TRKPostEvent
|
||||
/* 8036EC48 80 01 00 64 */ lwz r0, 0x64(r1)
|
||||
/* 8036EC4C 38 60 00 00 */ li r3, 0
|
||||
/* 8036EC50 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036EC54 38 21 00 60 */ addi r1, r1, 0x60
|
||||
/* 8036EC58 4E 80 00 20 */ blr
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
lbl_8036EB34:
|
||||
/* 8036EB34 94 21 FF B0 */ stwu r1, -0x50(r1)
|
||||
/* 8036EB38 7C 08 02 A6 */ mflr r0
|
||||
/* 8036EB3C 38 80 00 00 */ li r4, 0
|
||||
/* 8036EB40 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EB44 90 01 00 54 */ stw r0, 0x54(r1)
|
||||
/* 8036EB48 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036EB4C 4B C9 49 0D */ bl memset
|
||||
/* 8036EB50 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036EB54 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EB58 38 00 00 00 */ li r0, 0
|
||||
/* 8036EB5C 98 61 00 0C */ stb r3, 0xc(r1)
|
||||
/* 8036EB60 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036EB64 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036EB68 90 A1 00 08 */ stw r5, 8(r1)
|
||||
/* 8036EB6C 98 01 00 10 */ stb r0, 0x10(r1)
|
||||
/* 8036EB70 48 00 31 F9 */ bl TRKWriteUARTN
|
||||
/* 8036EB74 48 00 2E 85 */ bl __TRK_copy_vectors
|
||||
/* 8036EB78 80 01 00 54 */ lwz r0, 0x54(r1)
|
||||
/* 8036EB7C 38 60 00 00 */ li r3, 0
|
||||
/* 8036EB80 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036EB84 38 21 00 50 */ addi r1, r1, 0x50
|
||||
/* 8036EB88 4E 80 00 20 */ blr
|
||||
|
|
@ -1,155 +0,0 @@
|
|||
lbl_8036E8E0:
|
||||
/* 8036E8E0 54 2B 06 FE */ clrlwi r11, r1, 0x1b
|
||||
/* 8036E8E4 7C 2C 0B 78 */ mr r12, r1
|
||||
/* 8036E8E8 21 6B F6 C0 */ subfic r11, r11, -2368
|
||||
/* 8036E8EC 7C 21 59 6E */ stwux r1, r1, r11
|
||||
/* 8036E8F0 7C 08 02 A6 */ mflr r0
|
||||
/* 8036E8F4 90 0C 00 04 */ stw r0, 4(r12)
|
||||
/* 8036E8F8 BF 4C FF E8 */ stmw r26, -0x18(r12)
|
||||
/* 8036E8FC 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036E900 3C 60 80 3A */ lis r3, lit_321@ha /* 0x803A28D0@ha */
|
||||
/* 8036E904 3B A3 28 D0 */ addi r29, r3, lit_321@l /* 0x803A28D0@l */
|
||||
/* 8036E908 38 9D 01 B0 */ addi r4, r29, 0x1b0
|
||||
/* 8036E90C 38 60 00 01 */ li r3, 1
|
||||
/* 8036E910 83 5F 00 20 */ lwz r26, 0x20(r31)
|
||||
/* 8036E914 A3 7F 00 1C */ lhz r27, 0x1c(r31)
|
||||
/* 8036E918 8B DF 00 18 */ lbz r30, 0x18(r31)
|
||||
/* 8036E91C 7F 46 D3 78 */ mr r6, r26
|
||||
/* 8036E920 88 BF 00 14 */ lbz r5, 0x14(r31)
|
||||
/* 8036E924 7F 67 DB 78 */ mr r7, r27
|
||||
/* 8036E928 7F C8 F3 78 */ mr r8, r30
|
||||
/* 8036E92C 4C C6 31 82 */ crclr 6
|
||||
/* 8036E930 48 00 43 25 */ bl MWTRACE
|
||||
/* 8036E934 57 C0 07 BD */ rlwinm. r0, r30, 0, 0x1e, 0x1e
|
||||
/* 8036E938 41 82 00 40 */ beq lbl_8036E978
|
||||
/* 8036E93C 38 61 00 64 */ addi r3, r1, 0x64
|
||||
/* 8036E940 38 80 00 00 */ li r4, 0
|
||||
/* 8036E944 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E948 4B C9 4B 11 */ bl memset
|
||||
/* 8036E94C 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036E950 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E954 38 00 00 12 */ li r0, 0x12
|
||||
/* 8036E958 98 61 00 68 */ stb r3, 0x68(r1)
|
||||
/* 8036E95C 38 61 00 64 */ addi r3, r1, 0x64
|
||||
/* 8036E960 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E964 90 A1 00 64 */ stw r5, 0x64(r1)
|
||||
/* 8036E968 98 01 00 6C */ stb r0, 0x6c(r1)
|
||||
/* 8036E96C 48 00 33 FD */ bl TRKWriteUARTN
|
||||
/* 8036E970 38 60 00 00 */ li r3, 0
|
||||
/* 8036E974 48 00 01 98 */ b lbl_8036EB0C
|
||||
lbl_8036E978:
|
||||
/* 8036E978 57 DC 06 73 */ rlwinm. r28, r30, 0, 0x19, 0x19
|
||||
/* 8036E97C 93 61 00 20 */ stw r27, 0x20(r1)
|
||||
/* 8036E980 41 82 00 20 */ beq lbl_8036E9A0
|
||||
/* 8036E984 7F 44 D3 78 */ mr r4, r26
|
||||
/* 8036E988 38 61 01 00 */ addi r3, r1, 0x100
|
||||
/* 8036E98C 38 A1 00 20 */ addi r5, r1, 0x20
|
||||
/* 8036E990 38 C0 00 01 */ li r6, 1
|
||||
/* 8036E994 48 00 10 81 */ bl TRKTargetAccessARAM
|
||||
/* 8036E998 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 8036E99C 48 00 00 24 */ b lbl_8036E9C0
|
||||
lbl_8036E9A0:
|
||||
/* 8036E9A0 57 C0 EF FE */ rlwinm r0, r30, 0x1d, 0x1f, 0x1f
|
||||
/* 8036E9A4 7F 44 D3 78 */ mr r4, r26
|
||||
/* 8036E9A8 38 61 01 00 */ addi r3, r1, 0x100
|
||||
/* 8036E9AC 38 A1 00 20 */ addi r5, r1, 0x20
|
||||
/* 8036E9B0 68 06 00 01 */ xori r6, r0, 1
|
||||
/* 8036E9B4 38 E0 00 01 */ li r7, 1
|
||||
/* 8036E9B8 48 00 24 1D */ bl TRKTargetAccessMemory
|
||||
/* 8036E9BC 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_8036E9C0:
|
||||
/* 8036E9C0 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036E9C4 38 80 00 00 */ li r4, 0
|
||||
/* 8036E9C8 4B FF EC 85 */ bl TRKResetBuffer
|
||||
/* 8036E9CC 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036E9D0 40 82 00 78 */ bne lbl_8036EA48
|
||||
/* 8036E9D4 38 61 00 A4 */ addi r3, r1, 0xa4
|
||||
/* 8036E9D8 38 80 00 00 */ li r4, 0
|
||||
/* 8036E9DC 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E9E0 4B C9 4A 79 */ bl memset
|
||||
/* 8036E9E4 80 81 00 20 */ lwz r4, 0x20(r1)
|
||||
/* 8036E9E8 38 00 00 80 */ li r0, 0x80
|
||||
/* 8036E9EC 9B C1 00 AC */ stb r30, 0xac(r1)
|
||||
/* 8036E9F0 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036E9F4 38 84 00 40 */ addi r4, r4, 0x40
|
||||
/* 8036E9F8 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E9FC 90 81 00 A4 */ stw r4, 0xa4(r1)
|
||||
/* 8036EA00 38 81 00 A4 */ addi r4, r1, 0xa4
|
||||
/* 8036EA04 98 01 00 A8 */ stb r0, 0xa8(r1)
|
||||
/* 8036EA08 4B FF EB 71 */ bl TRKAppendBuffer
|
||||
/* 8036EA0C 2C 1C 00 00 */ cmpwi r28, 0
|
||||
/* 8036EA10 41 82 00 24 */ beq lbl_8036EA34
|
||||
/* 8036EA14 57 40 06 FE */ clrlwi r0, r26, 0x1b
|
||||
/* 8036EA18 38 81 01 00 */ addi r4, r1, 0x100
|
||||
/* 8036EA1C 80 A1 00 20 */ lwz r5, 0x20(r1)
|
||||
/* 8036EA20 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036EA24 7C 84 02 14 */ add r4, r4, r0
|
||||
/* 8036EA28 4B FF EB 51 */ bl TRKAppendBuffer
|
||||
/* 8036EA2C 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 8036EA30 48 00 00 18 */ b lbl_8036EA48
|
||||
lbl_8036EA34:
|
||||
/* 8036EA34 80 A1 00 20 */ lwz r5, 0x20(r1)
|
||||
/* 8036EA38 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036EA3C 38 81 01 00 */ addi r4, r1, 0x100
|
||||
/* 8036EA40 4B FF EB 39 */ bl TRKAppendBuffer
|
||||
/* 8036EA44 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_8036EA48:
|
||||
/* 8036EA48 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036EA4C 41 82 00 8C */ beq lbl_8036EAD8
|
||||
/* 8036EA50 38 1E F9 00 */ addi r0, r30, -1792
|
||||
/* 8036EA54 28 00 00 06 */ cmplwi r0, 6
|
||||
/* 8036EA58 41 81 00 44 */ bgt lbl_8036EA9C
|
||||
/* 8036EA5C 3C 60 80 3D */ lis r3, lit_536@ha /* 0x803D321C@ha */
|
||||
/* 8036EA60 54 00 10 3A */ slwi r0, r0, 2
|
||||
/* 8036EA64 38 63 32 1C */ addi r3, r3, lit_536@l /* 0x803D321C@l */
|
||||
/* 8036EA68 7C 03 00 2E */ lwzx r0, r3, r0
|
||||
/* 8036EA6C 7C 09 03 A6 */ mtctr r0
|
||||
/* 8036EA70 4E 80 04 20 */ bctr
|
||||
/* 8036EA74 3B 80 00 15 */ li r28, 0x15
|
||||
/* 8036EA78 48 00 00 28 */ b lbl_8036EAA0
|
||||
/* 8036EA7C 3B 80 00 13 */ li r28, 0x13
|
||||
/* 8036EA80 48 00 00 20 */ b lbl_8036EAA0
|
||||
/* 8036EA84 3B 80 00 21 */ li r28, 0x21
|
||||
/* 8036EA88 48 00 00 18 */ b lbl_8036EAA0
|
||||
/* 8036EA8C 3B 80 00 22 */ li r28, 0x22
|
||||
/* 8036EA90 48 00 00 10 */ b lbl_8036EAA0
|
||||
/* 8036EA94 3B 80 00 20 */ li r28, 0x20
|
||||
/* 8036EA98 48 00 00 08 */ b lbl_8036EAA0
|
||||
lbl_8036EA9C:
|
||||
/* 8036EA9C 3B 80 00 03 */ li r28, 3
|
||||
lbl_8036EAA0:
|
||||
/* 8036EAA0 38 61 00 24 */ addi r3, r1, 0x24
|
||||
/* 8036EAA4 38 80 00 00 */ li r4, 0
|
||||
/* 8036EAA8 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EAAC 4B C9 49 AD */ bl memset
|
||||
/* 8036EAB0 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036EAB4 38 00 00 40 */ li r0, 0x40
|
||||
/* 8036EAB8 98 61 00 28 */ stb r3, 0x28(r1)
|
||||
/* 8036EABC 38 61 00 24 */ addi r3, r1, 0x24
|
||||
/* 8036EAC0 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036EAC4 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8036EAC8 9B 81 00 2C */ stb r28, 0x2c(r1)
|
||||
/* 8036EACC 48 00 32 9D */ bl TRKWriteUARTN
|
||||
/* 8036EAD0 38 60 00 00 */ li r3, 0
|
||||
/* 8036EAD4 48 00 00 38 */ b lbl_8036EB0C
|
||||
lbl_8036EAD8:
|
||||
/* 8036EAD8 38 9D 00 60 */ addi r4, r29, 0x60
|
||||
/* 8036EADC 38 60 00 01 */ li r3, 1
|
||||
/* 8036EAE0 4C C6 31 82 */ crclr 6
|
||||
/* 8036EAE4 48 00 41 71 */ bl MWTRACE
|
||||
/* 8036EAE8 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036EAEC 4B FF E4 ED */ bl TRKMessageSend
|
||||
/* 8036EAF0 38 9D 00 80 */ addi r4, r29, 0x80
|
||||
/* 8036EAF4 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 8036EAF8 38 60 00 01 */ li r3, 1
|
||||
/* 8036EAFC 7F A5 EB 78 */ mr r5, r29
|
||||
/* 8036EB00 4C C6 31 82 */ crclr 6
|
||||
/* 8036EB04 48 00 41 51 */ bl MWTRACE
|
||||
/* 8036EB08 7F A3 EB 78 */ mr r3, r29
|
||||
lbl_8036EB0C:
|
||||
/* 8036EB0C 81 41 00 00 */ lwz r10, 0(r1)
|
||||
/* 8036EB10 BB 4A FF E8 */ lmw r26, -0x18(r10)
|
||||
/* 8036EB14 80 0A 00 04 */ lwz r0, 4(r10)
|
||||
/* 8036EB18 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036EB1C 7D 41 53 78 */ mr r1, r10
|
||||
/* 8036EB20 4E 80 00 20 */ blr
|
||||
|
|
@ -1,200 +0,0 @@
|
|||
lbl_8036E3C4:
|
||||
/* 8036E3C4 94 21 FF 20 */ stwu r1, -0xe0(r1)
|
||||
/* 8036E3C8 7C 08 02 A6 */ mflr r0
|
||||
/* 8036E3CC 3C A0 80 3A */ lis r5, lit_321@ha /* 0x803A28D0@ha */
|
||||
/* 8036E3D0 90 01 00 E4 */ stw r0, 0xe4(r1)
|
||||
/* 8036E3D4 93 E1 00 DC */ stw r31, 0xdc(r1)
|
||||
/* 8036E3D8 3B E5 28 D0 */ addi r31, r5, lit_321@l /* 0x803A28D0@l */
|
||||
/* 8036E3DC 93 C1 00 D8 */ stw r30, 0xd8(r1)
|
||||
/* 8036E3E0 93 A1 00 D4 */ stw r29, 0xd4(r1)
|
||||
/* 8036E3E4 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 8036E3E8 A0 83 00 1C */ lhz r4, 0x1c(r3)
|
||||
/* 8036E3EC A0 03 00 20 */ lhz r0, 0x20(r3)
|
||||
/* 8036E3F0 7C 04 00 40 */ cmplw r4, r0
|
||||
/* 8036E3F4 40 81 00 40 */ ble lbl_8036E434
|
||||
/* 8036E3F8 38 61 00 4C */ addi r3, r1, 0x4c
|
||||
/* 8036E3FC 38 80 00 00 */ li r4, 0
|
||||
/* 8036E400 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E404 4B C9 50 55 */ bl memset
|
||||
/* 8036E408 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036E40C 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E410 38 00 00 14 */ li r0, 0x14
|
||||
/* 8036E414 98 61 00 50 */ stb r3, 0x50(r1)
|
||||
/* 8036E418 38 61 00 4C */ addi r3, r1, 0x4c
|
||||
/* 8036E41C 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E420 90 A1 00 4C */ stw r5, 0x4c(r1)
|
||||
/* 8036E424 98 01 00 54 */ stb r0, 0x54(r1)
|
||||
/* 8036E428 48 00 39 41 */ bl TRKWriteUARTN
|
||||
/* 8036E42C 38 60 00 00 */ li r3, 0
|
||||
/* 8036E430 48 00 02 58 */ b lbl_8036E688
|
||||
lbl_8036E434:
|
||||
/* 8036E434 38 80 00 80 */ li r4, 0x80
|
||||
/* 8036E438 38 00 04 68 */ li r0, 0x468
|
||||
/* 8036E43C 98 81 00 90 */ stb r4, 0x90(r1)
|
||||
/* 8036E440 38 80 00 00 */ li r4, 0
|
||||
/* 8036E444 90 01 00 8C */ stw r0, 0x8c(r1)
|
||||
/* 8036E448 4B FF F2 05 */ bl TRKResetBuffer
|
||||
/* 8036E44C 80 BD 00 08 */ lwz r5, 8(r29)
|
||||
/* 8036E450 38 9F 00 98 */ addi r4, r31, 0x98
|
||||
/* 8036E454 38 60 00 04 */ li r3, 4
|
||||
/* 8036E458 4C C6 31 82 */ crclr 6
|
||||
/* 8036E45C 48 00 47 F9 */ bl MWTRACE
|
||||
/* 8036E460 7F A3 EB 78 */ mr r3, r29
|
||||
/* 8036E464 38 81 00 8C */ addi r4, r1, 0x8c
|
||||
/* 8036E468 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E46C 4B FF EF 1D */ bl TRKAppendBuffer_ui8
|
||||
/* 8036E470 80 BD 00 08 */ lwz r5, 8(r29)
|
||||
/* 8036E474 38 9F 00 98 */ addi r4, r31, 0x98
|
||||
/* 8036E478 38 60 00 04 */ li r3, 4
|
||||
/* 8036E47C 4C C6 31 82 */ crclr 6
|
||||
/* 8036E480 48 00 47 D5 */ bl MWTRACE
|
||||
/* 8036E484 7F A5 EB 78 */ mr r5, r29
|
||||
/* 8036E488 38 C1 00 08 */ addi r6, r1, 8
|
||||
/* 8036E48C 38 60 00 00 */ li r3, 0
|
||||
/* 8036E490 38 80 00 24 */ li r4, 0x24
|
||||
/* 8036E494 38 E0 00 01 */ li r7, 1
|
||||
/* 8036E498 48 00 27 FD */ bl TRKTargetAccessDefault
|
||||
/* 8036E49C 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 8036E4A0 38 9F 00 C0 */ addi r4, r31, 0xc0
|
||||
/* 8036E4A4 38 60 00 04 */ li r3, 4
|
||||
/* 8036E4A8 7F C5 F3 78 */ mr r5, r30
|
||||
/* 8036E4AC 4C C6 31 82 */ crclr 6
|
||||
/* 8036E4B0 48 00 47 A5 */ bl MWTRACE
|
||||
/* 8036E4B4 80 BD 00 08 */ lwz r5, 8(r29)
|
||||
/* 8036E4B8 38 9F 00 98 */ addi r4, r31, 0x98
|
||||
/* 8036E4BC 38 60 00 04 */ li r3, 4
|
||||
/* 8036E4C0 4C C6 31 82 */ crclr 6
|
||||
/* 8036E4C4 48 00 47 91 */ bl MWTRACE
|
||||
/* 8036E4C8 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036E4CC 40 82 00 20 */ bne lbl_8036E4EC
|
||||
/* 8036E4D0 7F A5 EB 78 */ mr r5, r29
|
||||
/* 8036E4D4 38 C1 00 08 */ addi r6, r1, 8
|
||||
/* 8036E4D8 38 60 00 00 */ li r3, 0
|
||||
/* 8036E4DC 38 80 00 21 */ li r4, 0x21
|
||||
/* 8036E4E0 38 E0 00 01 */ li r7, 1
|
||||
/* 8036E4E4 48 00 22 A5 */ bl TRKTargetAccessFP
|
||||
/* 8036E4E8 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_8036E4EC:
|
||||
/* 8036E4EC 7F C5 F3 78 */ mr r5, r30
|
||||
/* 8036E4F0 38 9F 00 F8 */ addi r4, r31, 0xf8
|
||||
/* 8036E4F4 38 60 00 04 */ li r3, 4
|
||||
/* 8036E4F8 4C C6 31 82 */ crclr 6
|
||||
/* 8036E4FC 48 00 47 59 */ bl MWTRACE
|
||||
/* 8036E500 80 BD 00 08 */ lwz r5, 8(r29)
|
||||
/* 8036E504 38 9F 00 98 */ addi r4, r31, 0x98
|
||||
/* 8036E508 38 60 00 04 */ li r3, 4
|
||||
/* 8036E50C 4C C6 31 82 */ crclr 6
|
||||
/* 8036E510 48 00 47 45 */ bl MWTRACE
|
||||
/* 8036E514 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036E518 40 82 00 20 */ bne lbl_8036E538
|
||||
/* 8036E51C 7F A5 EB 78 */ mr r5, r29
|
||||
/* 8036E520 38 C1 00 08 */ addi r6, r1, 8
|
||||
/* 8036E524 38 60 00 00 */ li r3, 0
|
||||
/* 8036E528 38 80 00 60 */ li r4, 0x60
|
||||
/* 8036E52C 38 E0 00 01 */ li r7, 1
|
||||
/* 8036E530 48 00 20 E9 */ bl TRKTargetAccessExtended1
|
||||
/* 8036E534 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_8036E538:
|
||||
/* 8036E538 7F C5 F3 78 */ mr r5, r30
|
||||
/* 8036E53C 38 9F 01 20 */ addi r4, r31, 0x120
|
||||
/* 8036E540 38 60 00 04 */ li r3, 4
|
||||
/* 8036E544 4C C6 31 82 */ crclr 6
|
||||
/* 8036E548 48 00 47 0D */ bl MWTRACE
|
||||
/* 8036E54C 80 BD 00 08 */ lwz r5, 8(r29)
|
||||
/* 8036E550 38 9F 00 98 */ addi r4, r31, 0x98
|
||||
/* 8036E554 38 60 00 04 */ li r3, 4
|
||||
/* 8036E558 4C C6 31 82 */ crclr 6
|
||||
/* 8036E55C 48 00 46 F9 */ bl MWTRACE
|
||||
/* 8036E560 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036E564 40 82 00 20 */ bne lbl_8036E584
|
||||
/* 8036E568 7F A5 EB 78 */ mr r5, r29
|
||||
/* 8036E56C 38 C1 00 08 */ addi r6, r1, 8
|
||||
/* 8036E570 38 60 00 00 */ li r3, 0
|
||||
/* 8036E574 38 80 00 1F */ li r4, 0x1f
|
||||
/* 8036E578 38 E0 00 01 */ li r7, 1
|
||||
/* 8036E57C 48 00 1C 65 */ bl TRKTargetAccessExtended2
|
||||
/* 8036E580 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_8036E584:
|
||||
/* 8036E584 7F C5 F3 78 */ mr r5, r30
|
||||
/* 8036E588 38 9F 01 50 */ addi r4, r31, 0x150
|
||||
/* 8036E58C 38 60 00 04 */ li r3, 4
|
||||
/* 8036E590 4C C6 31 82 */ crclr 6
|
||||
/* 8036E594 48 00 46 C1 */ bl MWTRACE
|
||||
/* 8036E598 80 BD 00 08 */ lwz r5, 8(r29)
|
||||
/* 8036E59C 38 9F 00 98 */ addi r4, r31, 0x98
|
||||
/* 8036E5A0 38 60 00 04 */ li r3, 4
|
||||
/* 8036E5A4 4C C6 31 82 */ crclr 6
|
||||
/* 8036E5A8 48 00 46 AD */ bl MWTRACE
|
||||
/* 8036E5AC 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036E5B0 41 82 00 A4 */ beq lbl_8036E654
|
||||
/* 8036E5B4 2C 1E 07 04 */ cmpwi r30, 0x704
|
||||
/* 8036E5B8 41 82 00 48 */ beq lbl_8036E600
|
||||
/* 8036E5BC 40 80 00 1C */ bge lbl_8036E5D8
|
||||
/* 8036E5C0 2C 1E 07 02 */ cmpwi r30, 0x702
|
||||
/* 8036E5C4 41 82 00 34 */ beq lbl_8036E5F8
|
||||
/* 8036E5C8 40 80 00 20 */ bge lbl_8036E5E8
|
||||
/* 8036E5CC 2C 1E 07 01 */ cmpwi r30, 0x701
|
||||
/* 8036E5D0 40 80 00 20 */ bge lbl_8036E5F0
|
||||
/* 8036E5D4 48 00 00 44 */ b lbl_8036E618
|
||||
lbl_8036E5D8:
|
||||
/* 8036E5D8 2C 1E 07 06 */ cmpwi r30, 0x706
|
||||
/* 8036E5DC 41 82 00 34 */ beq lbl_8036E610
|
||||
/* 8036E5E0 40 80 00 38 */ bge lbl_8036E618
|
||||
/* 8036E5E4 48 00 00 24 */ b lbl_8036E608
|
||||
lbl_8036E5E8:
|
||||
/* 8036E5E8 3B C0 00 12 */ li r30, 0x12
|
||||
/* 8036E5EC 48 00 00 30 */ b lbl_8036E61C
|
||||
lbl_8036E5F0:
|
||||
/* 8036E5F0 3B C0 00 14 */ li r30, 0x14
|
||||
/* 8036E5F4 48 00 00 28 */ b lbl_8036E61C
|
||||
lbl_8036E5F8:
|
||||
/* 8036E5F8 3B C0 00 15 */ li r30, 0x15
|
||||
/* 8036E5FC 48 00 00 20 */ b lbl_8036E61C
|
||||
lbl_8036E600:
|
||||
/* 8036E600 3B C0 00 21 */ li r30, 0x21
|
||||
/* 8036E604 48 00 00 18 */ b lbl_8036E61C
|
||||
lbl_8036E608:
|
||||
/* 8036E608 3B C0 00 22 */ li r30, 0x22
|
||||
/* 8036E60C 48 00 00 10 */ b lbl_8036E61C
|
||||
lbl_8036E610:
|
||||
/* 8036E610 3B C0 00 20 */ li r30, 0x20
|
||||
/* 8036E614 48 00 00 08 */ b lbl_8036E61C
|
||||
lbl_8036E618:
|
||||
/* 8036E618 3B C0 00 03 */ li r30, 3
|
||||
lbl_8036E61C:
|
||||
/* 8036E61C 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036E620 38 80 00 00 */ li r4, 0
|
||||
/* 8036E624 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E628 4B C9 4E 31 */ bl memset
|
||||
/* 8036E62C 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036E630 38 00 00 40 */ li r0, 0x40
|
||||
/* 8036E634 98 61 00 10 */ stb r3, 0x10(r1)
|
||||
/* 8036E638 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036E63C 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E640 90 01 00 0C */ stw r0, 0xc(r1)
|
||||
/* 8036E644 9B C1 00 14 */ stb r30, 0x14(r1)
|
||||
/* 8036E648 48 00 37 21 */ bl TRKWriteUARTN
|
||||
/* 8036E64C 38 60 00 00 */ li r3, 0
|
||||
/* 8036E650 48 00 00 38 */ b lbl_8036E688
|
||||
lbl_8036E654:
|
||||
/* 8036E654 38 9F 00 60 */ addi r4, r31, 0x60
|
||||
/* 8036E658 38 60 00 01 */ li r3, 1
|
||||
/* 8036E65C 4C C6 31 82 */ crclr 6
|
||||
/* 8036E660 48 00 45 F5 */ bl MWTRACE
|
||||
/* 8036E664 7F A3 EB 78 */ mr r3, r29
|
||||
/* 8036E668 4B FF E9 71 */ bl TRKMessageSend
|
||||
/* 8036E66C 38 9F 00 80 */ addi r4, r31, 0x80
|
||||
/* 8036E670 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036E674 38 60 00 01 */ li r3, 1
|
||||
/* 8036E678 7F E5 FB 78 */ mr r5, r31
|
||||
/* 8036E67C 4C C6 31 82 */ crclr 6
|
||||
/* 8036E680 48 00 45 D5 */ bl MWTRACE
|
||||
/* 8036E684 7F E3 FB 78 */ mr r3, r31
|
||||
lbl_8036E688:
|
||||
/* 8036E688 80 01 00 E4 */ lwz r0, 0xe4(r1)
|
||||
/* 8036E68C 83 E1 00 DC */ lwz r31, 0xdc(r1)
|
||||
/* 8036E690 83 C1 00 D8 */ lwz r30, 0xd8(r1)
|
||||
/* 8036E694 83 A1 00 D4 */ lwz r29, 0xd4(r1)
|
||||
/* 8036E698 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036E69C 38 21 00 E0 */ addi r1, r1, 0xe0
|
||||
/* 8036E6A0 4E 80 00 20 */ blr
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
lbl_8036EB8C:
|
||||
/* 8036EB8C 94 21 FF B0 */ stwu r1, -0x50(r1)
|
||||
/* 8036EB90 7C 08 02 A6 */ mflr r0
|
||||
/* 8036EB94 38 80 00 00 */ li r4, 0
|
||||
/* 8036EB98 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EB9C 90 01 00 54 */ stw r0, 0x54(r1)
|
||||
/* 8036EBA0 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036EBA4 4B C9 48 B5 */ bl memset
|
||||
/* 8036EBA8 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036EBAC 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EBB0 38 00 00 00 */ li r0, 0
|
||||
/* 8036EBB4 98 61 00 0C */ stb r3, 0xc(r1)
|
||||
/* 8036EBB8 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036EBBC 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036EBC0 90 A1 00 08 */ stw r5, 8(r1)
|
||||
/* 8036EBC4 98 01 00 10 */ stb r0, 0x10(r1)
|
||||
/* 8036EBC8 48 00 31 A1 */ bl TRKWriteUARTN
|
||||
/* 8036EBCC 4B C9 69 4D */ bl __TRK_reset
|
||||
/* 8036EBD0 80 01 00 54 */ lwz r0, 0x54(r1)
|
||||
/* 8036EBD4 38 60 00 00 */ li r3, 0
|
||||
/* 8036EBD8 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036EBDC 38 21 00 50 */ addi r1, r1, 0x50
|
||||
/* 8036EBE0 4E 80 00 20 */ blr
|
||||
|
|
@ -1,46 +0,0 @@
|
|||
lbl_8036DD14:
|
||||
/* 8036DD14 94 21 FF B0 */ stwu r1, -0x50(r1)
|
||||
/* 8036DD18 7C 08 02 A6 */ mflr r0
|
||||
/* 8036DD1C 3C 80 80 3A */ lis r4, lit_321@ha /* 0x803A28D0@ha */
|
||||
/* 8036DD20 90 01 00 54 */ stw r0, 0x54(r1)
|
||||
/* 8036DD24 93 E1 00 4C */ stw r31, 0x4c(r1)
|
||||
/* 8036DD28 3B E4 28 D0 */ addi r31, r4, lit_321@l /* 0x803A28D0@l */
|
||||
/* 8036DD2C 93 C1 00 48 */ stw r30, 0x48(r1)
|
||||
/* 8036DD30 88 03 00 18 */ lbz r0, 0x18(r3)
|
||||
/* 8036DD34 8B C3 00 1C */ lbz r30, 0x1c(r3)
|
||||
/* 8036DD38 28 00 00 01 */ cmplwi r0, 1
|
||||
/* 8036DD3C 40 82 00 30 */ bne lbl_8036DD6C
|
||||
/* 8036DD40 38 7F 00 00 */ addi r3, r31, 0
|
||||
/* 8036DD44 4B FF FD D1 */ bl usr_puts_serial
|
||||
/* 8036DD48 28 1E 00 00 */ cmplwi r30, 0
|
||||
/* 8036DD4C 41 82 00 10 */ beq lbl_8036DD5C
|
||||
/* 8036DD50 38 7F 00 20 */ addi r3, r31, 0x20
|
||||
/* 8036DD54 4B FF FD C1 */ bl usr_puts_serial
|
||||
/* 8036DD58 48 00 00 0C */ b lbl_8036DD64
|
||||
lbl_8036DD5C:
|
||||
/* 8036DD5C 38 7F 00 28 */ addi r3, r31, 0x28
|
||||
/* 8036DD60 4B FF FD B5 */ bl usr_puts_serial
|
||||
lbl_8036DD64:
|
||||
/* 8036DD64 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8036DD68 48 00 44 29 */ bl SetUseSerialIO
|
||||
lbl_8036DD6C:
|
||||
/* 8036DD6C 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036DD70 38 80 00 00 */ li r4, 0
|
||||
/* 8036DD74 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DD78 4B C9 56 E1 */ bl memset
|
||||
/* 8036DD7C 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036DD80 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DD84 38 00 00 00 */ li r0, 0
|
||||
/* 8036DD88 98 61 00 0C */ stb r3, 0xc(r1)
|
||||
/* 8036DD8C 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036DD90 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036DD94 90 A1 00 08 */ stw r5, 8(r1)
|
||||
/* 8036DD98 98 01 00 10 */ stb r0, 0x10(r1)
|
||||
/* 8036DD9C 48 00 3F CD */ bl TRKWriteUARTN
|
||||
/* 8036DDA0 80 01 00 54 */ lwz r0, 0x54(r1)
|
||||
/* 8036DDA4 38 60 00 00 */ li r3, 0
|
||||
/* 8036DDA8 83 E1 00 4C */ lwz r31, 0x4c(r1)
|
||||
/* 8036DDAC 83 C1 00 48 */ lwz r30, 0x48(r1)
|
||||
/* 8036DDB0 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036DDB4 38 21 00 50 */ addi r1, r1, 0x50
|
||||
/* 8036DDB8 4E 80 00 20 */ blr
|
||||
|
|
@ -1,148 +0,0 @@
|
|||
lbl_8036DE64:
|
||||
/* 8036DE64 94 21 FE A0 */ stwu r1, -0x160(r1)
|
||||
/* 8036DE68 7C 08 02 A6 */ mflr r0
|
||||
/* 8036DE6C 38 80 00 00 */ li r4, 0
|
||||
/* 8036DE70 90 01 01 64 */ stw r0, 0x164(r1)
|
||||
/* 8036DE74 BF 61 01 4C */ stmw r27, 0x14c(r1)
|
||||
/* 8036DE78 7C 7B 1B 78 */ mr r27, r3
|
||||
/* 8036DE7C 4B FF F7 A1 */ bl TRKSetBufferPosition
|
||||
/* 8036DE80 8B FB 00 18 */ lbz r31, 0x18(r27)
|
||||
/* 8036DE84 83 BB 00 20 */ lwz r29, 0x20(r27)
|
||||
/* 8036DE88 2C 1F 00 10 */ cmpwi r31, 0x10
|
||||
/* 8036DE8C 83 9B 00 24 */ lwz r28, 0x24(r27)
|
||||
/* 8036DE90 41 82 00 2C */ beq lbl_8036DEBC
|
||||
/* 8036DE94 40 80 00 1C */ bge lbl_8036DEB0
|
||||
/* 8036DE98 2C 1F 00 01 */ cmpwi r31, 1
|
||||
/* 8036DE9C 41 82 00 68 */ beq lbl_8036DF04
|
||||
/* 8036DEA0 40 80 00 B4 */ bge lbl_8036DF54
|
||||
/* 8036DEA4 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036DEA8 40 80 00 14 */ bge lbl_8036DEBC
|
||||
/* 8036DEAC 48 00 00 A8 */ b lbl_8036DF54
|
||||
lbl_8036DEB0:
|
||||
/* 8036DEB0 2C 1F 00 12 */ cmpwi r31, 0x12
|
||||
/* 8036DEB4 40 80 00 A0 */ bge lbl_8036DF54
|
||||
/* 8036DEB8 48 00 00 4C */ b lbl_8036DF04
|
||||
lbl_8036DEBC:
|
||||
/* 8036DEBC 8B DB 00 1C */ lbz r30, 0x1c(r27)
|
||||
/* 8036DEC0 28 1E 00 01 */ cmplwi r30, 1
|
||||
/* 8036DEC4 40 80 00 CC */ bge lbl_8036DF90
|
||||
/* 8036DEC8 38 61 01 08 */ addi r3, r1, 0x108
|
||||
/* 8036DECC 38 80 00 00 */ li r4, 0
|
||||
/* 8036DED0 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DED4 4B C9 55 85 */ bl memset
|
||||
/* 8036DED8 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036DEDC 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DEE0 38 00 00 11 */ li r0, 0x11
|
||||
/* 8036DEE4 98 61 01 0C */ stb r3, 0x10c(r1)
|
||||
/* 8036DEE8 38 61 01 08 */ addi r3, r1, 0x108
|
||||
/* 8036DEEC 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036DEF0 90 A1 01 08 */ stw r5, 0x108(r1)
|
||||
/* 8036DEF4 98 01 01 10 */ stb r0, 0x110(r1)
|
||||
/* 8036DEF8 48 00 3E 71 */ bl TRKWriteUARTN
|
||||
/* 8036DEFC 38 60 00 00 */ li r3, 0
|
||||
/* 8036DF00 48 00 01 70 */ b lbl_8036E070
|
||||
lbl_8036DF04:
|
||||
/* 8036DF04 48 00 1E 1D */ bl TRKTargetGetPC
|
||||
/* 8036DF08 7C 03 E8 40 */ cmplw r3, r29
|
||||
/* 8036DF0C 41 80 00 0C */ blt lbl_8036DF18
|
||||
/* 8036DF10 7C 03 E0 40 */ cmplw r3, r28
|
||||
/* 8036DF14 40 81 00 7C */ ble lbl_8036DF90
|
||||
lbl_8036DF18:
|
||||
/* 8036DF18 38 61 00 C8 */ addi r3, r1, 0xc8
|
||||
/* 8036DF1C 38 80 00 00 */ li r4, 0
|
||||
/* 8036DF20 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DF24 4B C9 55 35 */ bl memset
|
||||
/* 8036DF28 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036DF2C 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DF30 38 00 00 11 */ li r0, 0x11
|
||||
/* 8036DF34 98 61 00 CC */ stb r3, 0xcc(r1)
|
||||
/* 8036DF38 38 61 00 C8 */ addi r3, r1, 0xc8
|
||||
/* 8036DF3C 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036DF40 90 A1 00 C8 */ stw r5, 0xc8(r1)
|
||||
/* 8036DF44 98 01 00 D0 */ stb r0, 0xd0(r1)
|
||||
/* 8036DF48 48 00 3E 21 */ bl TRKWriteUARTN
|
||||
/* 8036DF4C 38 60 00 00 */ li r3, 0
|
||||
/* 8036DF50 48 00 01 20 */ b lbl_8036E070
|
||||
lbl_8036DF54:
|
||||
/* 8036DF54 38 61 00 88 */ addi r3, r1, 0x88
|
||||
/* 8036DF58 38 80 00 00 */ li r4, 0
|
||||
/* 8036DF5C 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DF60 4B C9 54 F9 */ bl memset
|
||||
/* 8036DF64 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036DF68 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DF6C 38 00 00 12 */ li r0, 0x12
|
||||
/* 8036DF70 98 61 00 8C */ stb r3, 0x8c(r1)
|
||||
/* 8036DF74 38 61 00 88 */ addi r3, r1, 0x88
|
||||
/* 8036DF78 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036DF7C 90 A1 00 88 */ stw r5, 0x88(r1)
|
||||
/* 8036DF80 98 01 00 90 */ stb r0, 0x90(r1)
|
||||
/* 8036DF84 48 00 3D E5 */ bl TRKWriteUARTN
|
||||
/* 8036DF88 38 60 00 00 */ li r3, 0
|
||||
/* 8036DF8C 48 00 00 E4 */ b lbl_8036E070
|
||||
lbl_8036DF90:
|
||||
/* 8036DF90 48 00 1B 81 */ bl TRKTargetStopped
|
||||
/* 8036DF94 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8036DF98 40 82 00 40 */ bne lbl_8036DFD8
|
||||
/* 8036DF9C 38 61 00 48 */ addi r3, r1, 0x48
|
||||
/* 8036DFA0 38 80 00 00 */ li r4, 0
|
||||
/* 8036DFA4 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DFA8 4B C9 54 B1 */ bl memset
|
||||
/* 8036DFAC 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036DFB0 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DFB4 38 00 00 16 */ li r0, 0x16
|
||||
/* 8036DFB8 98 61 00 4C */ stb r3, 0x4c(r1)
|
||||
/* 8036DFBC 38 61 00 48 */ addi r3, r1, 0x48
|
||||
/* 8036DFC0 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036DFC4 90 A1 00 48 */ stw r5, 0x48(r1)
|
||||
/* 8036DFC8 98 01 00 50 */ stb r0, 0x50(r1)
|
||||
/* 8036DFCC 48 00 3D 9D */ bl TRKWriteUARTN
|
||||
/* 8036DFD0 38 60 00 00 */ li r3, 0
|
||||
/* 8036DFD4 48 00 00 9C */ b lbl_8036E070
|
||||
lbl_8036DFD8:
|
||||
/* 8036DFD8 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036DFDC 38 80 00 00 */ li r4, 0
|
||||
/* 8036DFE0 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DFE4 4B C9 54 75 */ bl memset
|
||||
/* 8036DFE8 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036DFEC 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DFF0 38 00 00 00 */ li r0, 0
|
||||
/* 8036DFF4 98 61 00 0C */ stb r3, 0xc(r1)
|
||||
/* 8036DFF8 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036DFFC 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E000 90 A1 00 08 */ stw r5, 8(r1)
|
||||
/* 8036E004 98 01 00 10 */ stb r0, 0x10(r1)
|
||||
/* 8036E008 48 00 3D 61 */ bl TRKWriteUARTN
|
||||
/* 8036E00C 2C 1F 00 10 */ cmpwi r31, 0x10
|
||||
/* 8036E010 38 60 00 00 */ li r3, 0
|
||||
/* 8036E014 41 82 00 2C */ beq lbl_8036E040
|
||||
/* 8036E018 40 80 00 1C */ bge lbl_8036E034
|
||||
/* 8036E01C 2C 1F 00 01 */ cmpwi r31, 1
|
||||
/* 8036E020 41 82 00 38 */ beq lbl_8036E058
|
||||
/* 8036E024 40 80 00 4C */ bge lbl_8036E070
|
||||
/* 8036E028 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036E02C 40 80 00 14 */ bge lbl_8036E040
|
||||
/* 8036E030 48 00 00 40 */ b lbl_8036E070
|
||||
lbl_8036E034:
|
||||
/* 8036E034 2C 1F 00 12 */ cmpwi r31, 0x12
|
||||
/* 8036E038 40 80 00 38 */ bge lbl_8036E070
|
||||
/* 8036E03C 48 00 00 1C */ b lbl_8036E058
|
||||
lbl_8036E040:
|
||||
/* 8036E040 20 1F 00 10 */ subfic r0, r31, 0x10
|
||||
/* 8036E044 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8036E048 7C 00 00 34 */ cntlzw r0, r0
|
||||
/* 8036E04C 54 04 D9 7E */ srwi r4, r0, 5
|
||||
/* 8036E050 48 00 1D 99 */ bl TRKTargetSingleStep
|
||||
/* 8036E054 48 00 00 1C */ b lbl_8036E070
|
||||
lbl_8036E058:
|
||||
/* 8036E058 20 1F 00 11 */ subfic r0, r31, 0x11
|
||||
/* 8036E05C 7F A3 EB 78 */ mr r3, r29
|
||||
/* 8036E060 7C 00 00 34 */ cntlzw r0, r0
|
||||
/* 8036E064 7F 84 E3 78 */ mr r4, r28
|
||||
/* 8036E068 54 05 D9 7E */ srwi r5, r0, 5
|
||||
/* 8036E06C 48 00 1C C5 */ bl TRKTargetStepOutOfRange
|
||||
lbl_8036E070:
|
||||
/* 8036E070 BB 61 01 4C */ lmw r27, 0x14c(r1)
|
||||
/* 8036E074 80 01 01 64 */ lwz r0, 0x164(r1)
|
||||
/* 8036E078 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036E07C 38 21 01 60 */ addi r1, r1, 0x160
|
||||
/* 8036E080 4E 80 00 20 */ blr
|
||||
|
|
@ -1,50 +0,0 @@
|
|||
lbl_8036DDBC:
|
||||
/* 8036DDBC 94 21 FF B0 */ stwu r1, -0x50(r1)
|
||||
/* 8036DDC0 7C 08 02 A6 */ mflr r0
|
||||
/* 8036DDC4 90 01 00 54 */ stw r0, 0x54(r1)
|
||||
/* 8036DDC8 93 E1 00 4C */ stw r31, 0x4c(r1)
|
||||
/* 8036DDCC 48 00 1D 1D */ bl TRKTargetStop
|
||||
/* 8036DDD0 2C 03 07 04 */ cmpwi r3, 0x704
|
||||
/* 8036DDD4 41 82 00 2C */ beq lbl_8036DE00
|
||||
/* 8036DDD8 40 80 00 10 */ bge lbl_8036DDE8
|
||||
/* 8036DDDC 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8036DDE0 41 82 00 18 */ beq lbl_8036DDF8
|
||||
/* 8036DDE4 48 00 00 34 */ b lbl_8036DE18
|
||||
lbl_8036DDE8:
|
||||
/* 8036DDE8 2C 03 07 06 */ cmpwi r3, 0x706
|
||||
/* 8036DDEC 41 82 00 24 */ beq lbl_8036DE10
|
||||
/* 8036DDF0 40 80 00 28 */ bge lbl_8036DE18
|
||||
/* 8036DDF4 48 00 00 14 */ b lbl_8036DE08
|
||||
lbl_8036DDF8:
|
||||
/* 8036DDF8 3B E0 00 00 */ li r31, 0
|
||||
/* 8036DDFC 48 00 00 20 */ b lbl_8036DE1C
|
||||
lbl_8036DE00:
|
||||
/* 8036DE00 3B E0 00 21 */ li r31, 0x21
|
||||
/* 8036DE04 48 00 00 18 */ b lbl_8036DE1C
|
||||
lbl_8036DE08:
|
||||
/* 8036DE08 3B E0 00 22 */ li r31, 0x22
|
||||
/* 8036DE0C 48 00 00 10 */ b lbl_8036DE1C
|
||||
lbl_8036DE10:
|
||||
/* 8036DE10 3B E0 00 20 */ li r31, 0x20
|
||||
/* 8036DE14 48 00 00 08 */ b lbl_8036DE1C
|
||||
lbl_8036DE18:
|
||||
/* 8036DE18 3B E0 00 01 */ li r31, 1
|
||||
lbl_8036DE1C:
|
||||
/* 8036DE1C 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036DE20 38 80 00 00 */ li r4, 0
|
||||
/* 8036DE24 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DE28 4B C9 56 31 */ bl memset
|
||||
/* 8036DE2C 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036DE30 38 00 00 40 */ li r0, 0x40
|
||||
/* 8036DE34 98 61 00 0C */ stb r3, 0xc(r1)
|
||||
/* 8036DE38 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036DE3C 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036DE40 90 01 00 08 */ stw r0, 8(r1)
|
||||
/* 8036DE44 9B E1 00 10 */ stb r31, 0x10(r1)
|
||||
/* 8036DE48 48 00 3F 21 */ bl TRKWriteUARTN
|
||||
/* 8036DE4C 80 01 00 54 */ lwz r0, 0x54(r1)
|
||||
/* 8036DE50 38 60 00 00 */ li r3, 0
|
||||
/* 8036DE54 83 E1 00 4C */ lwz r31, 0x4c(r1)
|
||||
/* 8036DE58 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036DE5C 38 21 00 50 */ addi r1, r1, 0x50
|
||||
/* 8036DE60 4E 80 00 20 */ blr
|
||||
|
|
@ -1,152 +0,0 @@
|
|||
lbl_8036E6A4:
|
||||
/* 8036E6A4 54 2B 06 FE */ clrlwi r11, r1, 0x1b
|
||||
/* 8036E6A8 7C 2C 0B 78 */ mr r12, r1
|
||||
/* 8036E6AC 21 6B F6 C0 */ subfic r11, r11, -2368
|
||||
/* 8036E6B0 7C 21 59 6E */ stwux r1, r1, r11
|
||||
/* 8036E6B4 7C 08 02 A6 */ mflr r0
|
||||
/* 8036E6B8 90 0C 00 04 */ stw r0, 4(r12)
|
||||
/* 8036E6BC BF 6C FF EC */ stmw r27, -0x14(r12)
|
||||
/* 8036E6C0 7C 7B 1B 78 */ mr r27, r3
|
||||
/* 8036E6C4 3C 60 80 3A */ lis r3, lit_321@ha /* 0x803A28D0@ha */
|
||||
/* 8036E6C8 3B E3 28 D0 */ addi r31, r3, lit_321@l /* 0x803A28D0@l */
|
||||
/* 8036E6CC 38 9F 01 80 */ addi r4, r31, 0x180
|
||||
/* 8036E6D0 38 60 00 01 */ li r3, 1
|
||||
/* 8036E6D4 83 9B 00 20 */ lwz r28, 0x20(r27)
|
||||
/* 8036E6D8 A3 BB 00 1C */ lhz r29, 0x1c(r27)
|
||||
/* 8036E6DC 8B DB 00 18 */ lbz r30, 0x18(r27)
|
||||
/* 8036E6E0 7F 86 E3 78 */ mr r6, r28
|
||||
/* 8036E6E4 88 BB 00 14 */ lbz r5, 0x14(r27)
|
||||
/* 8036E6E8 7F A7 EB 78 */ mr r7, r29
|
||||
/* 8036E6EC 7F C8 F3 78 */ mr r8, r30
|
||||
/* 8036E6F0 4C C6 31 82 */ crclr 6
|
||||
/* 8036E6F4 48 00 45 61 */ bl MWTRACE
|
||||
/* 8036E6F8 57 C0 07 BD */ rlwinm. r0, r30, 0, 0x1e, 0x1e
|
||||
/* 8036E6FC 41 82 00 40 */ beq lbl_8036E73C
|
||||
/* 8036E700 38 61 00 64 */ addi r3, r1, 0x64
|
||||
/* 8036E704 38 80 00 00 */ li r4, 0
|
||||
/* 8036E708 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E70C 4B C9 4D 4D */ bl memset
|
||||
/* 8036E710 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036E714 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E718 38 00 00 12 */ li r0, 0x12
|
||||
/* 8036E71C 98 61 00 68 */ stb r3, 0x68(r1)
|
||||
/* 8036E720 38 61 00 64 */ addi r3, r1, 0x64
|
||||
/* 8036E724 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E728 90 A1 00 64 */ stw r5, 0x64(r1)
|
||||
/* 8036E72C 98 01 00 6C */ stb r0, 0x6c(r1)
|
||||
/* 8036E730 48 00 36 39 */ bl TRKWriteUARTN
|
||||
/* 8036E734 38 60 00 00 */ li r3, 0
|
||||
/* 8036E738 48 00 01 90 */ b lbl_8036E8C8
|
||||
lbl_8036E73C:
|
||||
/* 8036E73C 93 A1 00 20 */ stw r29, 0x20(r1)
|
||||
/* 8036E740 7F 63 DB 78 */ mr r3, r27
|
||||
/* 8036E744 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E748 4B FF EE D5 */ bl TRKSetBufferPosition
|
||||
/* 8036E74C 57 C0 06 73 */ rlwinm. r0, r30, 0, 0x19, 0x19
|
||||
/* 8036E750 41 82 00 38 */ beq lbl_8036E788
|
||||
/* 8036E754 57 80 06 FE */ clrlwi r0, r28, 0x1b
|
||||
/* 8036E758 38 81 01 00 */ addi r4, r1, 0x100
|
||||
/* 8036E75C 80 A1 00 20 */ lwz r5, 0x20(r1)
|
||||
/* 8036E760 7F 63 DB 78 */ mr r3, r27
|
||||
/* 8036E764 7C 84 02 14 */ add r4, r4, r0
|
||||
/* 8036E768 4B FF ED 85 */ bl TRKReadBuffer
|
||||
/* 8036E76C 7F 84 E3 78 */ mr r4, r28
|
||||
/* 8036E770 38 61 01 00 */ addi r3, r1, 0x100
|
||||
/* 8036E774 38 A1 00 20 */ addi r5, r1, 0x20
|
||||
/* 8036E778 38 C0 00 00 */ li r6, 0
|
||||
/* 8036E77C 48 00 12 99 */ bl TRKTargetAccessARAM
|
||||
/* 8036E780 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 8036E784 48 00 00 34 */ b lbl_8036E7B8
|
||||
lbl_8036E788:
|
||||
/* 8036E788 80 A1 00 20 */ lwz r5, 0x20(r1)
|
||||
/* 8036E78C 7F 63 DB 78 */ mr r3, r27
|
||||
/* 8036E790 38 81 01 00 */ addi r4, r1, 0x100
|
||||
/* 8036E794 4B FF ED 59 */ bl TRKReadBuffer
|
||||
/* 8036E798 57 C0 EF FE */ rlwinm r0, r30, 0x1d, 0x1f, 0x1f
|
||||
/* 8036E79C 7F 84 E3 78 */ mr r4, r28
|
||||
/* 8036E7A0 38 61 01 00 */ addi r3, r1, 0x100
|
||||
/* 8036E7A4 38 A1 00 20 */ addi r5, r1, 0x20
|
||||
/* 8036E7A8 68 06 00 01 */ xori r6, r0, 1
|
||||
/* 8036E7AC 38 E0 00 00 */ li r7, 0
|
||||
/* 8036E7B0 48 00 26 25 */ bl TRKTargetAccessMemory
|
||||
/* 8036E7B4 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_8036E7B8:
|
||||
/* 8036E7B8 7F 63 DB 78 */ mr r3, r27
|
||||
/* 8036E7BC 38 80 00 00 */ li r4, 0
|
||||
/* 8036E7C0 4B FF EE 8D */ bl TRKResetBuffer
|
||||
/* 8036E7C4 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036E7C8 40 82 00 3C */ bne lbl_8036E804
|
||||
/* 8036E7CC 38 61 00 A4 */ addi r3, r1, 0xa4
|
||||
/* 8036E7D0 38 80 00 00 */ li r4, 0
|
||||
/* 8036E7D4 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E7D8 4B C9 4C 81 */ bl memset
|
||||
/* 8036E7DC 38 60 00 40 */ li r3, 0x40
|
||||
/* 8036E7E0 38 00 00 80 */ li r0, 0x80
|
||||
/* 8036E7E4 90 61 00 A4 */ stw r3, 0xa4(r1)
|
||||
/* 8036E7E8 7F 63 DB 78 */ mr r3, r27
|
||||
/* 8036E7EC 38 81 00 A4 */ addi r4, r1, 0xa4
|
||||
/* 8036E7F0 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E7F4 98 01 00 A8 */ stb r0, 0xa8(r1)
|
||||
/* 8036E7F8 9B C1 00 AC */ stb r30, 0xac(r1)
|
||||
/* 8036E7FC 4B FF ED 7D */ bl TRKAppendBuffer
|
||||
/* 8036E800 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_8036E804:
|
||||
/* 8036E804 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036E808 41 82 00 8C */ beq lbl_8036E894
|
||||
/* 8036E80C 38 1E F9 00 */ addi r0, r30, -1792
|
||||
/* 8036E810 28 00 00 06 */ cmplwi r0, 6
|
||||
/* 8036E814 41 81 00 44 */ bgt lbl_8036E858
|
||||
/* 8036E818 3C 60 80 3D */ lis r3, lit_499@ha /* 0x803D3200@ha */
|
||||
/* 8036E81C 54 00 10 3A */ slwi r0, r0, 2
|
||||
/* 8036E820 38 63 32 00 */ addi r3, r3, lit_499@l /* 0x803D3200@l */
|
||||
/* 8036E824 7C 03 00 2E */ lwzx r0, r3, r0
|
||||
/* 8036E828 7C 09 03 A6 */ mtctr r0
|
||||
/* 8036E82C 4E 80 04 20 */ bctr
|
||||
/* 8036E830 3B C0 00 15 */ li r30, 0x15
|
||||
/* 8036E834 48 00 00 28 */ b lbl_8036E85C
|
||||
/* 8036E838 3B C0 00 13 */ li r30, 0x13
|
||||
/* 8036E83C 48 00 00 20 */ b lbl_8036E85C
|
||||
/* 8036E840 3B C0 00 21 */ li r30, 0x21
|
||||
/* 8036E844 48 00 00 18 */ b lbl_8036E85C
|
||||
/* 8036E848 3B C0 00 22 */ li r30, 0x22
|
||||
/* 8036E84C 48 00 00 10 */ b lbl_8036E85C
|
||||
/* 8036E850 3B C0 00 20 */ li r30, 0x20
|
||||
/* 8036E854 48 00 00 08 */ b lbl_8036E85C
|
||||
lbl_8036E858:
|
||||
/* 8036E858 3B C0 00 03 */ li r30, 3
|
||||
lbl_8036E85C:
|
||||
/* 8036E85C 38 61 00 24 */ addi r3, r1, 0x24
|
||||
/* 8036E860 38 80 00 00 */ li r4, 0
|
||||
/* 8036E864 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E868 4B C9 4B F1 */ bl memset
|
||||
/* 8036E86C 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036E870 38 00 00 40 */ li r0, 0x40
|
||||
/* 8036E874 98 61 00 28 */ stb r3, 0x28(r1)
|
||||
/* 8036E878 38 61 00 24 */ addi r3, r1, 0x24
|
||||
/* 8036E87C 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E880 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8036E884 9B C1 00 2C */ stb r30, 0x2c(r1)
|
||||
/* 8036E888 48 00 34 E1 */ bl TRKWriteUARTN
|
||||
/* 8036E88C 38 60 00 00 */ li r3, 0
|
||||
/* 8036E890 48 00 00 38 */ b lbl_8036E8C8
|
||||
lbl_8036E894:
|
||||
/* 8036E894 38 9F 00 60 */ addi r4, r31, 0x60
|
||||
/* 8036E898 38 60 00 01 */ li r3, 1
|
||||
/* 8036E89C 4C C6 31 82 */ crclr 6
|
||||
/* 8036E8A0 48 00 43 B5 */ bl MWTRACE
|
||||
/* 8036E8A4 7F 63 DB 78 */ mr r3, r27
|
||||
/* 8036E8A8 4B FF E7 31 */ bl TRKMessageSend
|
||||
/* 8036E8AC 38 9F 00 80 */ addi r4, r31, 0x80
|
||||
/* 8036E8B0 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036E8B4 38 60 00 01 */ li r3, 1
|
||||
/* 8036E8B8 7F E5 FB 78 */ mr r5, r31
|
||||
/* 8036E8BC 4C C6 31 82 */ crclr 6
|
||||
/* 8036E8C0 48 00 43 95 */ bl MWTRACE
|
||||
/* 8036E8C4 7F E3 FB 78 */ mr r3, r31
|
||||
lbl_8036E8C8:
|
||||
/* 8036E8C8 81 41 00 00 */ lwz r10, 0(r1)
|
||||
/* 8036E8CC BB 6A FF EC */ lmw r27, -0x14(r10)
|
||||
/* 8036E8D0 80 0A 00 04 */ lwz r0, 4(r10)
|
||||
/* 8036E8D4 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036E8D8 7D 41 53 78 */ mr r1, r10
|
||||
/* 8036E8DC 4E 80 00 20 */ blr
|
||||
|
|
@ -1,186 +0,0 @@
|
|||
lbl_8036E134:
|
||||
/* 8036E134 94 21 FF 20 */ stwu r1, -0xe0(r1)
|
||||
/* 8036E138 7C 08 02 A6 */ mflr r0
|
||||
/* 8036E13C 38 80 00 00 */ li r4, 0
|
||||
/* 8036E140 90 01 00 E4 */ stw r0, 0xe4(r1)
|
||||
/* 8036E144 93 E1 00 DC */ stw r31, 0xdc(r1)
|
||||
/* 8036E148 93 C1 00 D8 */ stw r30, 0xd8(r1)
|
||||
/* 8036E14C 93 A1 00 D4 */ stw r29, 0xd4(r1)
|
||||
/* 8036E150 93 81 00 D0 */ stw r28, 0xd0(r1)
|
||||
/* 8036E154 7C 7C 1B 78 */ mr r28, r3
|
||||
/* 8036E158 8B E3 00 18 */ lbz r31, 0x18(r3)
|
||||
/* 8036E15C A3 C3 00 1C */ lhz r30, 0x1c(r3)
|
||||
/* 8036E160 A3 A3 00 20 */ lhz r29, 0x20(r3)
|
||||
/* 8036E164 4B FF F4 B9 */ bl TRKSetBufferPosition
|
||||
/* 8036E168 7C 1E E8 40 */ cmplw r30, r29
|
||||
/* 8036E16C 40 81 00 40 */ ble lbl_8036E1AC
|
||||
/* 8036E170 38 61 00 4C */ addi r3, r1, 0x4c
|
||||
/* 8036E174 38 80 00 00 */ li r4, 0
|
||||
/* 8036E178 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E17C 4B C9 52 DD */ bl memset
|
||||
/* 8036E180 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036E184 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E188 38 00 00 14 */ li r0, 0x14
|
||||
/* 8036E18C 98 61 00 50 */ stb r3, 0x50(r1)
|
||||
/* 8036E190 38 61 00 4C */ addi r3, r1, 0x4c
|
||||
/* 8036E194 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E198 90 A1 00 4C */ stw r5, 0x4c(r1)
|
||||
/* 8036E19C 98 01 00 54 */ stb r0, 0x54(r1)
|
||||
/* 8036E1A0 48 00 3B C9 */ bl TRKWriteUARTN
|
||||
/* 8036E1A4 38 60 00 00 */ li r3, 0
|
||||
/* 8036E1A8 48 00 01 FC */ b lbl_8036E3A4
|
||||
lbl_8036E1AC:
|
||||
/* 8036E1AC 7F 83 E3 78 */ mr r3, r28
|
||||
/* 8036E1B0 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E1B4 4B FF F4 69 */ bl TRKSetBufferPosition
|
||||
/* 8036E1B8 2C 1F 00 02 */ cmpwi r31, 2
|
||||
/* 8036E1BC 41 82 00 64 */ beq lbl_8036E220
|
||||
/* 8036E1C0 40 80 00 14 */ bge lbl_8036E1D4
|
||||
/* 8036E1C4 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036E1C8 41 82 00 18 */ beq lbl_8036E1E0
|
||||
/* 8036E1CC 40 80 00 34 */ bge lbl_8036E200
|
||||
/* 8036E1D0 48 00 00 90 */ b lbl_8036E260
|
||||
lbl_8036E1D4:
|
||||
/* 8036E1D4 2C 1F 00 04 */ cmpwi r31, 4
|
||||
/* 8036E1D8 40 80 00 88 */ bge lbl_8036E260
|
||||
/* 8036E1DC 48 00 00 64 */ b lbl_8036E240
|
||||
lbl_8036E1E0:
|
||||
/* 8036E1E0 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8036E1E4 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8036E1E8 7F 85 E3 78 */ mr r5, r28
|
||||
/* 8036E1EC 38 C1 00 08 */ addi r6, r1, 8
|
||||
/* 8036E1F0 38 E0 00 00 */ li r7, 0
|
||||
/* 8036E1F4 48 00 2A A1 */ bl TRKTargetAccessDefault
|
||||
/* 8036E1F8 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036E1FC 48 00 00 68 */ b lbl_8036E264
|
||||
lbl_8036E200:
|
||||
/* 8036E200 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8036E204 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8036E208 7F 85 E3 78 */ mr r5, r28
|
||||
/* 8036E20C 38 C1 00 08 */ addi r6, r1, 8
|
||||
/* 8036E210 38 E0 00 00 */ li r7, 0
|
||||
/* 8036E214 48 00 25 75 */ bl TRKTargetAccessFP
|
||||
/* 8036E218 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036E21C 48 00 00 48 */ b lbl_8036E264
|
||||
lbl_8036E220:
|
||||
/* 8036E220 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8036E224 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8036E228 7F 85 E3 78 */ mr r5, r28
|
||||
/* 8036E22C 38 C1 00 08 */ addi r6, r1, 8
|
||||
/* 8036E230 38 E0 00 00 */ li r7, 0
|
||||
/* 8036E234 48 00 23 E5 */ bl TRKTargetAccessExtended1
|
||||
/* 8036E238 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036E23C 48 00 00 28 */ b lbl_8036E264
|
||||
lbl_8036E240:
|
||||
/* 8036E240 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8036E244 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8036E248 7F 85 E3 78 */ mr r5, r28
|
||||
/* 8036E24C 38 C1 00 08 */ addi r6, r1, 8
|
||||
/* 8036E250 38 E0 00 00 */ li r7, 0
|
||||
/* 8036E254 48 00 1F 8D */ bl TRKTargetAccessExtended2
|
||||
/* 8036E258 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036E25C 48 00 00 08 */ b lbl_8036E264
|
||||
lbl_8036E260:
|
||||
/* 8036E260 3B E0 07 03 */ li r31, 0x703
|
||||
lbl_8036E264:
|
||||
/* 8036E264 7F 83 E3 78 */ mr r3, r28
|
||||
/* 8036E268 38 80 00 00 */ li r4, 0
|
||||
/* 8036E26C 4B FF F3 E1 */ bl TRKResetBuffer
|
||||
/* 8036E270 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036E274 40 82 00 3C */ bne lbl_8036E2B0
|
||||
/* 8036E278 38 61 00 8C */ addi r3, r1, 0x8c
|
||||
/* 8036E27C 38 80 00 00 */ li r4, 0
|
||||
/* 8036E280 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E284 4B C9 51 D5 */ bl memset
|
||||
/* 8036E288 38 60 00 40 */ li r3, 0x40
|
||||
/* 8036E28C 38 00 00 80 */ li r0, 0x80
|
||||
/* 8036E290 90 61 00 8C */ stw r3, 0x8c(r1)
|
||||
/* 8036E294 7F 83 E3 78 */ mr r3, r28
|
||||
/* 8036E298 38 81 00 8C */ addi r4, r1, 0x8c
|
||||
/* 8036E29C 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E2A0 98 01 00 90 */ stb r0, 0x90(r1)
|
||||
/* 8036E2A4 9B E1 00 94 */ stb r31, 0x94(r1)
|
||||
/* 8036E2A8 4B FF F2 D1 */ bl TRKAppendBuffer
|
||||
/* 8036E2AC 7C 7F 1B 78 */ mr r31, r3
|
||||
lbl_8036E2B0:
|
||||
/* 8036E2B0 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036E2B4 41 82 00 B4 */ beq lbl_8036E368
|
||||
/* 8036E2B8 2C 1F 07 03 */ cmpwi r31, 0x703
|
||||
/* 8036E2BC 41 82 00 38 */ beq lbl_8036E2F4
|
||||
/* 8036E2C0 40 80 00 1C */ bge lbl_8036E2DC
|
||||
/* 8036E2C4 2C 1F 07 01 */ cmpwi r31, 0x701
|
||||
/* 8036E2C8 41 82 00 34 */ beq lbl_8036E2FC
|
||||
/* 8036E2CC 40 80 00 40 */ bge lbl_8036E30C
|
||||
/* 8036E2D0 2C 1F 03 02 */ cmpwi r31, 0x302
|
||||
/* 8036E2D4 41 82 00 30 */ beq lbl_8036E304
|
||||
/* 8036E2D8 48 00 00 54 */ b lbl_8036E32C
|
||||
lbl_8036E2DC:
|
||||
/* 8036E2DC 2C 1F 07 06 */ cmpwi r31, 0x706
|
||||
/* 8036E2E0 41 82 00 44 */ beq lbl_8036E324
|
||||
/* 8036E2E4 40 80 00 48 */ bge lbl_8036E32C
|
||||
/* 8036E2E8 2C 1F 07 05 */ cmpwi r31, 0x705
|
||||
/* 8036E2EC 40 80 00 30 */ bge lbl_8036E31C
|
||||
/* 8036E2F0 48 00 00 24 */ b lbl_8036E314
|
||||
lbl_8036E2F4:
|
||||
/* 8036E2F4 3B E0 00 12 */ li r31, 0x12
|
||||
/* 8036E2F8 48 00 00 38 */ b lbl_8036E330
|
||||
lbl_8036E2FC:
|
||||
/* 8036E2FC 3B E0 00 14 */ li r31, 0x14
|
||||
/* 8036E300 48 00 00 30 */ b lbl_8036E330
|
||||
lbl_8036E304:
|
||||
/* 8036E304 3B E0 00 02 */ li r31, 2
|
||||
/* 8036E308 48 00 00 28 */ b lbl_8036E330
|
||||
lbl_8036E30C:
|
||||
/* 8036E30C 3B E0 00 15 */ li r31, 0x15
|
||||
/* 8036E310 48 00 00 20 */ b lbl_8036E330
|
||||
lbl_8036E314:
|
||||
/* 8036E314 3B E0 00 21 */ li r31, 0x21
|
||||
/* 8036E318 48 00 00 18 */ b lbl_8036E330
|
||||
lbl_8036E31C:
|
||||
/* 8036E31C 3B E0 00 22 */ li r31, 0x22
|
||||
/* 8036E320 48 00 00 10 */ b lbl_8036E330
|
||||
lbl_8036E324:
|
||||
/* 8036E324 3B E0 00 20 */ li r31, 0x20
|
||||
/* 8036E328 48 00 00 08 */ b lbl_8036E330
|
||||
lbl_8036E32C:
|
||||
/* 8036E32C 3B E0 00 03 */ li r31, 3
|
||||
lbl_8036E330:
|
||||
/* 8036E330 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036E334 38 80 00 00 */ li r4, 0
|
||||
/* 8036E338 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036E33C 4B C9 51 1D */ bl memset
|
||||
/* 8036E340 38 60 00 80 */ li r3, 0x80
|
||||
/* 8036E344 38 00 00 40 */ li r0, 0x40
|
||||
/* 8036E348 98 61 00 10 */ stb r3, 0x10(r1)
|
||||
/* 8036E34C 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036E350 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036E354 90 01 00 0C */ stw r0, 0xc(r1)
|
||||
/* 8036E358 9B E1 00 14 */ stb r31, 0x14(r1)
|
||||
/* 8036E35C 48 00 3A 0D */ bl TRKWriteUARTN
|
||||
/* 8036E360 38 60 00 00 */ li r3, 0
|
||||
/* 8036E364 48 00 00 40 */ b lbl_8036E3A4
|
||||
lbl_8036E368:
|
||||
/* 8036E368 3C 80 80 3A */ lis r4, lit_403@ha /* 0x803A2930@ha */
|
||||
/* 8036E36C 38 60 00 01 */ li r3, 1
|
||||
/* 8036E370 38 84 29 30 */ addi r4, r4, lit_403@l /* 0x803A2930@l */
|
||||
/* 8036E374 4C C6 31 82 */ crclr 6
|
||||
/* 8036E378 48 00 48 DD */ bl MWTRACE
|
||||
/* 8036E37C 7F 83 E3 78 */ mr r3, r28
|
||||
/* 8036E380 4B FF EC 59 */ bl TRKMessageSend
|
||||
/* 8036E384 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036E388 3C 80 80 3A */ lis r4, lit_404@ha /* 0x803A2950@ha */
|
||||
/* 8036E38C 38 60 00 01 */ li r3, 1
|
||||
/* 8036E390 38 84 29 50 */ addi r4, r4, lit_404@l /* 0x803A2950@l */
|
||||
/* 8036E394 7F E5 FB 78 */ mr r5, r31
|
||||
/* 8036E398 4C C6 31 82 */ crclr 6
|
||||
/* 8036E39C 48 00 48 B9 */ bl MWTRACE
|
||||
/* 8036E3A0 7F E3 FB 78 */ mr r3, r31
|
||||
lbl_8036E3A4:
|
||||
/* 8036E3A4 80 01 00 E4 */ lwz r0, 0xe4(r1)
|
||||
/* 8036E3A8 83 E1 00 DC */ lwz r31, 0xdc(r1)
|
||||
/* 8036E3AC 83 C1 00 D8 */ lwz r30, 0xd8(r1)
|
||||
/* 8036E3B0 83 A1 00 D4 */ lwz r29, 0xd4(r1)
|
||||
/* 8036E3B4 83 81 00 D0 */ lwz r28, 0xd0(r1)
|
||||
/* 8036E3B8 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036E3BC 38 21 00 E0 */ addi r1, r1, 0xe0
|
||||
/* 8036E3C0 4E 80 00 20 */ blr
|
||||
|
|
@ -1,43 +0,0 @@
|
|||
lbl_8036F4B0:
|
||||
/* 8036F4B0 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 8036F4B4 7C 08 02 A6 */ mflr r0
|
||||
/* 8036F4B8 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8036F4BC 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 8036F4C0 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 8036F4C4 93 C1 00 18 */ stw r30, 0x18(r1)
|
||||
/* 8036F4C8 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 8036F4CC 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036F4D0 4B FF E2 4D */ bl TRKGetFreeBuffer
|
||||
/* 8036F4D4 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 8036F4D8 40 82 00 54 */ bne lbl_8036F52C
|
||||
/* 8036F4DC 40 82 00 20 */ bne lbl_8036F4FC
|
||||
/* 8036F4E0 2C 1E 00 90 */ cmpwi r30, 0x90
|
||||
/* 8036F4E4 40 82 00 10 */ bne lbl_8036F4F4
|
||||
/* 8036F4E8 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036F4EC 48 00 0A 2D */ bl TRKTargetAddStopInfo
|
||||
/* 8036F4F0 48 00 00 0C */ b lbl_8036F4FC
|
||||
lbl_8036F4F4:
|
||||
/* 8036F4F4 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036F4F8 48 00 09 9D */ bl TRKTargetAddExceptionInfo
|
||||
lbl_8036F4FC:
|
||||
/* 8036F4FC 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036F500 38 81 00 10 */ addi r4, r1, 0x10
|
||||
/* 8036F504 38 A0 00 02 */ li r5, 2
|
||||
/* 8036F508 38 C0 00 03 */ li r6, 3
|
||||
/* 8036F50C 38 E0 00 01 */ li r7, 1
|
||||
/* 8036F510 4B FF FB 89 */ bl TRKRequestSend
|
||||
/* 8036F514 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 8036F518 40 82 00 0C */ bne lbl_8036F524
|
||||
/* 8036F51C 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036F520 4B FF E1 6D */ bl TRKReleaseBuffer
|
||||
lbl_8036F524:
|
||||
/* 8036F524 80 61 00 0C */ lwz r3, 0xc(r1)
|
||||
/* 8036F528 4B FF E1 65 */ bl TRKReleaseBuffer
|
||||
lbl_8036F52C:
|
||||
/* 8036F52C 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 8036F530 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036F534 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 8036F538 83 C1 00 18 */ lwz r30, 0x18(r1)
|
||||
/* 8036F53C 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036F540 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 8036F544 4E 80 00 20 */ blr
|
||||
|
|
@ -1,60 +0,0 @@
|
|||
lbl_8036CC54:
|
||||
/* 8036CC54 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 8036CC58 7C 08 02 A6 */ mflr r0
|
||||
/* 8036CC5C 3C 80 80 45 */ lis r4, gTRKEventQueue@ha /* 0x8044D890@ha */
|
||||
/* 8036CC60 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8036CC64 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 8036CC68 3B E0 00 00 */ li r31, 0
|
||||
/* 8036CC6C 93 C1 00 18 */ stw r30, 0x18(r1)
|
||||
/* 8036CC70 93 A1 00 14 */ stw r29, 0x14(r1)
|
||||
/* 8036CC74 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 8036CC78 38 64 D8 90 */ addi r3, r4, gTRKEventQueue@l /* 0x8044D890@l */
|
||||
/* 8036CC7C 48 00 28 25 */ bl TRKAcquireMutex
|
||||
/* 8036CC80 3C 60 80 45 */ lis r3, gTRKEventQueue@ha /* 0x8044D890@ha */
|
||||
/* 8036CC84 3B C3 D8 90 */ addi r30, r3, gTRKEventQueue@l /* 0x8044D890@l */
|
||||
/* 8036CC88 80 7E 00 04 */ lwz r3, 4(r30)
|
||||
/* 8036CC8C 2C 03 00 02 */ cmpwi r3, 2
|
||||
/* 8036CC90 40 82 00 0C */ bne lbl_8036CC9C
|
||||
/* 8036CC94 3B E0 01 00 */ li r31, 0x100
|
||||
/* 8036CC98 48 00 00 70 */ b lbl_8036CD08
|
||||
lbl_8036CC9C:
|
||||
/* 8036CC9C 80 1E 00 08 */ lwz r0, 8(r30)
|
||||
/* 8036CCA0 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8036CCA4 38 A0 00 0C */ li r5, 0xc
|
||||
/* 8036CCA8 7C 00 1A 14 */ add r0, r0, r3
|
||||
/* 8036CCAC 54 03 0F FE */ srwi r3, r0, 0x1f
|
||||
/* 8036CCB0 54 00 07 FE */ clrlwi r0, r0, 0x1f
|
||||
/* 8036CCB4 7C 00 1A 78 */ xor r0, r0, r3
|
||||
/* 8036CCB8 7C 03 00 50 */ subf r0, r3, r0
|
||||
/* 8036CCBC 1F A0 00 0C */ mulli r29, r0, 0xc
|
||||
/* 8036CCC0 7C 7E EA 14 */ add r3, r30, r29
|
||||
/* 8036CCC4 38 63 00 0C */ addi r3, r3, 0xc
|
||||
/* 8036CCC8 4B C9 68 F9 */ bl TRK_memcpy
|
||||
/* 8036CCCC 3C 60 80 45 */ lis r3, gTRKEventQueue@ha /* 0x8044D890@ha */
|
||||
/* 8036CCD0 38 83 D8 90 */ addi r4, r3, gTRKEventQueue@l /* 0x8044D890@l */
|
||||
/* 8036CCD4 80 04 00 24 */ lwz r0, 0x24(r4)
|
||||
/* 8036CCD8 7C 64 EA 14 */ add r3, r4, r29
|
||||
/* 8036CCDC 90 03 00 10 */ stw r0, 0x10(r3)
|
||||
/* 8036CCE0 80 64 00 24 */ lwz r3, 0x24(r4)
|
||||
/* 8036CCE4 38 03 00 01 */ addi r0, r3, 1
|
||||
/* 8036CCE8 28 00 01 00 */ cmplwi r0, 0x100
|
||||
/* 8036CCEC 90 04 00 24 */ stw r0, 0x24(r4)
|
||||
/* 8036CCF0 40 80 00 0C */ bge lbl_8036CCFC
|
||||
/* 8036CCF4 38 00 01 00 */ li r0, 0x100
|
||||
/* 8036CCF8 90 04 00 24 */ stw r0, 0x24(r4)
|
||||
lbl_8036CCFC:
|
||||
/* 8036CCFC 80 7E 00 04 */ lwz r3, 4(r30)
|
||||
/* 8036CD00 38 03 00 01 */ addi r0, r3, 1
|
||||
/* 8036CD04 90 1E 00 04 */ stw r0, 4(r30)
|
||||
lbl_8036CD08:
|
||||
/* 8036CD08 3C 60 80 45 */ lis r3, gTRKEventQueue@ha /* 0x8044D890@ha */
|
||||
/* 8036CD0C 38 63 D8 90 */ addi r3, r3, gTRKEventQueue@l /* 0x8044D890@l */
|
||||
/* 8036CD10 48 00 27 89 */ bl TRKReleaseMutex
|
||||
/* 8036CD14 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 8036CD18 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036CD1C 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 8036CD20 83 C1 00 18 */ lwz r30, 0x18(r1)
|
||||
/* 8036CD24 83 A1 00 14 */ lwz r29, 0x14(r1)
|
||||
/* 8036CD28 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036CD2C 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 8036CD30 4E 80 00 20 */ blr
|
||||
|
|
@ -1,94 +0,0 @@
|
|||
lbl_8036CE8C:
|
||||
/* 8036CE8C 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 8036CE90 7C 08 02 A6 */ mflr r0
|
||||
/* 8036CE94 38 A0 00 12 */ li r5, 0x12
|
||||
/* 8036CE98 38 80 00 34 */ li r4, 0x34
|
||||
/* 8036CE9C 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8036CEA0 38 60 00 56 */ li r3, 0x56
|
||||
/* 8036CEA4 38 00 00 78 */ li r0, 0x78
|
||||
/* 8036CEA8 38 C0 00 01 */ li r6, 1
|
||||
/* 8036CEAC 98 A1 00 08 */ stb r5, 8(r1)
|
||||
/* 8036CEB0 3C A0 80 45 */ lis r5, gTRKBigEndian@ha /* 0x8044D8B8@ha */
|
||||
/* 8036CEB4 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 8036CEB8 3B E0 00 00 */ li r31, 0
|
||||
/* 8036CEBC 93 C1 00 18 */ stw r30, 0x18(r1)
|
||||
/* 8036CEC0 98 81 00 09 */ stb r4, 9(r1)
|
||||
/* 8036CEC4 98 61 00 0A */ stb r3, 0xa(r1)
|
||||
/* 8036CEC8 98 01 00 0B */ stb r0, 0xb(r1)
|
||||
/* 8036CECC 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036CED0 94 C5 D8 B8 */ stwu r6, gTRKBigEndian@l(r5) /* 0x8044D8B8@l */
|
||||
/* 8036CED4 3C 03 ED CC */ addis r0, r3, 0xedcc
|
||||
/* 8036CED8 28 00 56 78 */ cmplwi r0, 0x5678
|
||||
/* 8036CEDC 40 82 00 0C */ bne lbl_8036CEE8
|
||||
/* 8036CEE0 90 C5 00 00 */ stw r6, 0(r5)
|
||||
/* 8036CEE4 48 00 00 1C */ b lbl_8036CF00
|
||||
lbl_8036CEE8:
|
||||
/* 8036CEE8 3C 03 87 AA */ addis r0, r3, 0x87aa
|
||||
/* 8036CEEC 28 00 34 12 */ cmplwi r0, 0x3412
|
||||
/* 8036CEF0 40 82 00 0C */ bne lbl_8036CEFC
|
||||
/* 8036CEF4 93 E5 00 00 */ stw r31, 0(r5)
|
||||
/* 8036CEF8 48 00 00 08 */ b lbl_8036CF00
|
||||
lbl_8036CEFC:
|
||||
/* 8036CEFC 7C DF 33 78 */ mr r31, r6
|
||||
lbl_8036CF00:
|
||||
/* 8036CF00 3C 60 80 3A */ lis r3, lit_154@ha /* 0x803A26A4@ha */
|
||||
/* 8036CF04 38 83 26 A4 */ addi r4, r3, lit_154@l /* 0x803A26A4@l */
|
||||
/* 8036CF08 38 60 00 01 */ li r3, 1
|
||||
/* 8036CF0C 4C C6 31 82 */ crclr 6
|
||||
/* 8036CF10 48 00 5D 45 */ bl MWTRACE
|
||||
/* 8036CF14 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036CF18 40 82 00 08 */ bne lbl_8036CF20
|
||||
/* 8036CF1C 48 00 0B F5 */ bl usr_put_initialize
|
||||
lbl_8036CF20:
|
||||
/* 8036CF20 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036CF24 40 82 00 0C */ bne lbl_8036CF30
|
||||
/* 8036CF28 4B FF FE C1 */ bl TRKInitializeEventQueue
|
||||
/* 8036CF2C 7C 7F 1B 78 */ mr r31, r3
|
||||
lbl_8036CF30:
|
||||
/* 8036CF30 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036CF34 40 82 00 0C */ bne lbl_8036CF40
|
||||
/* 8036CF38 48 00 08 AD */ bl TRKInitializeMessageBuffers
|
||||
/* 8036CF3C 7C 7F 1B 78 */ mr r31, r3
|
||||
lbl_8036CF40:
|
||||
/* 8036CF40 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036CF44 40 82 00 0C */ bne lbl_8036CF50
|
||||
/* 8036CF48 48 00 0D C5 */ bl TRKInitializeDispatcher
|
||||
/* 8036CF4C 7C 7F 1B 78 */ mr r31, r3
|
||||
lbl_8036CF50:
|
||||
/* 8036CF50 48 00 4D 31 */ bl InitializeProgramEndTrap
|
||||
/* 8036CF54 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036CF58 40 82 00 0C */ bne lbl_8036CF64
|
||||
/* 8036CF5C 48 00 09 05 */ bl TRKInitializeSerialHandler
|
||||
/* 8036CF60 7C 7F 1B 78 */ mr r31, r3
|
||||
lbl_8036CF64:
|
||||
/* 8036CF64 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036CF68 40 82 00 0C */ bne lbl_8036CF74
|
||||
/* 8036CF6C 48 00 4A 41 */ bl TRKInitializeTarget
|
||||
/* 8036CF70 7C 7F 1B 78 */ mr r31, r3
|
||||
lbl_8036CF74:
|
||||
/* 8036CF74 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036CF78 40 82 00 44 */ bne lbl_8036CFBC
|
||||
/* 8036CF7C 3C 60 80 45 */ lis r3, gTRKInputPendingPtr@ha /* 0x804519B8@ha */
|
||||
/* 8036CF80 3C A0 00 01 */ lis r5, 0x0001 /* 0x0000E100@ha */
|
||||
/* 8036CF84 38 C3 19 B8 */ addi r6, r3, gTRKInputPendingPtr@l /* 0x804519B8@l */
|
||||
/* 8036CF88 38 80 00 01 */ li r4, 1
|
||||
/* 8036CF8C 38 65 E1 00 */ addi r3, r5, 0xE100 /* 0x0000E100@l */
|
||||
/* 8036CF90 38 A0 00 00 */ li r5, 0
|
||||
/* 8036CF94 48 00 4E C5 */ bl TRKInitializeIntDrivenUART
|
||||
/* 8036CF98 3C 80 80 45 */ lis r4, gTRKInputPendingPtr@ha /* 0x804519B8@ha */
|
||||
/* 8036CF9C 7C 60 1B 78 */ mr r0, r3
|
||||
/* 8036CFA0 38 64 19 B8 */ addi r3, r4, gTRKInputPendingPtr@l /* 0x804519B8@l */
|
||||
/* 8036CFA4 80 63 00 00 */ lwz r3, 0(r3)
|
||||
/* 8036CFA8 7C 1E 03 78 */ mr r30, r0
|
||||
/* 8036CFAC 48 00 2B 2D */ bl TRKTargetSetInputPendingPtr
|
||||
/* 8036CFB0 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036CFB4 41 82 00 08 */ beq lbl_8036CFBC
|
||||
/* 8036CFB8 7F DF F3 78 */ mr r31, r30
|
||||
lbl_8036CFBC:
|
||||
/* 8036CFBC 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 8036CFC0 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036CFC4 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 8036CFC8 83 C1 00 18 */ lwz r30, 0x18(r1)
|
||||
/* 8036CFCC 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036CFD0 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 8036CFD4 4E 80 00 20 */ blr
|
||||
|
|
@ -1,26 +0,0 @@
|
|||
lbl_8036D974:
|
||||
/* 8036D974 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 8036D978 7C 08 02 A6 */ mflr r0
|
||||
/* 8036D97C 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8036D980 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 8036D984 48 00 00 51 */ bl TRKTestForPacket
|
||||
/* 8036D988 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036D98C 2C 1F FF FF */ cmpwi r31, -1
|
||||
/* 8036D990 41 82 00 30 */ beq lbl_8036D9C0
|
||||
/* 8036D994 4B FF FD 5D */ bl TRKGetBuffer
|
||||
/* 8036D998 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036D99C 38 80 00 02 */ li r4, 2
|
||||
/* 8036D9A0 4B FF F2 9D */ bl TRKConstructEvent
|
||||
/* 8036D9A4 3C 60 80 45 */ lis r3, gTRKFramingState@ha /* 0x8044F270@ha */
|
||||
/* 8036D9A8 38 00 FF FF */ li r0, -1
|
||||
/* 8036D9AC 38 83 F2 70 */ addi r4, r3, gTRKFramingState@l /* 0x8044F270@l */
|
||||
/* 8036D9B0 93 E1 00 10 */ stw r31, 0x10(r1)
|
||||
/* 8036D9B4 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036D9B8 90 04 00 00 */ stw r0, 0(r4)
|
||||
/* 8036D9BC 4B FF F2 99 */ bl TRKPostEvent
|
||||
lbl_8036D9C0:
|
||||
/* 8036D9C0 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 8036D9C4 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 8036D9C8 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036D9CC 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 8036D9D0 4E 80 00 20 */ blr
|
||||
|
|
@ -1,50 +0,0 @@
|
|||
lbl_8036D860:
|
||||
/* 8036D860 94 21 FF F0 */ stwu r1, -0x10(r1)
|
||||
/* 8036D864 7C 08 02 A6 */ mflr r0
|
||||
/* 8036D868 3C 60 80 45 */ lis r3, gTRKFramingState@ha /* 0x8044F270@ha */
|
||||
/* 8036D86C 3C 80 80 3A */ lis r4, lit_121@ha /* 0x803A2700@ha */
|
||||
/* 8036D870 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 8036D874 38 C3 F2 70 */ addi r6, r3, gTRKFramingState@l /* 0x8044F270@l */
|
||||
/* 8036D878 38 00 00 00 */ li r0, 0
|
||||
/* 8036D87C 38 60 FF FF */ li r3, -1
|
||||
/* 8036D880 93 E1 00 0C */ stw r31, 0xc(r1)
|
||||
/* 8036D884 3B E4 27 00 */ addi r31, r4, lit_121@l /* 0x803A2700@l */
|
||||
/* 8036D888 38 9F 00 00 */ addi r4, r31, 0
|
||||
/* 8036D88C 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036D890 90 66 00 00 */ stw r3, 0(r6)
|
||||
/* 8036D894 38 60 00 01 */ li r3, 1
|
||||
/* 8036D898 90 06 00 08 */ stw r0, 8(r6)
|
||||
/* 8036D89C 90 06 00 0C */ stw r0, 0xc(r6)
|
||||
/* 8036D8A0 4C C6 31 82 */ crclr 6
|
||||
/* 8036D8A4 48 00 53 B1 */ bl MWTRACE
|
||||
/* 8036D8A8 38 9F 00 24 */ addi r4, r31, 0x24
|
||||
/* 8036D8AC 38 60 00 01 */ li r3, 1
|
||||
/* 8036D8B0 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036D8B4 4C C6 31 82 */ crclr 6
|
||||
/* 8036D8B8 48 00 53 9D */ bl MWTRACE
|
||||
/* 8036D8BC 38 9F 00 48 */ addi r4, r31, 0x48
|
||||
/* 8036D8C0 38 60 00 01 */ li r3, 1
|
||||
/* 8036D8C4 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036D8C8 4C C6 31 82 */ crclr 6
|
||||
/* 8036D8CC 48 00 53 89 */ bl MWTRACE
|
||||
/* 8036D8D0 38 9F 00 6C */ addi r4, r31, 0x6c
|
||||
/* 8036D8D4 38 60 00 01 */ li r3, 1
|
||||
/* 8036D8D8 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036D8DC 4C C6 31 82 */ crclr 6
|
||||
/* 8036D8E0 48 00 53 75 */ bl MWTRACE
|
||||
/* 8036D8E4 38 9F 00 8C */ addi r4, r31, 0x8c
|
||||
/* 8036D8E8 38 60 00 01 */ li r3, 1
|
||||
/* 8036D8EC 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036D8F0 4C C6 31 82 */ crclr 6
|
||||
/* 8036D8F4 48 00 53 61 */ bl MWTRACE
|
||||
/* 8036D8F8 38 9F 00 AC */ addi r4, r31, 0xac
|
||||
/* 8036D8FC 38 60 00 01 */ li r3, 1
|
||||
/* 8036D900 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036D904 4C C6 31 82 */ crclr 6
|
||||
/* 8036D908 48 00 53 4D */ bl MWTRACE
|
||||
/* 8036D90C 80 01 00 14 */ lwz r0, 0x14(r1)
|
||||
/* 8036D910 38 60 00 00 */ li r3, 0
|
||||
/* 8036D914 83 E1 00 0C */ lwz r31, 0xc(r1)
|
||||
/* 8036D918 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036D91C 38 21 00 10 */ addi r1, r1, 0x10
|
||||
/* 8036D920 4E 80 00 20 */ blr
|
||||
|
|
@ -1,21 +0,0 @@
|
|||
lbl_8036D924:
|
||||
/* 8036D924 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 8036D928 7C 08 02 A6 */ mflr r0
|
||||
/* 8036D92C 38 80 00 02 */ li r4, 2
|
||||
/* 8036D930 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8036D934 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 8036D938 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036D93C 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036D940 4B FF F2 FD */ bl TRKConstructEvent
|
||||
/* 8036D944 3C 60 80 45 */ lis r3, gTRKFramingState@ha /* 0x8044F270@ha */
|
||||
/* 8036D948 38 00 FF FF */ li r0, -1
|
||||
/* 8036D94C 38 83 F2 70 */ addi r4, r3, gTRKFramingState@l /* 0x8044F270@l */
|
||||
/* 8036D950 93 E1 00 10 */ stw r31, 0x10(r1)
|
||||
/* 8036D954 38 61 00 08 */ addi r3, r1, 8
|
||||
/* 8036D958 90 04 00 00 */ stw r0, 0(r4)
|
||||
/* 8036D95C 4B FF F2 F9 */ bl TRKPostEvent
|
||||
/* 8036D960 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 8036D964 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
||||
/* 8036D968 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036D96C 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 8036D970 4E 80 00 20 */ blr
|
||||
|
|
@ -1,85 +0,0 @@
|
|||
lbl_8036D9D4:
|
||||
/* 8036D9D4 94 21 F7 20 */ stwu r1, -0x8e0(r1)
|
||||
/* 8036D9D8 7C 08 02 A6 */ mflr r0
|
||||
/* 8036D9DC 3C 60 80 3A */ lis r3, lit_121@ha /* 0x803A2700@ha */
|
||||
/* 8036D9E0 90 01 08 E4 */ stw r0, 0x8e4(r1)
|
||||
/* 8036D9E4 93 E1 08 DC */ stw r31, 0x8dc(r1)
|
||||
/* 8036D9E8 3B E3 27 00 */ addi r31, r3, lit_121@l /* 0x803A2700@l */
|
||||
/* 8036D9EC 93 C1 08 D8 */ stw r30, 0x8d8(r1)
|
||||
/* 8036D9F0 48 00 43 F1 */ bl TRKPollUART
|
||||
/* 8036D9F4 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8036D9F8 41 81 00 0C */ bgt lbl_8036DA04
|
||||
/* 8036D9FC 38 60 FF FF */ li r3, -1
|
||||
/* 8036DA00 48 00 00 F8 */ b lbl_8036DAF8
|
||||
lbl_8036DA04:
|
||||
/* 8036DA04 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036DA08 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 8036DA0C 4B FF FD 11 */ bl TRKGetFreeBuffer
|
||||
/* 8036DA10 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 8036DA14 38 9F 00 D0 */ addi r4, r31, 0xd0
|
||||
/* 8036DA18 38 60 00 04 */ li r3, 4
|
||||
/* 8036DA1C 7F C5 F3 78 */ mr r5, r30
|
||||
/* 8036DA20 4C C6 31 82 */ crclr 6
|
||||
/* 8036DA24 48 00 52 31 */ bl MWTRACE
|
||||
/* 8036DA28 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036DA2C 38 80 00 00 */ li r4, 0
|
||||
/* 8036DA30 4B FF FB ED */ bl TRKSetBufferPosition
|
||||
/* 8036DA34 38 61 00 10 */ addi r3, r1, 0x10
|
||||
/* 8036DA38 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036DA3C 48 00 43 69 */ bl TRKReadUARTN
|
||||
/* 8036DA40 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8036DA44 40 82 00 80 */ bne lbl_8036DAC4
|
||||
/* 8036DA48 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036DA4C 38 81 00 10 */ addi r4, r1, 0x10
|
||||
/* 8036DA50 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036DA54 4B FF F9 35 */ bl TRKAppendBuffer_ui8
|
||||
/* 8036DA58 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036DA5C 83 C1 00 0C */ lwz r30, 0xc(r1)
|
||||
/* 8036DA60 34 A3 FF C0 */ addic. r5, r3, -64
|
||||
/* 8036DA64 40 81 00 7C */ ble lbl_8036DAE0
|
||||
/* 8036DA68 38 9F 00 F4 */ addi r4, r31, 0xf4
|
||||
/* 8036DA6C 38 60 00 01 */ li r3, 1
|
||||
/* 8036DA70 4C C6 31 82 */ crclr 6
|
||||
/* 8036DA74 48 00 51 E1 */ bl MWTRACE
|
||||
/* 8036DA78 80 81 00 10 */ lwz r4, 0x10(r1)
|
||||
/* 8036DA7C 38 61 00 50 */ addi r3, r1, 0x50
|
||||
/* 8036DA80 38 84 FF C0 */ addi r4, r4, -64
|
||||
/* 8036DA84 48 00 43 21 */ bl TRKReadUARTN
|
||||
/* 8036DA88 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8036DA8C 40 82 00 18 */ bne lbl_8036DAA4
|
||||
/* 8036DA90 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036DA94 38 81 00 50 */ addi r4, r1, 0x50
|
||||
/* 8036DA98 80 A1 00 10 */ lwz r5, 0x10(r1)
|
||||
/* 8036DA9C 4B FF F8 ED */ bl TRKAppendBuffer_ui8
|
||||
/* 8036DAA0 48 00 00 40 */ b lbl_8036DAE0
|
||||
lbl_8036DAA4:
|
||||
/* 8036DAA4 38 9F 01 10 */ addi r4, r31, 0x110
|
||||
/* 8036DAA8 38 60 00 08 */ li r3, 8
|
||||
/* 8036DAAC 4C C6 31 82 */ crclr 6
|
||||
/* 8036DAB0 48 00 51 A5 */ bl MWTRACE
|
||||
/* 8036DAB4 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8036DAB8 4B FF FB D5 */ bl TRKReleaseBuffer
|
||||
/* 8036DABC 3B C0 FF FF */ li r30, -1
|
||||
/* 8036DAC0 48 00 00 20 */ b lbl_8036DAE0
|
||||
lbl_8036DAC4:
|
||||
/* 8036DAC4 38 9F 01 44 */ addi r4, r31, 0x144
|
||||
/* 8036DAC8 38 60 00 08 */ li r3, 8
|
||||
/* 8036DACC 4C C6 31 82 */ crclr 6
|
||||
/* 8036DAD0 48 00 51 85 */ bl MWTRACE
|
||||
/* 8036DAD4 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8036DAD8 4B FF FB B5 */ bl TRKReleaseBuffer
|
||||
/* 8036DADC 3B C0 FF FF */ li r30, -1
|
||||
lbl_8036DAE0:
|
||||
/* 8036DAE0 7F C5 F3 78 */ mr r5, r30
|
||||
/* 8036DAE4 38 9F 01 6C */ addi r4, r31, 0x16c
|
||||
/* 8036DAE8 38 60 00 01 */ li r3, 1
|
||||
/* 8036DAEC 4C C6 31 82 */ crclr 6
|
||||
/* 8036DAF0 48 00 51 65 */ bl MWTRACE
|
||||
/* 8036DAF4 7F C3 F3 78 */ mr r3, r30
|
||||
lbl_8036DAF8:
|
||||
/* 8036DAF8 80 01 08 E4 */ lwz r0, 0x8e4(r1)
|
||||
/* 8036DAFC 83 E1 08 DC */ lwz r31, 0x8dc(r1)
|
||||
/* 8036DB00 83 C1 08 D8 */ lwz r30, 0x8d8(r1)
|
||||
/* 8036DB04 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036DB08 38 21 08 E0 */ addi r1, r1, 0x8e0
|
||||
/* 8036DB0C 4E 80 00 20 */ blr
|
||||
|
|
@ -1,63 +0,0 @@
|
|||
lbl_8036EE94:
|
||||
/* 8036EE94 94 21 FF 90 */ stwu r1, -0x70(r1)
|
||||
/* 8036EE98 7C 08 02 A6 */ mflr r0
|
||||
/* 8036EE9C 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EEA0 90 01 00 74 */ stw r0, 0x74(r1)
|
||||
/* 8036EEA4 93 E1 00 6C */ stw r31, 0x6c(r1)
|
||||
/* 8036EEA8 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036EEAC 38 61 00 14 */ addi r3, r1, 0x14
|
||||
/* 8036EEB0 93 C1 00 68 */ stw r30, 0x68(r1)
|
||||
/* 8036EEB4 93 A1 00 64 */ stw r29, 0x64(r1)
|
||||
/* 8036EEB8 7C 9D 23 78 */ mr r29, r4
|
||||
/* 8036EEBC 38 80 00 00 */ li r4, 0
|
||||
/* 8036EEC0 4B C9 45 99 */ bl memset
|
||||
/* 8036EEC4 38 60 00 D3 */ li r3, 0xd3
|
||||
/* 8036EEC8 38 00 00 40 */ li r0, 0x40
|
||||
/* 8036EECC 98 61 00 18 */ stb r3, 0x18(r1)
|
||||
/* 8036EED0 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036EED4 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 8036EED8 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 8036EEDC 93 E1 00 1C */ stw r31, 0x1c(r1)
|
||||
/* 8036EEE0 4B FF E8 3D */ bl TRKGetFreeBuffer
|
||||
/* 8036EEE4 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 8036EEE8 40 82 00 18 */ bne lbl_8036EF00
|
||||
/* 8036EEEC 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036EEF0 38 81 00 14 */ addi r4, r1, 0x14
|
||||
/* 8036EEF4 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EEF8 4B FF E4 91 */ bl TRKAppendBuffer_ui8
|
||||
/* 8036EEFC 7C 7F 1B 78 */ mr r31, r3
|
||||
lbl_8036EF00:
|
||||
/* 8036EF00 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036EF04 40 82 00 50 */ bne lbl_8036EF54
|
||||
/* 8036EF08 38 00 00 00 */ li r0, 0
|
||||
/* 8036EF0C 38 81 00 10 */ addi r4, r1, 0x10
|
||||
/* 8036EF10 90 1D 00 00 */ stw r0, 0(r29)
|
||||
/* 8036EF14 38 A0 00 03 */ li r5, 3
|
||||
/* 8036EF18 38 C0 00 03 */ li r6, 3
|
||||
/* 8036EF1C 38 E0 00 00 */ li r7, 0
|
||||
/* 8036EF20 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036EF24 48 00 01 75 */ bl TRKRequestSend
|
||||
/* 8036EF28 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 8036EF2C 40 82 00 10 */ bne lbl_8036EF3C
|
||||
/* 8036EF30 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036EF34 4B FF E7 BD */ bl TRKGetBuffer
|
||||
/* 8036EF38 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_8036EF3C:
|
||||
/* 8036EF3C 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036EF40 40 82 00 0C */ bne lbl_8036EF4C
|
||||
/* 8036EF44 80 1E 00 20 */ lwz r0, 0x20(r30)
|
||||
/* 8036EF48 90 1D 00 00 */ stw r0, 0(r29)
|
||||
lbl_8036EF4C:
|
||||
/* 8036EF4C 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036EF50 4B FF E7 3D */ bl TRKReleaseBuffer
|
||||
lbl_8036EF54:
|
||||
/* 8036EF54 80 61 00 0C */ lwz r3, 0xc(r1)
|
||||
/* 8036EF58 4B FF E7 35 */ bl TRKReleaseBuffer
|
||||
/* 8036EF5C 80 01 00 74 */ lwz r0, 0x74(r1)
|
||||
/* 8036EF60 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036EF64 83 E1 00 6C */ lwz r31, 0x6c(r1)
|
||||
/* 8036EF68 83 C1 00 68 */ lwz r30, 0x68(r1)
|
||||
/* 8036EF6C 83 A1 00 64 */ lwz r29, 0x64(r1)
|
||||
/* 8036EF70 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036EF74 38 21 00 70 */ addi r1, r1, 0x70
|
||||
/* 8036EF78 4E 80 00 20 */ blr
|
||||
|
|
@ -1,75 +0,0 @@
|
|||
lbl_8036EF7C:
|
||||
/* 8036EF7C 94 21 FF 90 */ stwu r1, -0x70(r1)
|
||||
/* 8036EF80 7C 08 02 A6 */ mflr r0
|
||||
/* 8036EF84 90 01 00 74 */ stw r0, 0x74(r1)
|
||||
/* 8036EF88 BF 61 00 5C */ stmw r27, 0x5c(r1)
|
||||
/* 8036EF8C 7C 7B 1B 78 */ mr r27, r3
|
||||
/* 8036EF90 7C 9F 23 78 */ mr r31, r4
|
||||
/* 8036EF94 7C BC 2B 78 */ mr r28, r5
|
||||
/* 8036EF98 7C DD 33 78 */ mr r29, r6
|
||||
/* 8036EF9C 38 61 00 14 */ addi r3, r1, 0x14
|
||||
/* 8036EFA0 38 80 00 00 */ li r4, 0
|
||||
/* 8036EFA4 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EFA8 4B C9 44 B1 */ bl memset
|
||||
/* 8036EFAC 38 60 00 00 */ li r3, 0
|
||||
/* 8036EFB0 38 00 00 D2 */ li r0, 0xd2
|
||||
/* 8036EFB4 90 7C 00 00 */ stw r3, 0(r28)
|
||||
/* 8036EFB8 7F 63 DB 78 */ mr r3, r27
|
||||
/* 8036EFBC 98 01 00 18 */ stb r0, 0x18(r1)
|
||||
/* 8036EFC0 4B FF 9C 25 */ bl strlen
|
||||
/* 8036EFC4 38 03 00 41 */ addi r0, r3, 0x41
|
||||
/* 8036EFC8 9B E1 00 1C */ stb r31, 0x1c(r1)
|
||||
/* 8036EFCC 7F 63 DB 78 */ mr r3, r27
|
||||
/* 8036EFD0 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 8036EFD4 4B FF 9C 11 */ bl strlen
|
||||
/* 8036EFD8 38 03 00 01 */ addi r0, r3, 1
|
||||
/* 8036EFDC 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036EFE0 B0 01 00 20 */ sth r0, 0x20(r1)
|
||||
/* 8036EFE4 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 8036EFE8 4B FF E7 35 */ bl TRKGetFreeBuffer
|
||||
/* 8036EFEC 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036EFF0 38 81 00 14 */ addi r4, r1, 0x14
|
||||
/* 8036EFF4 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EFF8 4B FF E3 91 */ bl TRKAppendBuffer_ui8
|
||||
/* 8036EFFC 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 8036F000 40 82 00 24 */ bne lbl_8036F024
|
||||
/* 8036F004 7F 63 DB 78 */ mr r3, r27
|
||||
/* 8036F008 4B FF 9B DD */ bl strlen
|
||||
/* 8036F00C 7C 65 1B 78 */ mr r5, r3
|
||||
/* 8036F010 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036F014 7F 64 DB 78 */ mr r4, r27
|
||||
/* 8036F018 38 A5 00 01 */ addi r5, r5, 1
|
||||
/* 8036F01C 4B FF E3 6D */ bl TRKAppendBuffer_ui8
|
||||
/* 8036F020 7C 7F 1B 78 */ mr r31, r3
|
||||
lbl_8036F024:
|
||||
/* 8036F024 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036F028 40 82 00 50 */ bne lbl_8036F078
|
||||
/* 8036F02C 38 00 00 00 */ li r0, 0
|
||||
/* 8036F030 38 81 00 10 */ addi r4, r1, 0x10
|
||||
/* 8036F034 90 1D 00 00 */ stw r0, 0(r29)
|
||||
/* 8036F038 38 A0 00 07 */ li r5, 7
|
||||
/* 8036F03C 38 C0 00 03 */ li r6, 3
|
||||
/* 8036F040 38 E0 00 00 */ li r7, 0
|
||||
/* 8036F044 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036F048 48 00 00 51 */ bl TRKRequestSend
|
||||
/* 8036F04C 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 8036F050 40 82 00 10 */ bne lbl_8036F060
|
||||
/* 8036F054 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036F058 4B FF E6 99 */ bl TRKGetBuffer
|
||||
/* 8036F05C 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_8036F060:
|
||||
/* 8036F060 80 1E 00 20 */ lwz r0, 0x20(r30)
|
||||
/* 8036F064 90 1D 00 00 */ stw r0, 0(r29)
|
||||
/* 8036F068 80 1E 00 18 */ lwz r0, 0x18(r30)
|
||||
/* 8036F06C 90 1C 00 00 */ stw r0, 0(r28)
|
||||
/* 8036F070 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036F074 4B FF E6 19 */ bl TRKReleaseBuffer
|
||||
lbl_8036F078:
|
||||
/* 8036F078 80 61 00 0C */ lwz r3, 0xc(r1)
|
||||
/* 8036F07C 4B FF E6 11 */ bl TRKReleaseBuffer
|
||||
/* 8036F080 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036F084 BB 61 00 5C */ lmw r27, 0x5c(r1)
|
||||
/* 8036F088 80 01 00 74 */ lwz r0, 0x74(r1)
|
||||
/* 8036F08C 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036F090 38 21 00 70 */ addi r1, r1, 0x70
|
||||
/* 8036F094 4E 80 00 20 */ blr
|
||||
|
|
@ -1,72 +0,0 @@
|
|||
lbl_8036ED84:
|
||||
/* 8036ED84 94 21 FF 90 */ stwu r1, -0x70(r1)
|
||||
/* 8036ED88 7C 08 02 A6 */ mflr r0
|
||||
/* 8036ED8C 90 01 00 74 */ stw r0, 0x74(r1)
|
||||
/* 8036ED90 93 E1 00 6C */ stw r31, 0x6c(r1)
|
||||
/* 8036ED94 7C BF 2B 78 */ mr r31, r5
|
||||
/* 8036ED98 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036ED9C 93 C1 00 68 */ stw r30, 0x68(r1)
|
||||
/* 8036EDA0 7C DE 33 78 */ mr r30, r6
|
||||
/* 8036EDA4 93 A1 00 64 */ stw r29, 0x64(r1)
|
||||
/* 8036EDA8 7C 9D 23 78 */ mr r29, r4
|
||||
/* 8036EDAC 38 80 00 00 */ li r4, 0
|
||||
/* 8036EDB0 93 81 00 60 */ stw r28, 0x60(r1)
|
||||
/* 8036EDB4 7C 7C 1B 78 */ mr r28, r3
|
||||
/* 8036EDB8 38 61 00 14 */ addi r3, r1, 0x14
|
||||
/* 8036EDBC 4B C9 46 9D */ bl memset
|
||||
/* 8036EDC0 38 60 00 D4 */ li r3, 0xd4
|
||||
/* 8036EDC4 38 00 00 40 */ li r0, 0x40
|
||||
/* 8036EDC8 98 61 00 18 */ stb r3, 0x18(r1)
|
||||
/* 8036EDCC 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036EDD0 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 8036EDD4 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 8036EDD8 93 81 00 1C */ stw r28, 0x1c(r1)
|
||||
/* 8036EDDC 80 1D 00 00 */ lwz r0, 0(r29)
|
||||
/* 8036EDE0 90 01 00 20 */ stw r0, 0x20(r1)
|
||||
/* 8036EDE4 9B E1 00 24 */ stb r31, 0x24(r1)
|
||||
/* 8036EDE8 4B FF E9 35 */ bl TRKGetFreeBuffer
|
||||
/* 8036EDEC 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 8036EDF0 40 82 00 18 */ bne lbl_8036EE08
|
||||
/* 8036EDF4 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036EDF8 38 81 00 14 */ addi r4, r1, 0x14
|
||||
/* 8036EDFC 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036EE00 4B FF E5 89 */ bl TRKAppendBuffer_ui8
|
||||
/* 8036EE04 7C 7F 1B 78 */ mr r31, r3
|
||||
lbl_8036EE08:
|
||||
/* 8036EE08 2C 1F 00 00 */ cmpwi r31, 0
|
||||
/* 8036EE0C 40 82 00 5C */ bne lbl_8036EE68
|
||||
/* 8036EE10 38 60 00 00 */ li r3, 0
|
||||
/* 8036EE14 38 00 FF FF */ li r0, -1
|
||||
/* 8036EE18 90 7E 00 00 */ stw r3, 0(r30)
|
||||
/* 8036EE1C 38 81 00 10 */ addi r4, r1, 0x10
|
||||
/* 8036EE20 38 A0 00 03 */ li r5, 3
|
||||
/* 8036EE24 38 C0 00 03 */ li r6, 3
|
||||
/* 8036EE28 90 1D 00 00 */ stw r0, 0(r29)
|
||||
/* 8036EE2C 38 E0 00 00 */ li r7, 0
|
||||
/* 8036EE30 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036EE34 48 00 02 65 */ bl TRKRequestSend
|
||||
/* 8036EE38 7C 7F 1B 79 */ or. r31, r3, r3
|
||||
/* 8036EE3C 40 82 00 24 */ bne lbl_8036EE60
|
||||
/* 8036EE40 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036EE44 4B FF E8 AD */ bl TRKGetBuffer
|
||||
/* 8036EE48 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 8036EE4C 41 82 00 14 */ beq lbl_8036EE60
|
||||
/* 8036EE50 80 03 00 20 */ lwz r0, 0x20(r3)
|
||||
/* 8036EE54 90 1E 00 00 */ stw r0, 0(r30)
|
||||
/* 8036EE58 80 03 00 28 */ lwz r0, 0x28(r3)
|
||||
/* 8036EE5C 90 1D 00 00 */ stw r0, 0(r29)
|
||||
lbl_8036EE60:
|
||||
/* 8036EE60 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036EE64 4B FF E8 29 */ bl TRKReleaseBuffer
|
||||
lbl_8036EE68:
|
||||
/* 8036EE68 80 61 00 0C */ lwz r3, 0xc(r1)
|
||||
/* 8036EE6C 4B FF E8 21 */ bl TRKReleaseBuffer
|
||||
/* 8036EE70 80 01 00 74 */ lwz r0, 0x74(r1)
|
||||
/* 8036EE74 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8036EE78 83 E1 00 6C */ lwz r31, 0x6c(r1)
|
||||
/* 8036EE7C 83 C1 00 68 */ lwz r30, 0x68(r1)
|
||||
/* 8036EE80 83 A1 00 64 */ lwz r29, 0x64(r1)
|
||||
/* 8036EE84 83 81 00 60 */ lwz r28, 0x60(r1)
|
||||
/* 8036EE88 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036EE8C 38 21 00 70 */ addi r1, r1, 0x70
|
||||
/* 8036EE90 4E 80 00 20 */ blr
|
||||
|
|
@ -1,134 +0,0 @@
|
|||
lbl_8036F098:
|
||||
/* 8036F098 94 21 FF C0 */ stwu r1, -0x40(r1)
|
||||
/* 8036F09C 7C 08 02 A6 */ mflr r0
|
||||
/* 8036F0A0 90 01 00 44 */ stw r0, 0x44(r1)
|
||||
/* 8036F0A4 38 00 FF FF */ li r0, -1
|
||||
/* 8036F0A8 BE A1 00 14 */ stmw r21, 0x14(r1)
|
||||
/* 8036F0AC 7C 96 23 78 */ mr r22, r4
|
||||
/* 8036F0B0 3C 80 80 3A */ lis r4, lit_274@ha /* 0x803A2AB8@ha */
|
||||
/* 8036F0B4 7C 75 1B 78 */ mr r21, r3
|
||||
/* 8036F0B8 7C F7 3B 78 */ mr r23, r7
|
||||
/* 8036F0BC 3B 66 00 01 */ addi r27, r6, 1
|
||||
/* 8036F0C0 3B E4 2A B8 */ addi r31, r4, lit_274@l /* 0x803A2AB8@l */
|
||||
/* 8036F0C4 3B C0 00 00 */ li r30, 0
|
||||
/* 8036F0C8 3B 00 00 01 */ li r24, 1
|
||||
/* 8036F0CC 90 16 00 00 */ stw r0, 0(r22)
|
||||
/* 8036F0D0 48 00 01 64 */ b lbl_8036F234
|
||||
lbl_8036F0D4:
|
||||
/* 8036F0D4 38 9F 00 00 */ addi r4, r31, 0
|
||||
/* 8036F0D8 38 60 00 01 */ li r3, 1
|
||||
/* 8036F0DC 4C C6 31 82 */ crclr 6
|
||||
/* 8036F0E0 48 00 3B 75 */ bl MWTRACE
|
||||
/* 8036F0E4 7E A3 AB 78 */ mr r3, r21
|
||||
/* 8036F0E8 4B FF DE F1 */ bl TRKMessageSend
|
||||
/* 8036F0EC 7C 7E 1B 79 */ or. r30, r3, r3
|
||||
/* 8036F0F0 40 82 01 40 */ bne lbl_8036F230
|
||||
/* 8036F0F4 2C 17 00 00 */ cmpwi r23, 0
|
||||
/* 8036F0F8 41 82 00 08 */ beq lbl_8036F100
|
||||
/* 8036F0FC 3B 80 00 00 */ li r28, 0
|
||||
lbl_8036F100:
|
||||
/* 8036F100 4B FF E8 D5 */ bl TRKTestForPacket
|
||||
/* 8036F104 90 76 00 00 */ stw r3, 0(r22)
|
||||
/* 8036F108 80 76 00 00 */ lwz r3, 0(r22)
|
||||
/* 8036F10C 2C 03 FF FF */ cmpwi r3, -1
|
||||
/* 8036F110 40 82 00 20 */ bne lbl_8036F130
|
||||
/* 8036F114 2C 17 00 00 */ cmpwi r23, 0
|
||||
/* 8036F118 41 82 FF E8 */ beq lbl_8036F100
|
||||
/* 8036F11C 3C 80 04 C5 */ lis r4, 0x04C5 /* 0x04C4B3EC@ha */
|
||||
/* 8036F120 3B 9C 00 01 */ addi r28, r28, 1
|
||||
/* 8036F124 38 04 B3 EC */ addi r0, r4, 0xB3EC /* 0x04C4B3EC@l */
|
||||
/* 8036F128 7C 1C 00 40 */ cmplw r28, r0
|
||||
/* 8036F12C 41 80 FF D4 */ blt lbl_8036F100
|
||||
lbl_8036F130:
|
||||
/* 8036F130 2C 03 FF FF */ cmpwi r3, -1
|
||||
/* 8036F134 41 82 00 5C */ beq lbl_8036F190
|
||||
/* 8036F138 3B 00 00 00 */ li r24, 0
|
||||
/* 8036F13C 4B FF E5 B5 */ bl TRKGetBuffer
|
||||
/* 8036F140 38 80 00 00 */ li r4, 0
|
||||
/* 8036F144 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 8036F148 4B FF E4 D5 */ bl TRKSetBufferPosition
|
||||
/* 8036F14C 80 9D 00 08 */ lwz r4, 8(r29)
|
||||
/* 8036F150 38 7D 00 10 */ addi r3, r29, 0x10
|
||||
/* 8036F154 4B FF FB 89 */ bl OutputData
|
||||
/* 8036F158 8B 5D 00 14 */ lbz r26, 0x14(r29)
|
||||
/* 8036F15C 38 9F 00 18 */ addi r4, r31, 0x18
|
||||
/* 8036F160 38 60 00 01 */ li r3, 1
|
||||
/* 8036F164 7F 45 D3 78 */ mr r5, r26
|
||||
/* 8036F168 7F 46 D3 78 */ mr r6, r26
|
||||
/* 8036F16C 4C C6 31 82 */ crclr 6
|
||||
/* 8036F170 48 00 3A E5 */ bl MWTRACE
|
||||
/* 8036F174 28 1A 00 80 */ cmplwi r26, 0x80
|
||||
/* 8036F178 40 80 00 18 */ bge lbl_8036F190
|
||||
/* 8036F17C 80 76 00 00 */ lwz r3, 0(r22)
|
||||
/* 8036F180 4B FF E7 A5 */ bl TRKProcessInput
|
||||
/* 8036F184 38 00 FF FF */ li r0, -1
|
||||
/* 8036F188 90 16 00 00 */ stw r0, 0(r22)
|
||||
/* 8036F18C 4B FF FF 74 */ b lbl_8036F100
|
||||
lbl_8036F190:
|
||||
/* 8036F190 80 16 00 00 */ lwz r0, 0(r22)
|
||||
/* 8036F194 2C 00 FF FF */ cmpwi r0, -1
|
||||
/* 8036F198 41 82 00 98 */ beq lbl_8036F230
|
||||
/* 8036F19C 80 1D 00 08 */ lwz r0, 8(r29)
|
||||
/* 8036F1A0 28 00 00 40 */ cmplwi r0, 0x40
|
||||
/* 8036F1A4 40 80 00 08 */ bge lbl_8036F1AC
|
||||
/* 8036F1A8 3B 00 00 01 */ li r24, 1
|
||||
lbl_8036F1AC:
|
||||
/* 8036F1AC 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036F1B0 40 82 00 24 */ bne lbl_8036F1D4
|
||||
/* 8036F1B4 2C 18 00 00 */ cmpwi r24, 0
|
||||
/* 8036F1B8 40 82 00 1C */ bne lbl_8036F1D4
|
||||
/* 8036F1BC 8B 3D 00 18 */ lbz r25, 0x18(r29)
|
||||
/* 8036F1C0 38 9F 00 40 */ addi r4, r31, 0x40
|
||||
/* 8036F1C4 38 60 00 01 */ li r3, 1
|
||||
/* 8036F1C8 7F 25 CB 78 */ mr r5, r25
|
||||
/* 8036F1CC 4C C6 31 82 */ crclr 6
|
||||
/* 8036F1D0 48 00 3A 85 */ bl MWTRACE
|
||||
lbl_8036F1D4:
|
||||
/* 8036F1D4 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036F1D8 40 82 00 38 */ bne lbl_8036F210
|
||||
/* 8036F1DC 2C 18 00 00 */ cmpwi r24, 0
|
||||
/* 8036F1E0 40 82 00 30 */ bne lbl_8036F210
|
||||
/* 8036F1E4 2C 1A 00 80 */ cmpwi r26, 0x80
|
||||
/* 8036F1E8 7F 45 D3 78 */ mr r5, r26
|
||||
/* 8036F1EC 40 82 00 0C */ bne lbl_8036F1F8
|
||||
/* 8036F1F0 2C 19 00 00 */ cmpwi r25, 0
|
||||
/* 8036F1F4 41 82 00 1C */ beq lbl_8036F210
|
||||
lbl_8036F1F8:
|
||||
/* 8036F1F8 7F 26 CB 78 */ mr r6, r25
|
||||
/* 8036F1FC 38 9F 00 54 */ addi r4, r31, 0x54
|
||||
/* 8036F200 38 60 00 08 */ li r3, 8
|
||||
/* 8036F204 4C C6 31 82 */ crclr 6
|
||||
/* 8036F208 48 00 3A 4D */ bl MWTRACE
|
||||
/* 8036F20C 3B 00 00 01 */ li r24, 1
|
||||
lbl_8036F210:
|
||||
/* 8036F210 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036F214 40 82 00 0C */ bne lbl_8036F220
|
||||
/* 8036F218 2C 18 00 00 */ cmpwi r24, 0
|
||||
/* 8036F21C 41 82 00 14 */ beq lbl_8036F230
|
||||
lbl_8036F220:
|
||||
/* 8036F220 80 76 00 00 */ lwz r3, 0(r22)
|
||||
/* 8036F224 4B FF E4 69 */ bl TRKReleaseBuffer
|
||||
/* 8036F228 38 00 FF FF */ li r0, -1
|
||||
/* 8036F22C 90 16 00 00 */ stw r0, 0(r22)
|
||||
lbl_8036F230:
|
||||
/* 8036F230 3B 7B FF FF */ addi r27, r27, -1
|
||||
lbl_8036F234:
|
||||
/* 8036F234 2C 1B 00 00 */ cmpwi r27, 0
|
||||
/* 8036F238 41 82 00 18 */ beq lbl_8036F250
|
||||
/* 8036F23C 80 16 00 00 */ lwz r0, 0(r22)
|
||||
/* 8036F240 2C 00 FF FF */ cmpwi r0, -1
|
||||
/* 8036F244 40 82 00 0C */ bne lbl_8036F250
|
||||
/* 8036F248 2C 1E 00 00 */ cmpwi r30, 0
|
||||
/* 8036F24C 41 82 FE 88 */ beq lbl_8036F0D4
|
||||
lbl_8036F250:
|
||||
/* 8036F250 80 16 00 00 */ lwz r0, 0(r22)
|
||||
/* 8036F254 2C 00 FF FF */ cmpwi r0, -1
|
||||
/* 8036F258 40 82 00 08 */ bne lbl_8036F260
|
||||
/* 8036F25C 3B C0 08 00 */ li r30, 0x800
|
||||
lbl_8036F260:
|
||||
/* 8036F260 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8036F264 BA A1 00 14 */ lmw r21, 0x14(r1)
|
||||
/* 8036F268 80 01 00 44 */ lwz r0, 0x44(r1)
|
||||
/* 8036F26C 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036F270 38 21 00 40 */ addi r1, r1, 0x40
|
||||
/* 8036F274 4E 80 00 20 */ blr
|
||||
|
|
@ -1,153 +0,0 @@
|
|||
lbl_8036F278:
|
||||
/* 8036F278 94 21 FF 70 */ stwu r1, -0x90(r1)
|
||||
/* 8036F27C 7C 08 02 A6 */ mflr r0
|
||||
/* 8036F280 90 01 00 94 */ stw r0, 0x94(r1)
|
||||
/* 8036F284 BE 61 00 5C */ stmw r19, 0x5c(r1)
|
||||
/* 8036F288 7C 98 23 79 */ or. r24, r4, r4
|
||||
/* 8036F28C 7C 77 1B 78 */ mr r23, r3
|
||||
/* 8036F290 7C B9 2B 78 */ mr r25, r5
|
||||
/* 8036F294 7C DA 33 78 */ mr r26, r6
|
||||
/* 8036F298 7C FB 3B 78 */ mr r27, r7
|
||||
/* 8036F29C 7D 1C 43 78 */ mr r28, r8
|
||||
/* 8036F2A0 41 82 00 10 */ beq lbl_8036F2B0
|
||||
/* 8036F2A4 80 19 00 00 */ lwz r0, 0(r25)
|
||||
/* 8036F2A8 28 00 00 00 */ cmplwi r0, 0
|
||||
/* 8036F2AC 40 82 00 0C */ bne lbl_8036F2B8
|
||||
lbl_8036F2B0:
|
||||
/* 8036F2B0 38 60 00 02 */ li r3, 2
|
||||
/* 8036F2B4 48 00 01 D0 */ b lbl_8036F484
|
||||
lbl_8036F2B8:
|
||||
/* 8036F2B8 38 00 00 00 */ li r0, 0
|
||||
/* 8036F2BC 3B A0 00 00 */ li r29, 0
|
||||
/* 8036F2C0 90 1A 00 00 */ stw r0, 0(r26)
|
||||
/* 8036F2C4 3B C0 00 00 */ li r30, 0
|
||||
/* 8036F2C8 3A A0 00 00 */ li r21, 0
|
||||
/* 8036F2CC 48 00 01 88 */ b lbl_8036F454
|
||||
lbl_8036F2D0:
|
||||
/* 8036F2D0 38 61 00 14 */ addi r3, r1, 0x14
|
||||
/* 8036F2D4 38 80 00 00 */ li r4, 0
|
||||
/* 8036F2D8 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036F2DC 4B C9 41 7D */ bl memset
|
||||
/* 8036F2E0 80 19 00 00 */ lwz r0, 0(r25)
|
||||
/* 8036F2E4 38 60 08 00 */ li r3, 0x800
|
||||
/* 8036F2E8 7C 1E 00 50 */ subf r0, r30, r0
|
||||
/* 8036F2EC 28 00 08 00 */ cmplwi r0, 0x800
|
||||
/* 8036F2F0 41 81 00 08 */ bgt lbl_8036F2F8
|
||||
/* 8036F2F4 7C 03 03 78 */ mr r3, r0
|
||||
lbl_8036F2F8:
|
||||
/* 8036F2F8 2C 1C 00 00 */ cmpwi r28, 0
|
||||
/* 8036F2FC 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 8036F300 38 00 00 D0 */ li r0, 0xd0
|
||||
/* 8036F304 41 82 00 08 */ beq lbl_8036F30C
|
||||
/* 8036F308 38 00 00 D1 */ li r0, 0xd1
|
||||
lbl_8036F30C:
|
||||
/* 8036F30C 2C 1C 00 00 */ cmpwi r28, 0
|
||||
/* 8036F310 98 01 00 18 */ stb r0, 0x18(r1)
|
||||
/* 8036F314 38 00 00 40 */ li r0, 0x40
|
||||
/* 8036F318 40 82 00 08 */ bne lbl_8036F320
|
||||
/* 8036F31C 38 1F 00 40 */ addi r0, r31, 0x40
|
||||
lbl_8036F320:
|
||||
/* 8036F320 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 8036F324 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 8036F328 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 8036F32C 92 E1 00 1C */ stw r23, 0x1c(r1)
|
||||
/* 8036F330 B3 E1 00 20 */ sth r31, 0x20(r1)
|
||||
/* 8036F334 4B FF E3 E9 */ bl TRKGetFreeBuffer
|
||||
/* 8036F338 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036F33C 38 81 00 14 */ addi r4, r1, 0x14
|
||||
/* 8036F340 38 A0 00 40 */ li r5, 0x40
|
||||
/* 8036F344 4B FF E0 45 */ bl TRKAppendBuffer_ui8
|
||||
/* 8036F348 2C 1C 00 00 */ cmpwi r28, 0
|
||||
/* 8036F34C 7C 75 1B 78 */ mr r21, r3
|
||||
/* 8036F350 40 82 00 20 */ bne lbl_8036F370
|
||||
/* 8036F354 2C 15 00 00 */ cmpwi r21, 0
|
||||
/* 8036F358 40 82 00 18 */ bne lbl_8036F370
|
||||
/* 8036F35C 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036F360 7F E5 FB 78 */ mr r5, r31
|
||||
/* 8036F364 7C 98 F2 14 */ add r4, r24, r30
|
||||
/* 8036F368 4B FF E0 21 */ bl TRKAppendBuffer_ui8
|
||||
/* 8036F36C 7C 75 1B 78 */ mr r21, r3
|
||||
lbl_8036F370:
|
||||
/* 8036F370 2C 15 00 00 */ cmpwi r21, 0
|
||||
/* 8036F374 40 82 00 D4 */ bne lbl_8036F448
|
||||
/* 8036F378 2C 1B 00 00 */ cmpwi r27, 0
|
||||
/* 8036F37C 41 82 00 C0 */ beq lbl_8036F43C
|
||||
/* 8036F380 2C 1C 00 00 */ cmpwi r28, 0
|
||||
/* 8036F384 38 00 00 00 */ li r0, 0
|
||||
/* 8036F388 41 82 00 10 */ beq lbl_8036F398
|
||||
/* 8036F38C 28 17 00 00 */ cmplwi r23, 0
|
||||
/* 8036F390 40 82 00 08 */ bne lbl_8036F398
|
||||
/* 8036F394 38 00 00 01 */ li r0, 1
|
||||
lbl_8036F398:
|
||||
/* 8036F398 2C 1C 00 00 */ cmpwi r28, 0
|
||||
/* 8036F39C 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036F3A0 38 81 00 10 */ addi r4, r1, 0x10
|
||||
/* 8036F3A4 38 A0 00 05 */ li r5, 5
|
||||
/* 8036F3A8 7C 00 00 34 */ cntlzw r0, r0
|
||||
/* 8036F3AC 38 C0 00 03 */ li r6, 3
|
||||
/* 8036F3B0 54 07 D9 7E */ srwi r7, r0, 5
|
||||
/* 8036F3B4 4B FF FC E5 */ bl TRKRequestSend
|
||||
/* 8036F3B8 7C 75 1B 79 */ or. r21, r3, r3
|
||||
/* 8036F3BC 40 82 00 10 */ bne lbl_8036F3CC
|
||||
/* 8036F3C0 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036F3C4 4B FF E3 2D */ bl TRKGetBuffer
|
||||
/* 8036F3C8 7C 76 1B 78 */ mr r22, r3
|
||||
lbl_8036F3CC:
|
||||
/* 8036F3CC 80 16 00 20 */ lwz r0, 0x20(r22)
|
||||
/* 8036F3D0 2C 1C 00 00 */ cmpwi r28, 0
|
||||
/* 8036F3D4 A2 76 00 24 */ lhz r19, 0x24(r22)
|
||||
/* 8036F3D8 54 14 06 3E */ clrlwi r20, r0, 0x18
|
||||
/* 8036F3DC 41 82 00 40 */ beq lbl_8036F41C
|
||||
/* 8036F3E0 2C 15 00 00 */ cmpwi r21, 0
|
||||
/* 8036F3E4 40 82 00 38 */ bne lbl_8036F41C
|
||||
/* 8036F3E8 7C 13 F8 40 */ cmplw r19, r31
|
||||
/* 8036F3EC 41 81 00 30 */ bgt lbl_8036F41C
|
||||
/* 8036F3F0 7E C3 B3 78 */ mr r3, r22
|
||||
/* 8036F3F4 38 80 00 40 */ li r4, 0x40
|
||||
/* 8036F3F8 4B FF E2 25 */ bl TRKSetBufferPosition
|
||||
/* 8036F3FC 7E C3 B3 78 */ mr r3, r22
|
||||
/* 8036F400 7E 65 9B 78 */ mr r5, r19
|
||||
/* 8036F404 7C 98 F2 14 */ add r4, r24, r30
|
||||
/* 8036F408 4B FF DD 05 */ bl TRKReadBuffer_ui8
|
||||
/* 8036F40C 7C 75 1B 78 */ mr r21, r3
|
||||
/* 8036F410 2C 15 03 02 */ cmpwi r21, 0x302
|
||||
/* 8036F414 40 82 00 08 */ bne lbl_8036F41C
|
||||
/* 8036F418 3A A0 00 00 */ li r21, 0
|
||||
lbl_8036F41C:
|
||||
/* 8036F41C 7C 13 F8 40 */ cmplw r19, r31
|
||||
/* 8036F420 41 82 00 0C */ beq lbl_8036F42C
|
||||
/* 8036F424 7E 7F 9B 78 */ mr r31, r19
|
||||
/* 8036F428 3B A0 00 01 */ li r29, 1
|
||||
lbl_8036F42C:
|
||||
/* 8036F42C 92 9A 00 00 */ stw r20, 0(r26)
|
||||
/* 8036F430 80 61 00 10 */ lwz r3, 0x10(r1)
|
||||
/* 8036F434 4B FF E2 59 */ bl TRKReleaseBuffer
|
||||
/* 8036F438 48 00 00 10 */ b lbl_8036F448
|
||||
lbl_8036F43C:
|
||||
/* 8036F43C 80 61 00 08 */ lwz r3, 8(r1)
|
||||
/* 8036F440 4B FF DB 99 */ bl TRKMessageSend
|
||||
/* 8036F444 7C 75 1B 78 */ mr r21, r3
|
||||
lbl_8036F448:
|
||||
/* 8036F448 80 61 00 0C */ lwz r3, 0xc(r1)
|
||||
/* 8036F44C 4B FF E2 41 */ bl TRKReleaseBuffer
|
||||
/* 8036F450 7F DE FA 14 */ add r30, r30, r31
|
||||
lbl_8036F454:
|
||||
/* 8036F454 2C 1D 00 00 */ cmpwi r29, 0
|
||||
/* 8036F458 40 82 00 24 */ bne lbl_8036F47C
|
||||
/* 8036F45C 80 19 00 00 */ lwz r0, 0(r25)
|
||||
/* 8036F460 7C 1E 00 40 */ cmplw r30, r0
|
||||
/* 8036F464 40 80 00 18 */ bge lbl_8036F47C
|
||||
/* 8036F468 2C 15 00 00 */ cmpwi r21, 0
|
||||
/* 8036F46C 40 82 00 10 */ bne lbl_8036F47C
|
||||
/* 8036F470 80 1A 00 00 */ lwz r0, 0(r26)
|
||||
/* 8036F474 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 8036F478 41 82 FE 58 */ beq lbl_8036F2D0
|
||||
lbl_8036F47C:
|
||||
/* 8036F47C 93 D9 00 00 */ stw r30, 0(r25)
|
||||
/* 8036F480 7E A3 AB 78 */ mr r3, r21
|
||||
lbl_8036F484:
|
||||
/* 8036F484 BA 61 00 5C */ lmw r19, 0x5c(r1)
|
||||
/* 8036F488 80 01 00 94 */ lwz r0, 0x94(r1)
|
||||
/* 8036F48C 7C 08 03 A6 */ mtlr r0
|
||||
/* 8036F490 38 21 00 90 */ addi r1, r1, 0x90
|
||||
/* 8036F494 4E 80 00 20 */ blr
|
||||
|
|
@ -1,115 +0,0 @@
|
|||
lbl_803713A8:
|
||||
/* 803713A8 3C 40 80 44 */ lis r2, gTRKCPUState@h /* 0x8044F338@h */
|
||||
/* 803713AC 60 42 F3 38 */ ori r2, r2, gTRKCPUState@l /* 0x8044F338@l */
|
||||
/* 803713B0 3C A0 80 3D */ lis r5, gTRKRestoreFlags@h /* 0x803D3238@h */
|
||||
/* 803713B4 60 A5 32 38 */ ori r5, r5, gTRKRestoreFlags@l /* 0x803D3238@l */
|
||||
/* 803713B8 88 65 00 00 */ lbz r3, 0(r5)
|
||||
/* 803713BC 88 C5 00 01 */ lbz r6, 1(r5)
|
||||
/* 803713C0 38 00 00 00 */ li r0, 0
|
||||
/* 803713C4 98 05 00 00 */ stb r0, 0(r5)
|
||||
/* 803713C8 98 05 00 01 */ stb r0, 1(r5)
|
||||
/* 803713CC 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 803713D0 41 82 00 14 */ beq lbl_803713E4
|
||||
/* 803713D4 83 02 01 E8 */ lwz r24, 0x1e8(r2)
|
||||
/* 803713D8 83 22 01 EC */ lwz r25, 0x1ec(r2)
|
||||
/* 803713DC 7F 1C 43 A6 */ mttbl r24
|
||||
/* 803713E0 7F 3D 43 A6 */ mttbu r25
|
||||
lbl_803713E4:
|
||||
/* 803713E4 BA 82 02 FC */ lmw r20, 0x2fc(r2)
|
||||
/* 803713E8 7E 90 E3 A6 */ mtspr 0x390, r20
|
||||
/* 803713EC 7E B1 E3 A6 */ mtspr 0x391, r21
|
||||
/* 803713F0 7E D2 E3 A6 */ mtspr 0x392, r22
|
||||
/* 803713F4 7E F3 E3 A6 */ mtspr 0x393, r23
|
||||
/* 803713F8 7F 14 E3 A6 */ mtspr 0x394, r24
|
||||
/* 803713FC 7F 35 E3 A6 */ mtspr 0x395, r25
|
||||
/* 80371400 7F 56 E3 A6 */ mtspr 0x396, r26
|
||||
/* 80371404 7F 77 E3 A6 */ mtspr 0x397, r27
|
||||
/* 80371408 7F 98 E3 A6 */ mtspr 0x398, r28
|
||||
/* 8037140C 7F DA E3 A6 */ mtspr 0x39a, r30
|
||||
/* 80371410 7F FB E3 A6 */ mtspr 0x39b, r31
|
||||
/* 80371414 48 00 00 1C */ b lbl_80371430
|
||||
/* 80371418 BB 42 02 E0 */ lmw r26, 0x2e0(r2)
|
||||
/* 8037141C 7F 50 EB A6 */ mtspr 0x3b0, r26
|
||||
/* 80371420 7F 77 EB A6 */ mtspr 0x3b7, r27
|
||||
/* 80371424 7F B6 FB A6 */ mtspr 0x3f6, r29
|
||||
/* 80371428 7F D7 FB A6 */ mtspr 0x3f7, r30
|
||||
/* 8037142C 7F FF FB A6 */ mtspr 0x3ff, r31
|
||||
lbl_80371430:
|
||||
/* 80371430 BA 62 02 84 */ lmw r19, 0x284(r2)
|
||||
/* 80371434 7E 75 FB A6 */ mtspr 0x3f5, r19
|
||||
/* 80371438 7E 99 EB A6 */ mtspr 0x3b9, r20
|
||||
/* 8037143C 7E BA EB A6 */ mtspr 0x3ba, r21
|
||||
/* 80371440 7E DD EB A6 */ mtspr 0x3bd, r22
|
||||
/* 80371444 7E FE EB A6 */ mtspr 0x3be, r23
|
||||
/* 80371448 7F 1B EB A6 */ mtspr 0x3bb, r24
|
||||
/* 8037144C 7F 38 EB A6 */ mtspr 0x3b8, r25
|
||||
/* 80371450 7F 5C EB A6 */ mtspr 0x3bc, r26
|
||||
/* 80371454 7F 7C FB A6 */ mtspr 0x3fc, r27
|
||||
/* 80371458 7F 9D FB A6 */ mtspr 0x3fd, r28
|
||||
/* 8037145C 7F BE FB A6 */ mtspr 0x3fe, r29
|
||||
/* 80371460 7F DB FB A6 */ mtspr 0x3FB, r30
|
||||
/* 80371464 7F F9 FB A6 */ mtspr 0x3f9, r31
|
||||
/* 80371468 48 00 00 34 */ b lbl_8037149C
|
||||
/* 8037146C 2C 06 00 00 */ cmpwi r6, 0
|
||||
/* 80371470 41 82 00 0C */ beq lbl_8037147C
|
||||
/* 80371474 83 42 02 78 */ lwz r26, 0x278(r2)
|
||||
/* 80371478 7F 56 03 A6 */ mtspr 0x16, r26
|
||||
lbl_8037147C:
|
||||
/* 8037147C BB 22 02 40 */ lmw r25, 0x240(r2)
|
||||
/* 80371480 7F 30 F3 A6 */ mtspr 0x3d0, r25
|
||||
/* 80371484 7F 51 F3 A6 */ mtspr 0x3d1, r26
|
||||
/* 80371488 7F 72 F3 A6 */ mtspr 0x3d2, r27
|
||||
/* 8037148C 7F 93 F3 A6 */ mtspr 0x3d3, r28
|
||||
/* 80371490 7F B4 F3 A6 */ mtspr 0x3D4, r29
|
||||
/* 80371494 7F D5 F3 A6 */ mtspr 0x3D5, r30
|
||||
/* 80371498 7F F6 F3 A6 */ mtspr 0x3d6, r31
|
||||
lbl_8037149C:
|
||||
/* 8037149C BA 02 01 A8 */ lmw r16, 0x1a8(r2)
|
||||
/* 803714A0 7E 00 01 A4 */ mtsr 0, r16
|
||||
/* 803714A4 7E 21 01 A4 */ mtsr 1, r17
|
||||
/* 803714A8 7E 42 01 A4 */ mtsr 2, r18
|
||||
/* 803714AC 7E 63 01 A4 */ mtsr 3, r19
|
||||
/* 803714B0 7E 84 01 A4 */ mtsr 4, r20
|
||||
/* 803714B4 7E A5 01 A4 */ mtsr 5, r21
|
||||
/* 803714B8 7E C6 01 A4 */ mtsr 6, r22
|
||||
/* 803714BC 7E E7 01 A4 */ mtsr 7, r23
|
||||
/* 803714C0 7F 08 01 A4 */ mtsr 8, r24
|
||||
/* 803714C4 7F 29 01 A4 */ mtsr 9, r25
|
||||
/* 803714C8 7F 4A 01 A4 */ mtsr 0xa, r26
|
||||
/* 803714CC 7F 6B 01 A4 */ mtsr 0xb, r27
|
||||
/* 803714D0 7F 8C 01 A4 */ mtsr 0xc, r28
|
||||
/* 803714D4 7F AD 01 A4 */ mtsr 0xd, r29
|
||||
/* 803714D8 7F CE 01 A4 */ mtsr 0xe, r30
|
||||
/* 803714DC 7F EF 01 A4 */ mtsr 0xf, r31
|
||||
/* 803714E0 B9 82 01 F0 */ lmw r12, 0x1f0(r2)
|
||||
/* 803714E4 7D 90 FB A6 */ mtspr 0x3f0, r12
|
||||
/* 803714E8 7D B1 FB A6 */ mtspr 0x3f1, r13
|
||||
/* 803714EC 7D DB 03 A6 */ mtspr 0x1b, r14
|
||||
/* 803714F0 7D FF 43 A6 */ mtspr 0x11f, r15
|
||||
/* 803714F4 7E 10 83 A6 */ mtibatu 0, r16
|
||||
/* 803714F8 7E 31 83 A6 */ mtibatl 0, r17
|
||||
/* 803714FC 7E 52 83 A6 */ mtibatu 1, r18
|
||||
/* 80371500 7E 73 83 A6 */ mtibatl 1, r19
|
||||
/* 80371504 7E 94 83 A6 */ mtibatu 2, r20
|
||||
/* 80371508 7E B5 83 A6 */ mtibatl 2, r21
|
||||
/* 8037150C 7E D6 83 A6 */ mtibatu 3, r22
|
||||
/* 80371510 7E F7 83 A6 */ mtibatl 3, r23
|
||||
/* 80371514 7F 18 83 A6 */ mtdbatu 0, r24
|
||||
/* 80371518 7F 39 83 A6 */ mtdbatl 0, r25
|
||||
/* 8037151C 7F 5A 83 A6 */ mtdbatu 1, r26
|
||||
/* 80371520 7F 7B 83 A6 */ mtdbatl 1, r27
|
||||
/* 80371524 7F 9C 83 A6 */ mtdbatu 2, r28
|
||||
/* 80371528 7F BD 83 A6 */ mtdbatl 2, r29
|
||||
/* 8037152C 7F DE 83 A6 */ mtdbatu 3, r30
|
||||
/* 80371530 7F FF 83 A6 */ mtdbatl 3, r31
|
||||
/* 80371534 BA C2 02 5C */ lmw r22, 0x25c(r2)
|
||||
/* 80371538 7E D9 03 A6 */ mtspr 0x19, r22
|
||||
/* 8037153C 7E F3 03 A6 */ mtdar r23
|
||||
/* 80371540 7F 12 03 A6 */ mtdsisr r24
|
||||
/* 80371544 7F 30 43 A6 */ mtspr 0x110, r25
|
||||
/* 80371548 7F 51 43 A6 */ mtspr 0x111, r26
|
||||
/* 8037154C 7F 72 43 A6 */ mtspr 0x112, r27
|
||||
/* 80371550 7F 93 43 A6 */ mtspr 0x113, r28
|
||||
/* 80371554 7F D2 FB A6 */ mtspr 0x3f2, r30
|
||||
/* 80371558 7F FA 43 A6 */ mtspr 0x11a, r31
|
||||
/* 8037155C 4E 80 00 20 */ blr
|
||||
|
|
@ -1,112 +0,0 @@
|
|||
lbl_803711F0:
|
||||
/* 803711F0 3C 40 80 44 */ lis r2, gTRKCPUState@h /* 0x8044F338@h */
|
||||
/* 803711F4 60 42 F3 38 */ ori r2, r2, gTRKCPUState@l /* 0x8044F338@l */
|
||||
/* 803711F8 7E 00 04 A6 */ mfsr r16, 0
|
||||
/* 803711FC 7E 21 04 A6 */ mfsr r17, 1
|
||||
/* 80371200 7E 42 04 A6 */ mfsr r18, 2
|
||||
/* 80371204 7E 63 04 A6 */ mfsr r19, 3
|
||||
/* 80371208 7E 84 04 A6 */ mfsr r20, 4
|
||||
/* 8037120C 7E A5 04 A6 */ mfsr r21, 5
|
||||
/* 80371210 7E C6 04 A6 */ mfsr r22, 6
|
||||
/* 80371214 7E E7 04 A6 */ mfsr r23, 7
|
||||
/* 80371218 7F 08 04 A6 */ mfsr r24, 8
|
||||
/* 8037121C 7F 29 04 A6 */ mfsr r25, 9
|
||||
/* 80371220 7F 4A 04 A6 */ mfsr r26, 0xa
|
||||
/* 80371224 7F 6B 04 A6 */ mfsr r27, 0xb
|
||||
/* 80371228 7F 8C 04 A6 */ mfsr r28, 0xc
|
||||
/* 8037122C 7F AD 04 A6 */ mfsr r29, 0xd
|
||||
/* 80371230 7F CE 04 A6 */ mfsr r30, 0xe
|
||||
/* 80371234 7F EF 04 A6 */ mfsr r31, 0xf
|
||||
/* 80371238 BE 02 01 A8 */ stmw r16, 0x1a8(r2)
|
||||
/* 8037123C 7D 4C 42 E6 */ mftb r10, 0x10c
|
||||
/* 80371240 7D 6D 42 E6 */ mftbu r11
|
||||
/* 80371244 7D 90 FA A6 */ mfspr r12, 0x3f0
|
||||
/* 80371248 7D B1 FA A6 */ mfspr r13, 0x3f1
|
||||
/* 8037124C 7D DB 02 A6 */ mfspr r14, 0x1b
|
||||
/* 80371250 7D FF 42 A6 */ mfpvr r15
|
||||
/* 80371254 7E 10 82 A6 */ mfibatu r16, 0
|
||||
/* 80371258 7E 31 82 A6 */ mfibatl r17, 0
|
||||
/* 8037125C 7E 52 82 A6 */ mfibatu r18, 1
|
||||
/* 80371260 7E 73 82 A6 */ mfibatl r19, 1
|
||||
/* 80371264 7E 94 82 A6 */ mfibatu r20, 2
|
||||
/* 80371268 7E B5 82 A6 */ mfibatl r21, 2
|
||||
/* 8037126C 7E D6 82 A6 */ mfibatu r22, 3
|
||||
/* 80371270 7E F7 82 A6 */ mfibatl r23, 3
|
||||
/* 80371274 7F 18 82 A6 */ mfdbatu r24, 0
|
||||
/* 80371278 7F 39 82 A6 */ mfdbatl r25, 0
|
||||
/* 8037127C 7F 5A 82 A6 */ mfdbatu r26, 1
|
||||
/* 80371280 7F 7B 82 A6 */ mfdbatl r27, 1
|
||||
/* 80371284 7F 9C 82 A6 */ mfdbatu r28, 2
|
||||
/* 80371288 7F BD 82 A6 */ mfdbatl r29, 2
|
||||
/* 8037128C 7F DE 82 A6 */ mfdbatu r30, 3
|
||||
/* 80371290 7F FF 82 A6 */ mfdbatl r31, 3
|
||||
/* 80371294 BD 42 01 E8 */ stmw r10, 0x1e8(r2)
|
||||
/* 80371298 7E D9 02 A6 */ mfspr r22, 0x19
|
||||
/* 8037129C 7E F3 02 A6 */ mfdar r23
|
||||
/* 803712A0 7F 12 02 A6 */ mfdsisr r24
|
||||
/* 803712A4 7F 30 42 A6 */ mfspr r25, 0x110
|
||||
/* 803712A8 7F 51 42 A6 */ mfspr r26, 0x111
|
||||
/* 803712AC 7F 72 42 A6 */ mfspr r27, 0x112
|
||||
/* 803712B0 7F 93 42 A6 */ mfspr r28, 0x113
|
||||
/* 803712B4 3B A0 00 00 */ li r29, 0
|
||||
/* 803712B8 7F D2 FA A6 */ mfspr r30, 0x3f2
|
||||
/* 803712BC 7F FA 42 A6 */ mfspr r31, 0x11a
|
||||
/* 803712C0 BE C2 02 5C */ stmw r22, 0x25c(r2)
|
||||
/* 803712C4 7E 90 E2 A6 */ mfspr r20, 0x390
|
||||
/* 803712C8 7E B1 E2 A6 */ mfspr r21, 0x391
|
||||
/* 803712CC 7E D2 E2 A6 */ mfspr r22, 0x392
|
||||
/* 803712D0 7E F3 E2 A6 */ mfspr r23, 0x393
|
||||
/* 803712D4 7F 14 E2 A6 */ mfspr r24, 0x394
|
||||
/* 803712D8 7F 35 E2 A6 */ mfspr r25, 0x395
|
||||
/* 803712DC 7F 56 E2 A6 */ mfspr r26, 0x396
|
||||
/* 803712E0 7F 77 E2 A6 */ mfspr r27, 0x397
|
||||
/* 803712E4 7F 98 E2 A6 */ mfspr r28, 0x398
|
||||
/* 803712E8 7F B9 E2 A6 */ mfspr r29, 0x399
|
||||
/* 803712EC 7F DA E2 A6 */ mfspr r30, 0x39a
|
||||
/* 803712F0 7F FB E2 A6 */ mfspr r31, 0x39b
|
||||
/* 803712F4 BE 82 02 FC */ stmw r20, 0x2fc(r2)
|
||||
/* 803712F8 48 00 00 48 */ b lbl_80371340
|
||||
/* 803712FC 7E 00 EA A6 */ mfspr r16, 0x3a0
|
||||
/* 80371300 7E 27 EA A6 */ mfspr r17, 0x3a7
|
||||
/* 80371304 7E 48 EA A6 */ mfspr r18, 0x3a8
|
||||
/* 80371308 7E 69 EA A6 */ mfspr r19, 0x3a9
|
||||
/* 8037130C 7E 8A EA A6 */ mfspr r20, 0x3aa
|
||||
/* 80371310 7E AB EA A6 */ mfspr r21, 0x3ab
|
||||
/* 80371314 7E CC EA A6 */ mfspr r22, 0x3ac
|
||||
/* 80371318 7E ED EA A6 */ mfspr r23, 0x3ad
|
||||
/* 8037131C 7F 0E EA A6 */ mfspr r24, 0x3ae
|
||||
/* 80371320 7F 2F EA A6 */ mfspr r25, 0x3af
|
||||
/* 80371324 7F 50 EA A6 */ mfspr r26, 0x3b0
|
||||
/* 80371328 7F 77 EA A6 */ mfspr r27, 0x3b7
|
||||
/* 8037132C 7F 9F EA A6 */ mfspr r28, 0x3bf
|
||||
/* 80371330 7F B6 FA A6 */ mfspr r29, 0x3f6
|
||||
/* 80371334 7F D7 FA A6 */ mfspr r30, 0x3f7
|
||||
/* 80371338 7F FF FA A6 */ mfspr r31, 0x3ff
|
||||
/* 8037133C BE 02 02 B8 */ stmw r16, 0x2b8(r2)
|
||||
lbl_80371340:
|
||||
/* 80371340 7E 75 FA A6 */ mfspr r19, 0x3f5
|
||||
/* 80371344 7E 99 EA A6 */ mfspr r20, 0x3b9
|
||||
/* 80371348 7E BA EA A6 */ mfspr r21, 0x3ba
|
||||
/* 8037134C 7E DD EA A6 */ mfspr r22, 0x3bd
|
||||
/* 80371350 7E FE EA A6 */ mfspr r23, 0x3be
|
||||
/* 80371354 7F 1B EA A6 */ mfspr r24, 0x3bb
|
||||
/* 80371358 7F 38 EA A6 */ mfspr r25, 0x3b8
|
||||
/* 8037135C 7F 5C EA A6 */ mfspr r26, 0x3bc
|
||||
/* 80371360 7F 7C FA A6 */ mfspr r27, 0x3fc
|
||||
/* 80371364 7F 9D FA A6 */ mfspr r28, 0x3fd
|
||||
/* 80371368 7F BE FA A6 */ mfspr r29, 0x3fe
|
||||
/* 8037136C 7F DB FA A6 */ mfspr r30, 0x3FB
|
||||
/* 80371370 7F F9 FA A6 */ mfspr r31, 0x3f9
|
||||
/* 80371374 BE 62 02 84 */ stmw r19, 0x284(r2)
|
||||
/* 80371378 4E 80 00 20 */ blr
|
||||
/* 8037137C 7F 30 F2 A6 */ mfspr r25, 0x3d0
|
||||
/* 80371380 7F 51 F2 A6 */ mfspr r26, 0x3d1
|
||||
/* 80371384 7F 72 F2 A6 */ mfspr r27, 0x3d2
|
||||
/* 80371388 7F 93 F2 A6 */ mfspr r28, 0x3d3
|
||||
/* 8037138C 7F B4 F2 A6 */ mfspr r29, 0x3D4
|
||||
/* 80371390 7F D5 F2 A6 */ mfspr r30, 0x3D5
|
||||
/* 80371394 7F F6 F2 A6 */ mfspr r31, 0x3d6
|
||||
/* 80371398 BF 22 02 40 */ stmw r25, 0x240(r2)
|
||||
/* 8037139C 7F F6 02 A6 */ mfspr r31, 0x16
|
||||
/* 803713A0 93 E2 02 78 */ stw r31, 0x278(r2)
|
||||
/* 803713A4 4E 80 00 20 */ blr
|
||||
|
|
@ -1,227 +0,0 @@
|
|||
lbl_80043A14:
|
||||
/* 80043A14 94 21 FF 90 */ stwu r1, -0x70(r1)
|
||||
/* 80043A18 7C 08 02 A6 */ mflr r0
|
||||
/* 80043A1C 90 01 00 74 */ stw r0, 0x74(r1)
|
||||
/* 80043A20 DB E1 00 60 */ stfd f31, 0x60(r1)
|
||||
/* 80043A24 F3 E1 00 68 */ psq_st f31, 104(r1), 0, 0 /* qr0 */
|
||||
/* 80043A28 DB C1 00 50 */ stfd f30, 0x50(r1)
|
||||
/* 80043A2C F3 C1 00 58 */ psq_st f30, 88(r1), 0, 0 /* qr0 */
|
||||
/* 80043A30 39 61 00 50 */ addi r11, r1, 0x50
|
||||
/* 80043A34 48 31 E7 81 */ bl _savegpr_19
|
||||
/* 80043A38 7C 77 1B 78 */ mr r23, r3
|
||||
/* 80043A3C 3A A0 00 00 */ li r21, 0
|
||||
/* 80043A40 7C 9B 07 74 */ extsb r27, r4
|
||||
/* 80043A44 3B 40 00 01 */ li r26, 1
|
||||
/* 80043A48 3B 20 00 00 */ li r25, 0
|
||||
/* 80043A4C C3 E2 84 D0 */ lfs f31, lit_4264(r2)
|
||||
/* 80043A50 3B 00 00 00 */ li r24, 0
|
||||
/* 80043A54 FF C0 F8 90 */ fmr f30, f31
|
||||
/* 80043A58 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 80043A5C 3A 63 61 C0 */ addi r19, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80043A60 3B F3 4F F8 */ addi r31, r19, 0x4ff8
|
||||
/* 80043A64 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043A68 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043A6C 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043A70 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043A74 38 C0 00 03 */ li r6, 3
|
||||
/* 80043A78 48 00 46 75 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043A7C 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043A80 41 82 00 E0 */ beq lbl_80043B60
|
||||
/* 80043A84 82 83 00 00 */ lwz r20, 0(r3)
|
||||
/* 80043A88 88 0D 87 E4 */ lbz r0, mStayNo__20dStage_roomControl_c+0x0(r13)
|
||||
/* 80043A8C 7C 04 07 74 */ extsb r4, r0
|
||||
/* 80043A90 2C 04 FF FF */ cmpwi r4, -1
|
||||
/* 80043A94 40 82 00 1C */ bne lbl_80043AB0
|
||||
/* 80043A98 38 73 4E 20 */ addi r3, r19, 0x4e20
|
||||
/* 80043A9C 81 93 4E 20 */ lwz r12, 0x4e20(r19)
|
||||
/* 80043AA0 81 8C 00 C4 */ lwz r12, 0xc4(r12)
|
||||
/* 80043AA4 7D 89 03 A6 */ mtctr r12
|
||||
/* 80043AA8 4E 80 04 21 */ bctrl
|
||||
/* 80043AAC 48 00 00 1C */ b lbl_80043AC8
|
||||
lbl_80043AB0:
|
||||
/* 80043AB0 38 73 4E C4 */ addi r3, r19, 0x4ec4
|
||||
/* 80043AB4 4B FE 08 D1 */ bl getStatusRoomDt__20dStage_roomControl_cFi
|
||||
/* 80043AB8 81 83 00 00 */ lwz r12, 0(r3)
|
||||
/* 80043ABC 81 8C 00 C4 */ lwz r12, 0xc4(r12)
|
||||
/* 80043AC0 7D 89 03 A6 */ mtctr r12
|
||||
/* 80043AC4 4E 80 04 21 */ bctrl
|
||||
lbl_80043AC8:
|
||||
/* 80043AC8 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043ACC 41 82 00 94 */ beq lbl_80043B60
|
||||
/* 80043AD0 2C 14 00 00 */ cmpwi r20, 0
|
||||
/* 80043AD4 41 80 00 8C */ blt lbl_80043B60
|
||||
/* 80043AD8 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80043ADC 7C 14 00 00 */ cmpw r20, r0
|
||||
/* 80043AE0 40 80 00 80 */ bge lbl_80043B60
|
||||
/* 80043AE4 80 63 00 04 */ lwz r3, 4(r3)
|
||||
/* 80043AE8 1C 14 00 0D */ mulli r0, r20, 0xd
|
||||
/* 80043AEC 7C 63 02 14 */ add r3, r3, r0
|
||||
/* 80043AF0 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 80043AF4 8B A3 00 08 */ lbz r29, 8(r3)
|
||||
/* 80043AF8 88 03 00 09 */ lbz r0, 9(r3)
|
||||
/* 80043AFC 7C 16 07 74 */ extsb r22, r0
|
||||
/* 80043B00 88 83 00 0B */ lbz r4, 0xb(r3)
|
||||
/* 80043B04 54 80 07 3E */ clrlwi r0, r4, 0x1c
|
||||
/* 80043B08 7C 1C 03 78 */ mr r28, r0
|
||||
/* 80043B0C 88 03 00 0C */ lbz r0, 0xc(r3)
|
||||
/* 80043B10 7C 1B 07 74 */ extsb r27, r0
|
||||
/* 80043B14 54 99 DF 7E */ rlwinm r25, r4, 0x1b, 0x1d, 0x1f
|
||||
/* 80043B18 2C 1B 00 0F */ cmpwi r27, 0xf
|
||||
/* 80043B1C 40 82 00 08 */ bne lbl_80043B24
|
||||
/* 80043B20 3B 60 00 00 */ li r27, 0
|
||||
lbl_80043B24:
|
||||
/* 80043B24 88 03 00 0A */ lbz r0, 0xa(r3)
|
||||
/* 80043B28 54 03 E7 3E */ rlwinm r3, r0, 0x1c, 0x1c, 0x1f
|
||||
/* 80043B2C 54 80 06 F6 */ rlwinm r0, r4, 0, 0x1b, 0x1b
|
||||
/* 80043B30 7C 60 03 79 */ or. r0, r3, r0
|
||||
/* 80043B34 41 80 00 2C */ blt lbl_80043B60
|
||||
/* 80043B38 2C 00 00 17 */ cmpwi r0, 0x17
|
||||
/* 80043B3C 41 81 00 24 */ bgt lbl_80043B60
|
||||
/* 80043B40 3B 00 00 01 */ li r24, 1
|
||||
/* 80043B44 C8 22 84 D8 */ lfd f1, lit_4267(r2)
|
||||
/* 80043B48 6C 00 80 00 */ xoris r0, r0, 0x8000
|
||||
/* 80043B4C 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 80043B50 3C 00 43 30 */ lis r0, 0x4330
|
||||
/* 80043B54 90 01 00 10 */ stw r0, 0x10(r1)
|
||||
/* 80043B58 C8 01 00 10 */ lfd f0, 0x10(r1)
|
||||
/* 80043B5C EF E0 08 28 */ fsubs f31, f0, f1
|
||||
lbl_80043B60:
|
||||
/* 80043B60 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043B64 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043B68 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043B6C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043B70 38 A5 00 03 */ addi r5, r5, 3
|
||||
/* 80043B74 38 C0 00 04 */ li r6, 4
|
||||
/* 80043B78 48 00 45 75 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043B7C 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043B80 41 82 00 08 */ beq lbl_80043B88
|
||||
/* 80043B84 7C 7E 1B 78 */ mr r30, r3
|
||||
lbl_80043B88:
|
||||
/* 80043B88 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043B8C 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043B90 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043B94 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043B98 38 A5 00 09 */ addi r5, r5, 9
|
||||
/* 80043B9C 38 C0 00 03 */ li r6, 3
|
||||
/* 80043BA0 48 00 45 4D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043BA4 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043BA8 41 82 00 0C */ beq lbl_80043BB4
|
||||
/* 80043BAC 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80043BB0 7C 1D 07 34 */ extsh r29, r0
|
||||
lbl_80043BB4:
|
||||
/* 80043BB4 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043BB8 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043BBC 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043BC0 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043BC4 38 A5 00 13 */ addi r5, r5, 0x13
|
||||
/* 80043BC8 38 C0 00 03 */ li r6, 3
|
||||
/* 80043BCC 48 00 45 21 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043BD0 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043BD4 41 82 00 0C */ beq lbl_80043BE0
|
||||
/* 80043BD8 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80043BDC 7C 16 07 74 */ extsb r22, r0
|
||||
lbl_80043BE0:
|
||||
/* 80043BE0 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043BE4 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043BE8 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043BEC 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043BF0 38 A5 00 1A */ addi r5, r5, 0x1a
|
||||
/* 80043BF4 38 C0 00 03 */ li r6, 3
|
||||
/* 80043BF8 48 00 44 F5 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043BFC 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043C00 41 82 00 0C */ beq lbl_80043C0C
|
||||
/* 80043C04 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80043C08 7C 1C 07 74 */ extsb r28, r0
|
||||
lbl_80043C0C:
|
||||
/* 80043C0C 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043C10 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043C14 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043C18 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043C1C 38 A5 00 20 */ addi r5, r5, 0x20
|
||||
/* 80043C20 38 C0 00 03 */ li r6, 3
|
||||
/* 80043C24 48 00 44 C9 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043C28 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043C2C 41 82 00 0C */ beq lbl_80043C38
|
||||
/* 80043C30 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80043C34 7C 1B 07 74 */ extsb r27, r0
|
||||
lbl_80043C38:
|
||||
/* 80043C38 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043C3C 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043C40 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043C44 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043C48 38 A5 00 25 */ addi r5, r5, 0x25
|
||||
/* 80043C4C 38 C0 00 03 */ li r6, 3
|
||||
/* 80043C50 48 00 44 9D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043C54 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043C58 41 82 00 08 */ beq lbl_80043C60
|
||||
/* 80043C5C 82 A3 00 00 */ lwz r21, 0(r3)
|
||||
lbl_80043C60:
|
||||
/* 80043C60 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043C64 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043C68 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043C6C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043C70 38 A5 00 2A */ addi r5, r5, 0x2a
|
||||
/* 80043C74 38 C0 00 00 */ li r6, 0
|
||||
/* 80043C78 48 00 44 75 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043C7C 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043C80 41 82 00 08 */ beq lbl_80043C88
|
||||
/* 80043C84 C3 C3 00 00 */ lfs f30, 0(r3)
|
||||
lbl_80043C88:
|
||||
/* 80043C88 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043C8C 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043C90 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043C94 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043C98 38 A5 00 30 */ addi r5, r5, 0x30
|
||||
/* 80043C9C 38 C0 00 00 */ li r6, 0
|
||||
/* 80043CA0 48 00 44 4D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043CA4 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043CA8 41 82 00 0C */ beq lbl_80043CB4
|
||||
/* 80043CAC C3 E3 00 00 */ lfs f31, 0(r3)
|
||||
/* 80043CB0 3B 00 00 01 */ li r24, 1
|
||||
lbl_80043CB4:
|
||||
/* 80043CB4 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80043CB8 7E E4 BB 78 */ mr r4, r23
|
||||
/* 80043CBC 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80043CC0 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80043CC4 38 A5 00 35 */ addi r5, r5, 0x35
|
||||
/* 80043CC8 38 C0 00 03 */ li r6, 3
|
||||
/* 80043CCC 48 00 44 21 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80043CD0 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80043CD4 41 82 00 08 */ beq lbl_80043CDC
|
||||
/* 80043CD8 3B 40 00 00 */ li r26, 0
|
||||
lbl_80043CDC:
|
||||
/* 80043CDC 28 1E 00 00 */ cmplwi r30, 0
|
||||
/* 80043CE0 41 82 00 54 */ beq lbl_80043D34
|
||||
/* 80043CE4 7F A0 07 34 */ extsh r0, r29
|
||||
/* 80043CE8 2C 00 FF FF */ cmpwi r0, -1
|
||||
/* 80043CEC 41 82 00 48 */ beq lbl_80043D34
|
||||
/* 80043CF0 57 00 06 3F */ clrlwi. r0, r24, 0x18
|
||||
/* 80043CF4 41 82 00 10 */ beq lbl_80043D04
|
||||
/* 80043CF8 C0 02 84 D4 */ lfs f0, lit_4265(r2)
|
||||
/* 80043CFC EC 20 07 F2 */ fmuls f1, f0, f31
|
||||
/* 80043D00 48 16 4E 59 */ bl dKy_set_nexttime__Ff
|
||||
lbl_80043D04:
|
||||
/* 80043D04 93 41 00 08 */ stw r26, 8(r1)
|
||||
/* 80043D08 93 21 00 0C */ stw r25, 0xc(r1)
|
||||
/* 80043D0C 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80043D10 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80043D14 7E C5 B3 78 */ mr r5, r22
|
||||
/* 80043D18 7F 86 E3 78 */ mr r6, r28
|
||||
/* 80043D1C FC 20 F0 90 */ fmr f1, f30
|
||||
/* 80043D20 7E A7 AB 78 */ mr r7, r21
|
||||
/* 80043D24 39 00 00 01 */ li r8, 1
|
||||
/* 80043D28 7F 69 DB 78 */ mr r9, r27
|
||||
/* 80043D2C 39 40 00 00 */ li r10, 0
|
||||
/* 80043D30 4B FE 95 CD */ bl dComIfGp_setNextStage__FPCcsScScfUliScsii
|
||||
lbl_80043D34:
|
||||
/* 80043D34 38 60 00 01 */ li r3, 1
|
||||
/* 80043D38 E3 E1 00 68 */ psq_l f31, 104(r1), 0, 0 /* qr0 */
|
||||
/* 80043D3C CB E1 00 60 */ lfd f31, 0x60(r1)
|
||||
/* 80043D40 E3 C1 00 58 */ psq_l f30, 88(r1), 0, 0 /* qr0 */
|
||||
/* 80043D44 CB C1 00 50 */ lfd f30, 0x50(r1)
|
||||
/* 80043D48 39 61 00 50 */ addi r11, r1, 0x50
|
||||
/* 80043D4C 48 31 E4 B5 */ bl _restgpr_19
|
||||
/* 80043D50 80 01 00 74 */ lwz r0, 0x74(r1)
|
||||
/* 80043D54 7C 08 03 A6 */ mtlr r0
|
||||
/* 80043D58 38 21 00 70 */ addi r1, r1, 0x70
|
||||
/* 80043D5C 4E 80 00 20 */ blr
|
||||
|
|
@ -1,150 +0,0 @@
|
|||
lbl_80044CB8:
|
||||
/* 80044CB8 94 21 FF C0 */ stwu r1, -0x40(r1)
|
||||
/* 80044CBC 7C 08 02 A6 */ mflr r0
|
||||
/* 80044CC0 90 01 00 44 */ stw r0, 0x44(r1)
|
||||
/* 80044CC4 39 61 00 40 */ addi r11, r1, 0x40
|
||||
/* 80044CC8 48 31 D5 11 */ bl _savegpr_28
|
||||
/* 80044CCC 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 80044CD0 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80044CD4 3B C3 4F F8 */ addi r30, r3, 0x4ff8
|
||||
/* 80044CD8 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044CDC 3C 80 80 38 */ lis r4, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044CE0 38 84 9D D0 */ addi r4, r4, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044CE4 38 84 00 76 */ addi r4, r4, 0x76
|
||||
/* 80044CE8 38 A0 00 00 */ li r5, 0
|
||||
/* 80044CEC 38 C0 00 00 */ li r6, 0
|
||||
/* 80044CF0 48 00 2E 2D */ bl getMyStaffId__16dEvent_manager_cFPCcP10fopAc_ac_ci
|
||||
/* 80044CF4 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 80044CF8 2C 1F FF FF */ cmpwi r31, -1
|
||||
/* 80044CFC 41 82 01 D0 */ beq lbl_80044ECC
|
||||
/* 80044D00 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044D04 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044D08 48 00 32 55 */ bl getMyNowCutName__16dEvent_manager_cFi
|
||||
/* 80044D0C 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 80044D10 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044D14 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044D18 48 00 30 35 */ bl getIsAddvance__16dEvent_manager_cFi
|
||||
/* 80044D1C 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80044D20 41 82 01 AC */ beq lbl_80044ECC
|
||||
/* 80044D24 80 9D 00 00 */ lwz r4, 0(r29)
|
||||
/* 80044D28 3C 60 57 41 */ lis r3, 0x5741 /* 0x57414954@ha */
|
||||
/* 80044D2C 38 03 49 54 */ addi r0, r3, 0x4954 /* 0x57414954@l */
|
||||
/* 80044D30 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044D34 41 82 01 98 */ beq lbl_80044ECC
|
||||
/* 80044D38 40 80 01 94 */ bge lbl_80044ECC
|
||||
/* 80044D3C 3C 60 43 52 */ lis r3, 0x4352 /* 0x43524541@ha */
|
||||
/* 80044D40 38 03 45 41 */ addi r0, r3, 0x4541 /* 0x43524541@l */
|
||||
/* 80044D44 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044D48 41 82 00 08 */ beq lbl_80044D50
|
||||
/* 80044D4C 48 00 01 80 */ b lbl_80044ECC
|
||||
lbl_80044D50:
|
||||
/* 80044D50 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044D54 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044D58 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044D5C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044D60 38 A5 00 7E */ addi r5, r5, 0x7e
|
||||
/* 80044D64 38 C0 00 04 */ li r6, 4
|
||||
/* 80044D68 48 00 33 85 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044D6C 4B FE 00 55 */ bl dStage_searchName__FPCc
|
||||
/* 80044D70 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 80044D74 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044D78 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044D7C 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044D80 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044D84 38 A5 00 87 */ addi r5, r5, 0x87
|
||||
/* 80044D88 38 C0 00 03 */ li r6, 3
|
||||
/* 80044D8C 48 00 33 61 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044D90 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80044D94 40 82 00 0C */ bne lbl_80044DA0
|
||||
/* 80044D98 3B 80 FF FF */ li r28, -1
|
||||
/* 80044D9C 48 00 00 08 */ b lbl_80044DA4
|
||||
lbl_80044DA0:
|
||||
/* 80044DA0 83 83 00 00 */ lwz r28, 0(r3)
|
||||
lbl_80044DA4:
|
||||
/* 80044DA4 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044DA8 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044DAC 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044DB0 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044DB4 38 A5 00 8B */ addi r5, r5, 0x8b
|
||||
/* 80044DB8 38 C0 00 01 */ li r6, 1
|
||||
/* 80044DBC 48 00 33 31 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044DC0 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80044DC4 40 82 00 2C */ bne lbl_80044DF0
|
||||
/* 80044DC8 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 80044DCC 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80044DD0 80 63 5D AC */ lwz r3, 0x5dac(r3)
|
||||
/* 80044DD4 C0 03 04 D0 */ lfs f0, 0x4d0(r3)
|
||||
/* 80044DD8 D0 01 00 1C */ stfs f0, 0x1c(r1)
|
||||
/* 80044DDC C0 03 04 D4 */ lfs f0, 0x4d4(r3)
|
||||
/* 80044DE0 D0 01 00 20 */ stfs f0, 0x20(r1)
|
||||
/* 80044DE4 C0 03 04 D8 */ lfs f0, 0x4d8(r3)
|
||||
/* 80044DE8 D0 01 00 24 */ stfs f0, 0x24(r1)
|
||||
/* 80044DEC 48 00 00 1C */ b lbl_80044E08
|
||||
lbl_80044DF0:
|
||||
/* 80044DF0 C0 03 00 00 */ lfs f0, 0(r3)
|
||||
/* 80044DF4 D0 01 00 1C */ stfs f0, 0x1c(r1)
|
||||
/* 80044DF8 C0 03 00 04 */ lfs f0, 4(r3)
|
||||
/* 80044DFC D0 01 00 20 */ stfs f0, 0x20(r1)
|
||||
/* 80044E00 C0 03 00 08 */ lfs f0, 8(r3)
|
||||
/* 80044E04 D0 01 00 24 */ stfs f0, 0x24(r1)
|
||||
lbl_80044E08:
|
||||
/* 80044E08 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044E0C 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044E10 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044E14 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044E18 38 A5 00 8F */ addi r5, r5, 0x8f
|
||||
/* 80044E1C 38 C0 00 03 */ li r6, 3
|
||||
/* 80044E20 48 00 32 CD */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044E24 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80044E28 40 82 00 18 */ bne lbl_80044E40
|
||||
/* 80044E2C 38 00 00 00 */ li r0, 0
|
||||
/* 80044E30 B0 01 00 08 */ sth r0, 8(r1)
|
||||
/* 80044E34 B0 01 00 0A */ sth r0, 0xa(r1)
|
||||
/* 80044E38 B0 01 00 0C */ sth r0, 0xc(r1)
|
||||
/* 80044E3C 48 00 00 1C */ b lbl_80044E58
|
||||
lbl_80044E40:
|
||||
/* 80044E40 80 A3 00 08 */ lwz r5, 8(r3)
|
||||
/* 80044E44 80 83 00 04 */ lwz r4, 4(r3)
|
||||
/* 80044E48 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80044E4C B0 01 00 08 */ sth r0, 8(r1)
|
||||
/* 80044E50 B0 81 00 0A */ sth r4, 0xa(r1)
|
||||
/* 80044E54 B0 A1 00 0C */ sth r5, 0xc(r1)
|
||||
lbl_80044E58:
|
||||
/* 80044E58 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044E5C 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044E60 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044E64 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044E68 38 A5 00 95 */ addi r5, r5, 0x95
|
||||
/* 80044E6C 38 C0 00 01 */ li r6, 1
|
||||
/* 80044E70 48 00 32 7D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044E74 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80044E78 40 82 00 18 */ bne lbl_80044E90
|
||||
/* 80044E7C C0 02 84 F0 */ lfs f0, lit_4668(r2)
|
||||
/* 80044E80 D0 01 00 10 */ stfs f0, 0x10(r1)
|
||||
/* 80044E84 D0 01 00 14 */ stfs f0, 0x14(r1)
|
||||
/* 80044E88 D0 01 00 18 */ stfs f0, 0x18(r1)
|
||||
/* 80044E8C 48 00 00 1C */ b lbl_80044EA8
|
||||
lbl_80044E90:
|
||||
/* 80044E90 C0 03 00 00 */ lfs f0, 0(r3)
|
||||
/* 80044E94 D0 01 00 10 */ stfs f0, 0x10(r1)
|
||||
/* 80044E98 C0 03 00 04 */ lfs f0, 4(r3)
|
||||
/* 80044E9C D0 01 00 14 */ stfs f0, 0x14(r1)
|
||||
/* 80044EA0 C0 03 00 08 */ lfs f0, 8(r3)
|
||||
/* 80044EA4 D0 01 00 18 */ stfs f0, 0x18(r1)
|
||||
lbl_80044EA8:
|
||||
/* 80044EA8 A8 7D 00 08 */ lha r3, 8(r29)
|
||||
/* 80044EAC 7F 84 E3 78 */ mr r4, r28
|
||||
/* 80044EB0 38 A1 00 1C */ addi r5, r1, 0x1c
|
||||
/* 80044EB4 88 CD 87 E4 */ lbz r6, mStayNo__20dStage_roomControl_c+0x0(r13)
|
||||
/* 80044EB8 7C C6 07 74 */ extsb r6, r6
|
||||
/* 80044EBC 38 E1 00 08 */ addi r7, r1, 8
|
||||
/* 80044EC0 39 01 00 10 */ addi r8, r1, 0x10
|
||||
/* 80044EC4 89 3D 00 0A */ lbz r9, 0xa(r29)
|
||||
/* 80044EC8 4B FD 4E D1 */ bl fopAcM_create__FsUlPC4cXyziPC5csXyzPC4cXyzSc
|
||||
lbl_80044ECC:
|
||||
/* 80044ECC 39 61 00 40 */ addi r11, r1, 0x40
|
||||
/* 80044ED0 48 31 D3 55 */ bl _restgpr_28
|
||||
/* 80044ED4 80 01 00 44 */ lwz r0, 0x44(r1)
|
||||
/* 80044ED8 7C 08 03 A6 */ mtlr r0
|
||||
/* 80044EDC 38 21 00 40 */ addi r1, r1, 0x40
|
||||
/* 80044EE0 4E 80 00 20 */ blr
|
||||
|
|
@ -1,663 +0,0 @@
|
|||
lbl_80044EE4:
|
||||
/* 80044EE4 94 21 FF C0 */ stwu r1, -0x40(r1)
|
||||
/* 80044EE8 7C 08 02 A6 */ mflr r0
|
||||
/* 80044EEC 90 01 00 44 */ stw r0, 0x44(r1)
|
||||
/* 80044EF0 39 61 00 40 */ addi r11, r1, 0x40
|
||||
/* 80044EF4 48 31 D2 D5 */ bl _savegpr_24
|
||||
/* 80044EF8 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 80044EFC 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 80044F00 3B 63 61 C0 */ addi r27, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80044F04 83 3B 5D B4 */ lwz r25, 0x5db4(r27)
|
||||
/* 80044F08 3B 9B 4E C8 */ addi r28, r27, 0x4ec8
|
||||
/* 80044F0C 3B DB 4F F8 */ addi r30, r27, 0x4ff8
|
||||
/* 80044F10 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044F14 3C 80 80 38 */ lis r4, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044F18 38 84 9D D0 */ addi r4, r4, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044F1C 38 84 00 9B */ addi r4, r4, 0x9b
|
||||
/* 80044F20 38 A0 00 00 */ li r5, 0
|
||||
/* 80044F24 38 C0 00 00 */ li r6, 0
|
||||
/* 80044F28 48 00 2B F5 */ bl getMyStaffId__16dEvent_manager_cFPCcP10fopAc_ac_ci
|
||||
/* 80044F2C 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 80044F30 2C 1F FF FF */ cmpwi r31, -1
|
||||
/* 80044F34 41 82 09 2C */ beq lbl_80045860
|
||||
/* 80044F38 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044F3C 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044F40 48 00 30 1D */ bl getMyNowCutName__16dEvent_manager_cFi
|
||||
/* 80044F44 7C 7A 1B 78 */ mr r26, r3
|
||||
/* 80044F48 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044F4C 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044F50 48 00 2D FD */ bl getIsAddvance__16dEvent_manager_cFi
|
||||
/* 80044F54 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80044F58 41 82 07 4C */ beq lbl_800456A4
|
||||
/* 80044F5C 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044F60 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044F64 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044F68 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044F6C 38 A5 00 A4 */ addi r5, r5, 0xa4
|
||||
/* 80044F70 38 C0 00 03 */ li r6, 3
|
||||
/* 80044F74 48 00 31 79 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044F78 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 80044F7C 41 82 00 28 */ beq lbl_80044FA4
|
||||
/* 80044F80 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 80044F84 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80044F88 38 63 07 F0 */ addi r3, r3, 0x7f0
|
||||
/* 80044F8C 80 04 00 00 */ lwz r0, 0(r4)
|
||||
/* 80044F90 54 00 08 3C */ slwi r0, r0, 1
|
||||
/* 80044F94 3C 80 80 3A */ lis r4, saveBitLabels__16dSv_event_flag_c@ha /* 0x803A7288@ha */
|
||||
/* 80044F98 38 84 72 88 */ addi r4, r4, saveBitLabels__16dSv_event_flag_c@l /* 0x803A7288@l */
|
||||
/* 80044F9C 7C 84 02 2E */ lhzx r4, r4, r0
|
||||
/* 80044FA0 4B FE F9 ED */ bl onEventBit__11dSv_event_cFUs
|
||||
lbl_80044FA4:
|
||||
/* 80044FA4 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044FA8 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044FAC 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044FB0 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044FB4 38 A5 00 AE */ addi r5, r5, 0xae
|
||||
/* 80044FB8 38 C0 00 03 */ li r6, 3
|
||||
/* 80044FBC 48 00 31 31 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044FC0 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 80044FC4 41 82 00 28 */ beq lbl_80044FEC
|
||||
/* 80044FC8 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 80044FCC 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80044FD0 38 63 07 F0 */ addi r3, r3, 0x7f0
|
||||
/* 80044FD4 80 04 00 00 */ lwz r0, 0(r4)
|
||||
/* 80044FD8 54 00 08 3C */ slwi r0, r0, 1
|
||||
/* 80044FDC 3C 80 80 3A */ lis r4, saveBitLabels__16dSv_event_flag_c@ha /* 0x803A7288@ha */
|
||||
/* 80044FE0 38 84 72 88 */ addi r4, r4, saveBitLabels__16dSv_event_flag_c@l /* 0x803A7288@l */
|
||||
/* 80044FE4 7C 84 02 2E */ lhzx r4, r4, r0
|
||||
/* 80044FE8 4B FE F9 BD */ bl offEventBit__11dSv_event_cFUs
|
||||
lbl_80044FEC:
|
||||
/* 80044FEC 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80044FF0 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80044FF4 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044FF8 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044FFC 38 A5 00 BB */ addi r5, r5, 0xbb
|
||||
/* 80045000 38 C0 00 03 */ li r6, 3
|
||||
/* 80045004 48 00 30 E9 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045008 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 8004500C 41 82 00 0C */ beq lbl_80045018
|
||||
/* 80045010 83 03 00 00 */ lwz r24, 0(r3)
|
||||
/* 80045014 48 00 00 24 */ b lbl_80045038
|
||||
lbl_80045018:
|
||||
/* 80045018 38 7B 4E 20 */ addi r3, r27, 0x4e20
|
||||
/* 8004501C 81 9B 4E 20 */ lwz r12, 0x4e20(r27)
|
||||
/* 80045020 81 8C 00 BC */ lwz r12, 0xbc(r12)
|
||||
/* 80045024 7D 89 03 A6 */ mtctr r12
|
||||
/* 80045028 4E 80 04 21 */ bctrl
|
||||
/* 8004502C 88 03 00 09 */ lbz r0, 9(r3)
|
||||
/* 80045030 54 00 FE FE */ rlwinm r0, r0, 0x1f, 0x1b, 0x1f
|
||||
/* 80045034 7C 18 03 78 */ mr r24, r0
|
||||
lbl_80045038:
|
||||
/* 80045038 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8004503C 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045040 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045044 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045048 38 A5 00 C7 */ addi r5, r5, 0xc7
|
||||
/* 8004504C 38 C0 00 03 */ li r6, 3
|
||||
/* 80045050 48 00 30 9D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045054 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 80045058 41 82 00 10 */ beq lbl_80045068
|
||||
/* 8004505C 7F 03 C3 78 */ mr r3, r24
|
||||
/* 80045060 80 84 00 00 */ lwz r4, 0(r4)
|
||||
/* 80045064 4B FE 85 C5 */ bl dComIfGs_onStageSwitch__Fii
|
||||
lbl_80045068:
|
||||
/* 80045068 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8004506C 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045070 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045074 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045078 38 A5 00 D1 */ addi r5, r5, 0xd1
|
||||
/* 8004507C 38 C0 00 03 */ li r6, 3
|
||||
/* 80045080 48 00 30 6D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045084 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 80045088 41 82 00 10 */ beq lbl_80045098
|
||||
/* 8004508C 7F 03 C3 78 */ mr r3, r24
|
||||
/* 80045090 80 84 00 00 */ lwz r4, 0(r4)
|
||||
/* 80045094 4B FE 86 21 */ bl dComIfGs_offStageSwitch__Fii
|
||||
lbl_80045098:
|
||||
/* 80045098 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8004509C 7F E4 FB 78 */ mr r4, r31
|
||||
/* 800450A0 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800450A4 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800450A8 38 A5 00 DB */ addi r5, r5, 0xdb
|
||||
/* 800450AC 38 C0 00 03 */ li r6, 3
|
||||
/* 800450B0 48 00 30 3D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800450B4 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 800450B8 41 82 00 28 */ beq lbl_800450E0
|
||||
/* 800450BC 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 800450C0 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 800450C4 38 63 0D D8 */ addi r3, r3, 0xdd8
|
||||
/* 800450C8 80 04 00 00 */ lwz r0, 0(r4)
|
||||
/* 800450CC 54 00 08 3C */ slwi r0, r0, 1
|
||||
/* 800450D0 3C 80 80 38 */ lis r4, tempBitLabels__20dSv_event_tmp_flag_c@ha /* 0x803790C0@ha */
|
||||
/* 800450D4 38 84 90 C0 */ addi r4, r4, tempBitLabels__20dSv_event_tmp_flag_c@l /* 0x803790C0@l */
|
||||
/* 800450D8 7C 84 02 2E */ lhzx r4, r4, r0
|
||||
/* 800450DC 4B FE F8 B1 */ bl onEventBit__11dSv_event_cFUs
|
||||
lbl_800450E0:
|
||||
/* 800450E0 7F C3 F3 78 */ mr r3, r30
|
||||
/* 800450E4 7F E4 FB 78 */ mr r4, r31
|
||||
/* 800450E8 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800450EC 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800450F0 38 A5 00 E2 */ addi r5, r5, 0xe2
|
||||
/* 800450F4 38 C0 00 03 */ li r6, 3
|
||||
/* 800450F8 48 00 2F F5 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800450FC 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 80045100 41 82 00 28 */ beq lbl_80045128
|
||||
/* 80045104 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 80045108 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 8004510C 38 63 0D D8 */ addi r3, r3, 0xdd8
|
||||
/* 80045110 80 04 00 00 */ lwz r0, 0(r4)
|
||||
/* 80045114 54 00 08 3C */ slwi r0, r0, 1
|
||||
/* 80045118 3C 80 80 38 */ lis r4, tempBitLabels__20dSv_event_tmp_flag_c@ha /* 0x803790C0@ha */
|
||||
/* 8004511C 38 84 90 C0 */ addi r4, r4, tempBitLabels__20dSv_event_tmp_flag_c@l /* 0x803790C0@l */
|
||||
/* 80045120 7C 84 02 2E */ lhzx r4, r4, r0
|
||||
/* 80045124 4B FE F8 81 */ bl offEventBit__11dSv_event_cFUs
|
||||
lbl_80045128:
|
||||
/* 80045128 80 9A 00 00 */ lwz r4, 0(r26)
|
||||
/* 8004512C 3C 60 53 4B */ lis r3, 0x534B /* 0x534B4950@ha */
|
||||
/* 80045130 38 03 49 50 */ addi r0, r3, 0x4950 /* 0x534B4950@l */
|
||||
/* 80045134 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045138 41 82 01 34 */ beq lbl_8004526C
|
||||
/* 8004513C 40 80 00 68 */ bge lbl_800451A4
|
||||
/* 80045140 3C 60 4D 41 */ lis r3, 0x4D41 /* 0x4D415054@ha */
|
||||
/* 80045144 38 03 50 54 */ addi r0, r3, 0x5054 /* 0x4D415054@l */
|
||||
/* 80045148 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 8004514C 41 82 03 60 */ beq lbl_800454AC
|
||||
/* 80045150 40 80 00 2C */ bge lbl_8004517C
|
||||
/* 80045154 3C 60 46 41 */ lis r3, 0x4641 /* 0x46414445@ha */
|
||||
/* 80045158 38 03 44 45 */ addi r0, r3, 0x4445 /* 0x46414445@l */
|
||||
/* 8004515C 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045160 41 82 01 80 */ beq lbl_800452E0
|
||||
/* 80045164 40 80 05 40 */ bge lbl_800456A4
|
||||
/* 80045168 3C 60 43 41 */ lis r3, 0x4341 /* 0x43415354@ha */
|
||||
/* 8004516C 38 03 53 54 */ addi r0, r3, 0x5354 /* 0x43415354@l */
|
||||
/* 80045170 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045174 41 82 03 9C */ beq lbl_80045510
|
||||
/* 80045178 48 00 05 2C */ b lbl_800456A4
|
||||
lbl_8004517C:
|
||||
/* 8004517C 3C 60 50 4C */ lis r3, 0x504C /* 0x504C4159@ha */
|
||||
/* 80045180 38 03 41 59 */ addi r0, r3, 0x4159 /* 0x504C4159@l */
|
||||
/* 80045184 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045188 41 82 00 7C */ beq lbl_80045204
|
||||
/* 8004518C 40 80 05 18 */ bge lbl_800456A4
|
||||
/* 80045190 3C 60 4E 45 */ lis r3, 0x4E45 /* 0x4E455854@ha */
|
||||
/* 80045194 38 03 58 54 */ addi r0, r3, 0x5854 /* 0x4E455854@l */
|
||||
/* 80045198 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 8004519C 41 82 00 C0 */ beq lbl_8004525C
|
||||
/* 800451A0 48 00 05 04 */ b lbl_800456A4
|
||||
lbl_800451A4:
|
||||
/* 800451A4 3C 60 57 41 */ lis r3, 0x5741 /* 0x57414954@ha */
|
||||
/* 800451A8 38 03 49 54 */ addi r0, r3, 0x4954 /* 0x57414954@l */
|
||||
/* 800451AC 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 800451B0 41 82 00 44 */ beq lbl_800451F4
|
||||
/* 800451B4 40 80 00 2C */ bge lbl_800451E0
|
||||
/* 800451B8 3C 60 56 49 */ lis r3, 0x5649 /* 0x56494252@ha */
|
||||
/* 800451BC 38 03 42 52 */ addi r0, r3, 0x4252 /* 0x56494252@l */
|
||||
/* 800451C0 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 800451C4 41 82 01 B0 */ beq lbl_80045374
|
||||
/* 800451C8 40 80 04 DC */ bge lbl_800456A4
|
||||
/* 800451CC 3C 60 53 50 */ lis r3, 0x5350 /* 0x53504543@ha */
|
||||
/* 800451D0 38 03 45 43 */ addi r0, r3, 0x4543 /* 0x53504543@l */
|
||||
/* 800451D4 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 800451D8 41 82 04 2C */ beq lbl_80045604
|
||||
/* 800451DC 48 00 04 C8 */ b lbl_800456A4
|
||||
lbl_800451E0:
|
||||
/* 800451E0 3C 60 57 49 */ lis r3, 0x5749 /* 0x57495045@ha */
|
||||
/* 800451E4 38 03 50 45 */ addi r0, r3, 0x5045 /* 0x57495045@l */
|
||||
/* 800451E8 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 800451EC 41 82 02 04 */ beq lbl_800453F0
|
||||
/* 800451F0 48 00 04 B4 */ b lbl_800456A4
|
||||
lbl_800451F4:
|
||||
/* 800451F4 7F A3 EB 78 */ mr r3, r29
|
||||
/* 800451F8 7F E4 FB 78 */ mr r4, r31
|
||||
/* 800451FC 4B FF ED DD */ bl specialProc_WaitStart__12dEvDtStaff_cFi
|
||||
/* 80045200 48 00 04 A4 */ b lbl_800456A4
|
||||
lbl_80045204:
|
||||
/* 80045204 7F 43 D3 78 */ mr r3, r26
|
||||
/* 80045208 3C 80 80 38 */ lis r4, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 8004520C 38 84 9D D0 */ addi r4, r4, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045210 38 84 00 EC */ addi r4, r4, 0xec
|
||||
/* 80045214 48 32 37 81 */ bl strcmp
|
||||
/* 80045218 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8004521C 40 82 00 14 */ bne lbl_80045230
|
||||
/* 80045220 80 19 05 70 */ lwz r0, 0x570(r25)
|
||||
/* 80045224 64 00 08 00 */ oris r0, r0, 0x800
|
||||
/* 80045228 90 19 05 70 */ stw r0, 0x570(r25)
|
||||
/* 8004522C 48 00 04 78 */ b lbl_800456A4
|
||||
lbl_80045230:
|
||||
/* 80045230 7F 43 D3 78 */ mr r3, r26
|
||||
/* 80045234 3C 80 80 38 */ lis r4, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045238 38 84 9D D0 */ addi r4, r4, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 8004523C 38 84 00 FA */ addi r4, r4, 0xfa
|
||||
/* 80045240 48 32 37 55 */ bl strcmp
|
||||
/* 80045244 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80045248 40 82 04 5C */ bne lbl_800456A4
|
||||
/* 8004524C 80 19 05 70 */ lwz r0, 0x570(r25)
|
||||
/* 80045250 54 00 01 46 */ rlwinm r0, r0, 0, 5, 3
|
||||
/* 80045254 90 19 05 70 */ stw r0, 0x570(r25)
|
||||
/* 80045258 48 00 04 4C */ b lbl_800456A4
|
||||
lbl_8004525C:
|
||||
/* 8004525C 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80045260 38 80 00 0D */ li r4, 0xd
|
||||
/* 80045264 4B FF E7 B1 */ bl dEvDt_Next_Stage__Fii
|
||||
/* 80045268 48 00 04 3C */ b lbl_800456A4
|
||||
lbl_8004526C:
|
||||
/* 8004526C 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045270 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045274 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045278 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 8004527C 38 A5 01 06 */ addi r5, r5, 0x106
|
||||
/* 80045280 38 C0 00 04 */ li r6, 4
|
||||
/* 80045284 48 00 2E 69 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045288 7C 79 1B 78 */ mr r25, r3
|
||||
/* 8004528C 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045290 80 9C 00 C4 */ lwz r4, 0xc4(r28)
|
||||
/* 80045294 4B FF E0 59 */ bl convPId__14dEvt_control_cFUi
|
||||
/* 80045298 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 8004529C 40 82 00 14 */ bne lbl_800452B0
|
||||
/* 800452A0 7F 83 E3 78 */ mr r3, r28
|
||||
/* 800452A4 80 9C 00 C8 */ lwz r4, 0xc8(r28)
|
||||
/* 800452A8 4B FF E0 45 */ bl convPId__14dEvt_control_cFUi
|
||||
/* 800452AC 7C 64 1B 78 */ mr r4, r3
|
||||
lbl_800452B0:
|
||||
/* 800452B0 28 19 00 00 */ cmplwi r25, 0
|
||||
/* 800452B4 41 82 00 14 */ beq lbl_800452C8
|
||||
/* 800452B8 7F 83 E3 78 */ mr r3, r28
|
||||
/* 800452BC 7F 25 CB 78 */ mr r5, r25
|
||||
/* 800452C0 4B FF D6 99 */ bl setSkipZev__14dEvt_control_cFPvPc
|
||||
/* 800452C4 48 00 03 E0 */ b lbl_800456A4
|
||||
lbl_800452C8:
|
||||
/* 800452C8 7F 83 E3 78 */ mr r3, r28
|
||||
/* 800452CC 3C A0 80 04 */ lis r5, dEv_defaultSkipProc__FPvi@ha /* 0x800425E8@ha */
|
||||
/* 800452D0 38 A5 25 E8 */ addi r5, r5, dEv_defaultSkipProc__FPvi@l /* 0x800425E8@l */
|
||||
/* 800452D4 38 C0 00 00 */ li r6, 0
|
||||
/* 800452D8 4B FF D6 3D */ bl setSkipProc__14dEvt_control_cFPvPFPvi_ii
|
||||
/* 800452DC 48 00 03 C8 */ b lbl_800456A4
|
||||
lbl_800452E0:
|
||||
/* 800452E0 7F C3 F3 78 */ mr r3, r30
|
||||
/* 800452E4 7F E4 FB 78 */ mr r4, r31
|
||||
/* 800452E8 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800452EC 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800452F0 38 A5 01 0A */ addi r5, r5, 0x10a
|
||||
/* 800452F4 38 C0 00 00 */ li r6, 0
|
||||
/* 800452F8 48 00 2D F5 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800452FC 7C 79 1B 78 */ mr r25, r3
|
||||
/* 80045300 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045304 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045308 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 8004530C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045310 38 A5 01 0F */ addi r5, r5, 0x10f
|
||||
/* 80045314 38 C0 00 03 */ li r6, 3
|
||||
/* 80045318 48 00 2D D5 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 8004531C C0 39 00 00 */ lfs f1, 0(r25)
|
||||
/* 80045320 C0 02 84 D0 */ lfs f0, lit_4264(r2)
|
||||
/* 80045324 FC 01 00 40 */ fcmpo cr0, f1, f0
|
||||
/* 80045328 40 81 00 08 */ ble lbl_80045330
|
||||
/* 8004532C D0 0D 86 5C */ stfs f0, mFadeRate__13mDoGph_gInf_c(r13)
|
||||
lbl_80045330:
|
||||
/* 80045330 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045334 41 82 00 34 */ beq lbl_80045368
|
||||
/* 80045338 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 8004533C 98 01 00 0C */ stb r0, 0xc(r1)
|
||||
/* 80045340 80 03 00 04 */ lwz r0, 4(r3)
|
||||
/* 80045344 98 01 00 0D */ stb r0, 0xd(r1)
|
||||
/* 80045348 80 03 00 08 */ lwz r0, 8(r3)
|
||||
/* 8004534C 98 01 00 0E */ stb r0, 0xe(r1)
|
||||
/* 80045350 80 03 00 0C */ lwz r0, 0xc(r3)
|
||||
/* 80045354 98 01 00 0F */ stb r0, 0xf(r1)
|
||||
/* 80045358 C0 39 00 00 */ lfs f1, 0(r25)
|
||||
/* 8004535C 38 61 00 0C */ addi r3, r1, 0xc
|
||||
/* 80045360 4B FC 2C 79 */ bl fadeOut__13mDoGph_gInf_cFfR8_GXColor
|
||||
/* 80045364 48 00 03 40 */ b lbl_800456A4
|
||||
lbl_80045368:
|
||||
/* 80045368 C0 39 00 00 */ lfs f1, 0(r25)
|
||||
/* 8004536C 4B FC 2D 65 */ bl fadeOut__13mDoGph_gInf_cFf
|
||||
/* 80045370 48 00 03 34 */ b lbl_800456A4
|
||||
lbl_80045374:
|
||||
/* 80045374 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80045378 7F E4 FB 78 */ mr r4, r31
|
||||
/* 8004537C 4B FF EC 5D */ bl specialProc_WaitStart__12dEvDtStaff_cFi
|
||||
/* 80045380 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045384 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045388 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 8004538C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045390 38 A5 01 15 */ addi r5, r5, 0x115
|
||||
/* 80045394 38 C0 00 03 */ li r6, 3
|
||||
/* 80045398 48 00 2D 55 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 8004539C 7C 79 1B 78 */ mr r25, r3
|
||||
/* 800453A0 7F C3 F3 78 */ mr r3, r30
|
||||
/* 800453A4 7F E4 FB 78 */ mr r4, r31
|
||||
/* 800453A8 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800453AC 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800453B0 38 A5 00 62 */ addi r5, r5, 0x62
|
||||
/* 800453B4 38 C0 00 03 */ li r6, 3
|
||||
/* 800453B8 48 00 2D 35 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800453BC 7C 66 1B 78 */ mr r6, r3
|
||||
/* 800453C0 C0 22 84 D0 */ lfs f1, lit_4264(r2)
|
||||
/* 800453C4 D0 21 00 10 */ stfs f1, 0x10(r1)
|
||||
/* 800453C8 C0 02 84 F0 */ lfs f0, lit_4668(r2)
|
||||
/* 800453CC D0 01 00 14 */ stfs f0, 0x14(r1)
|
||||
/* 800453D0 D0 21 00 18 */ stfs f1, 0x18(r1)
|
||||
/* 800453D4 38 7B 5B D4 */ addi r3, r27, 0x5bd4
|
||||
/* 800453D8 7F 24 CB 78 */ mr r4, r25
|
||||
/* 800453DC 38 A0 00 00 */ li r5, 0
|
||||
/* 800453E0 80 C6 00 00 */ lwz r6, 0(r6)
|
||||
/* 800453E4 38 E1 00 10 */ addi r7, r1, 0x10
|
||||
/* 800453E8 48 02 A8 25 */ bl StartQuake__12dVibration_cFPCUcii4cXyz
|
||||
/* 800453EC 48 00 02 B8 */ b lbl_800456A4
|
||||
lbl_800453F0:
|
||||
/* 800453F0 7F C3 F3 78 */ mr r3, r30
|
||||
/* 800453F4 7F E4 FB 78 */ mr r4, r31
|
||||
/* 800453F8 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800453FC 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045400 38 A5 01 0A */ addi r5, r5, 0x10a
|
||||
/* 80045404 38 C0 00 00 */ li r6, 0
|
||||
/* 80045408 48 00 2C E5 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 8004540C 7C 79 1B 78 */ mr r25, r3
|
||||
/* 80045410 C0 03 00 00 */ lfs f0, 0(r3)
|
||||
/* 80045414 FC 20 00 50 */ fneg f1, f0
|
||||
/* 80045418 48 01 14 C1 */ bl wipeIn__12dDlst_list_cFf
|
||||
/* 8004541C C0 39 00 00 */ lfs f1, 0(r25)
|
||||
/* 80045420 C0 02 84 D0 */ lfs f0, lit_4264(r2)
|
||||
/* 80045424 FC 01 00 40 */ fcmpo cr0, f1, f0
|
||||
/* 80045428 40 81 00 10 */ ble lbl_80045438
|
||||
/* 8004542C 38 00 00 00 */ li r0, 0
|
||||
/* 80045430 B0 1D 00 42 */ sth r0, 0x42(r29)
|
||||
/* 80045434 48 00 00 0C */ b lbl_80045440
|
||||
lbl_80045438:
|
||||
/* 80045438 38 00 00 01 */ li r0, 1
|
||||
/* 8004543C B0 1D 00 42 */ sth r0, 0x42(r29)
|
||||
lbl_80045440:
|
||||
/* 80045440 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045444 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045448 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 8004544C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045450 38 A5 00 70 */ addi r5, r5, 0x70
|
||||
/* 80045454 38 C0 00 03 */ li r6, 3
|
||||
/* 80045458 48 00 2C 95 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 8004545C 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045460 41 82 02 44 */ beq lbl_800456A4
|
||||
/* 80045464 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80045468 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 8004546C 41 82 00 08 */ beq lbl_80045474
|
||||
/* 80045470 48 00 02 34 */ b lbl_800456A4
|
||||
lbl_80045474:
|
||||
/* 80045474 38 00 00 00 */ li r0, 0
|
||||
/* 80045478 90 01 00 08 */ stw r0, 8(r1)
|
||||
/* 8004547C 80 6D 8D E8 */ lwz r3, mAudioMgrPtr__10Z2AudioMgr(r13)
|
||||
/* 80045480 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 80045484 38 A0 00 00 */ li r5, 0
|
||||
/* 80045488 38 C0 00 00 */ li r6, 0
|
||||
/* 8004548C 38 E0 00 00 */ li r7, 0
|
||||
/* 80045490 C0 22 84 F0 */ lfs f1, lit_4668(r2)
|
||||
/* 80045494 FC 40 08 90 */ fmr f2, f1
|
||||
/* 80045498 C0 62 84 F4 */ lfs f3, lit_4669(r2)
|
||||
/* 8004549C FC 80 18 90 */ fmr f4, f3
|
||||
/* 800454A0 39 00 00 00 */ li r8, 0
|
||||
/* 800454A4 48 26 64 E1 */ bl seStart__7Z2SeMgrF10JAISoundIDPC3VecUlScffffUc
|
||||
/* 800454A8 48 00 01 FC */ b lbl_800456A4
|
||||
lbl_800454AC:
|
||||
/* 800454AC 7F C3 F3 78 */ mr r3, r30
|
||||
/* 800454B0 7F E4 FB 78 */ mr r4, r31
|
||||
/* 800454B4 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800454B8 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800454BC 38 C0 00 03 */ li r6, 3
|
||||
/* 800454C0 48 00 2C 2D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800454C4 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 800454C8 B0 1D 00 42 */ sth r0, 0x42(r29)
|
||||
/* 800454CC A8 1D 00 42 */ lha r0, 0x42(r29)
|
||||
/* 800454D0 54 03 06 3E */ clrlwi r3, r0, 0x18
|
||||
/* 800454D4 4B FF E0 05 */ bl searchMapEventData__14dEvt_control_cFUc
|
||||
/* 800454D8 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 800454DC 41 82 00 28 */ beq lbl_80045504
|
||||
/* 800454E0 88 03 00 00 */ lbz r0, 0(r3)
|
||||
/* 800454E4 28 00 00 00 */ cmplwi r0, 0
|
||||
/* 800454E8 40 82 00 10 */ bne lbl_800454F8
|
||||
/* 800454EC A0 03 00 14 */ lhz r0, 0x14(r3)
|
||||
/* 800454F0 B0 1D 00 44 */ sth r0, 0x44(r29)
|
||||
/* 800454F4 48 00 01 B0 */ b lbl_800456A4
|
||||
lbl_800454F8:
|
||||
/* 800454F8 38 00 FF FF */ li r0, -1
|
||||
/* 800454FC B0 1D 00 44 */ sth r0, 0x44(r29)
|
||||
/* 80045500 48 00 01 A4 */ b lbl_800456A4
|
||||
lbl_80045504:
|
||||
/* 80045504 38 00 00 00 */ li r0, 0
|
||||
/* 80045508 B0 1D 00 44 */ sth r0, 0x44(r29)
|
||||
/* 8004550C 48 00 01 98 */ b lbl_800456A4
|
||||
lbl_80045510:
|
||||
/* 80045510 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045514 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045518 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 8004551C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045520 38 A5 01 1D */ addi r5, r5, 0x11d
|
||||
/* 80045524 38 C0 00 04 */ li r6, 4
|
||||
/* 80045528 48 00 2B C5 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 8004552C 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045530 41 82 00 1C */ beq lbl_8004554C
|
||||
/* 80045534 38 80 FF FF */ li r4, -1
|
||||
/* 80045538 4B FD 82 69 */ bl fopAcM_searchFromName4Event__FPCcs
|
||||
/* 8004553C 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 80045540 41 82 00 0C */ beq lbl_8004554C
|
||||
/* 80045544 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045548 4B FF E1 15 */ bl setPt2__14dEvt_control_cFPv
|
||||
lbl_8004554C:
|
||||
/* 8004554C 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045550 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045554 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045558 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 8004555C 38 A5 01 21 */ addi r5, r5, 0x121
|
||||
/* 80045560 38 C0 00 04 */ li r6, 4
|
||||
/* 80045564 48 00 2B 89 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045568 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 8004556C 41 82 00 1C */ beq lbl_80045588
|
||||
/* 80045570 38 80 FF FF */ li r4, -1
|
||||
/* 80045574 4B FD 82 2D */ bl fopAcM_searchFromName4Event__FPCcs
|
||||
/* 80045578 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 8004557C 41 82 00 0C */ beq lbl_80045588
|
||||
/* 80045580 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045584 4B FF E1 09 */ bl setPtT__14dEvt_control_cFPv
|
||||
lbl_80045588:
|
||||
/* 80045588 7F C3 F3 78 */ mr r3, r30
|
||||
/* 8004558C 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045590 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045594 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045598 38 A5 01 25 */ addi r5, r5, 0x125
|
||||
/* 8004559C 38 C0 00 04 */ li r6, 4
|
||||
/* 800455A0 48 00 2B 4D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800455A4 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 800455A8 41 82 00 1C */ beq lbl_800455C4
|
||||
/* 800455AC 38 80 FF FF */ li r4, -1
|
||||
/* 800455B0 4B FD 81 F1 */ bl fopAcM_searchFromName4Event__FPCcs
|
||||
/* 800455B4 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 800455B8 41 82 00 0C */ beq lbl_800455C4
|
||||
/* 800455BC 7F 83 E3 78 */ mr r3, r28
|
||||
/* 800455C0 4B FF E0 FD */ bl setPtI__14dEvt_control_cFPv
|
||||
lbl_800455C4:
|
||||
/* 800455C4 7F C3 F3 78 */ mr r3, r30
|
||||
/* 800455C8 7F E4 FB 78 */ mr r4, r31
|
||||
/* 800455CC 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800455D0 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800455D4 38 A5 01 29 */ addi r5, r5, 0x129
|
||||
/* 800455D8 38 C0 00 04 */ li r6, 4
|
||||
/* 800455DC 48 00 2B 11 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800455E0 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 800455E4 41 82 00 C0 */ beq lbl_800456A4
|
||||
/* 800455E8 38 80 FF FF */ li r4, -1
|
||||
/* 800455EC 4B FD 81 B5 */ bl fopAcM_searchFromName4Event__FPCcs
|
||||
/* 800455F0 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 800455F4 41 82 00 B0 */ beq lbl_800456A4
|
||||
/* 800455F8 7F 83 E3 78 */ mr r3, r28
|
||||
/* 800455FC 4B FF E0 F9 */ bl setPtD__14dEvt_control_cFPv
|
||||
/* 80045600 48 00 00 A4 */ b lbl_800456A4
|
||||
lbl_80045604:
|
||||
/* 80045604 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045608 7F E4 FB 78 */ mr r4, r31
|
||||
/* 8004560C 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045610 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045614 38 A5 00 62 */ addi r5, r5, 0x62
|
||||
/* 80045618 38 C0 00 03 */ li r6, 3
|
||||
/* 8004561C 48 00 2A D1 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045620 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045624 41 82 00 80 */ beq lbl_800456A4
|
||||
/* 80045628 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 8004562C 2C 00 00 08 */ cmpwi r0, 8
|
||||
/* 80045630 41 82 00 08 */ beq lbl_80045638
|
||||
/* 80045634 48 00 00 70 */ b lbl_800456A4
|
||||
lbl_80045638:
|
||||
/* 80045638 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 8004563C 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80045640 3B 23 07 F0 */ addi r25, r3, 0x7f0
|
||||
/* 80045644 7F 23 CB 78 */ mr r3, r25
|
||||
/* 80045648 3C 80 80 3A */ lis r4, saveBitLabels__16dSv_event_flag_c@ha /* 0x803A7288@ha */
|
||||
/* 8004564C 38 84 72 88 */ addi r4, r4, saveBitLabels__16dSv_event_flag_c@l /* 0x803A7288@l */
|
||||
/* 80045650 A0 84 03 F4 */ lhz r4, 0x3f4(r4)
|
||||
/* 80045654 4B FE F3 69 */ bl isEventBit__11dSv_event_cCFUs
|
||||
/* 80045658 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8004565C 41 82 00 18 */ beq lbl_80045674
|
||||
/* 80045660 7F 23 CB 78 */ mr r3, r25
|
||||
/* 80045664 3C 80 80 3A */ lis r4, saveBitLabels__16dSv_event_flag_c@ha /* 0x803A7288@ha */
|
||||
/* 80045668 38 84 72 88 */ addi r4, r4, saveBitLabels__16dSv_event_flag_c@l /* 0x803A7288@l */
|
||||
/* 8004566C A0 84 04 6C */ lhz r4, 0x46c(r4)
|
||||
/* 80045670 4B FE F3 1D */ bl onEventBit__11dSv_event_cFUs
|
||||
lbl_80045674:
|
||||
/* 80045674 7F 23 CB 78 */ mr r3, r25
|
||||
/* 80045678 3C 80 80 3A */ lis r4, saveBitLabels__16dSv_event_flag_c@ha /* 0x803A7288@ha */
|
||||
/* 8004567C 38 84 72 88 */ addi r4, r4, saveBitLabels__16dSv_event_flag_c@l /* 0x803A7288@l */
|
||||
/* 80045680 A0 84 03 F6 */ lhz r4, 0x3f6(r4)
|
||||
/* 80045684 4B FE F3 39 */ bl isEventBit__11dSv_event_cCFUs
|
||||
/* 80045688 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 8004568C 41 82 00 18 */ beq lbl_800456A4
|
||||
/* 80045690 7F 23 CB 78 */ mr r3, r25
|
||||
/* 80045694 3C 80 80 3A */ lis r4, saveBitLabels__16dSv_event_flag_c@ha /* 0x803A7288@ha */
|
||||
/* 80045698 38 84 72 88 */ addi r4, r4, saveBitLabels__16dSv_event_flag_c@l /* 0x803A7288@l */
|
||||
/* 8004569C A0 84 04 6E */ lhz r4, 0x46e(r4)
|
||||
/* 800456A0 4B FE F2 ED */ bl onEventBit__11dSv_event_cFUs
|
||||
lbl_800456A4:
|
||||
/* 800456A4 80 9A 00 00 */ lwz r4, 0(r26)
|
||||
/* 800456A8 3C 60 56 49 */ lis r3, 0x5649 /* 0x56494252@ha */
|
||||
/* 800456AC 38 03 42 52 */ addi r0, r3, 0x4252 /* 0x56494252@l */
|
||||
/* 800456B0 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 800456B4 41 82 00 E8 */ beq lbl_8004579C
|
||||
/* 800456B8 40 80 00 40 */ bge lbl_800456F8
|
||||
/* 800456BC 3C 60 4D 41 */ lis r3, 0x4D41 /* 0x4D415054@ha */
|
||||
/* 800456C0 38 03 50 54 */ addi r0, r3, 0x5054 /* 0x4D415054@l */
|
||||
/* 800456C4 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 800456C8 41 82 01 64 */ beq lbl_8004582C
|
||||
/* 800456CC 40 80 00 18 */ bge lbl_800456E4
|
||||
/* 800456D0 3C 60 46 41 */ lis r3, 0x4641 /* 0x46414445@ha */
|
||||
/* 800456D4 38 03 44 45 */ addi r0, r3, 0x4445 /* 0x46414445@l */
|
||||
/* 800456D8 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 800456DC 41 82 00 54 */ beq lbl_80045730
|
||||
/* 800456E0 48 00 01 74 */ b lbl_80045854
|
||||
lbl_800456E4:
|
||||
/* 800456E4 3C 60 4E 45 */ lis r3, 0x4E45 /* 0x4E455854@ha */
|
||||
/* 800456E8 38 03 58 54 */ addi r0, r3, 0x5854 /* 0x4E455854@l */
|
||||
/* 800456EC 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 800456F0 41 82 01 70 */ beq lbl_80045860
|
||||
/* 800456F4 48 00 01 60 */ b lbl_80045854
|
||||
lbl_800456F8:
|
||||
/* 800456F8 3C 60 57 49 */ lis r3, 0x5749 /* 0x57495045@ha */
|
||||
/* 800456FC 38 03 50 45 */ addi r0, r3, 0x5045 /* 0x57495045@l */
|
||||
/* 80045700 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045704 41 82 00 D8 */ beq lbl_800457DC
|
||||
/* 80045708 40 80 01 4C */ bge lbl_80045854
|
||||
/* 8004570C 3C 60 57 41 */ lis r3, 0x5741 /* 0x57414954@ha */
|
||||
/* 80045710 38 03 49 54 */ addi r0, r3, 0x4954 /* 0x57414954@l */
|
||||
/* 80045714 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045718 41 82 00 08 */ beq lbl_80045720
|
||||
/* 8004571C 48 00 01 38 */ b lbl_80045854
|
||||
lbl_80045720:
|
||||
/* 80045720 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80045724 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045728 4B FF E9 15 */ bl specialProc_WaitProc__12dEvDtStaff_cFi
|
||||
/* 8004572C 48 00 01 34 */ b lbl_80045860
|
||||
lbl_80045730:
|
||||
/* 80045730 88 0D 86 66 */ lbz r0, mBlureFlag__13mDoGph_gInf_c+0x2(r13)
|
||||
/* 80045734 28 00 00 00 */ cmplwi r0, 0
|
||||
/* 80045738 40 82 00 14 */ bne lbl_8004574C
|
||||
/* 8004573C 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045740 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045744 48 00 2A 39 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80045748 48 00 01 18 */ b lbl_80045860
|
||||
lbl_8004574C:
|
||||
/* 8004574C C0 2D 86 5C */ lfs f1, mFadeRate__13mDoGph_gInf_c(r13)
|
||||
/* 80045750 C0 02 84 F0 */ lfs f0, lit_4668(r2)
|
||||
/* 80045754 FC 01 00 40 */ fcmpo cr0, f1, f0
|
||||
/* 80045758 4C 41 13 82 */ cror 2, 1, 2
|
||||
/* 8004575C 40 82 01 04 */ bne lbl_80045860
|
||||
/* 80045760 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045764 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045768 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 8004576C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045770 38 A5 01 0A */ addi r5, r5, 0x10a
|
||||
/* 80045774 38 C0 00 00 */ li r6, 0
|
||||
/* 80045778 48 00 29 75 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 8004577C C0 23 00 00 */ lfs f1, 0(r3)
|
||||
/* 80045780 C0 02 84 D0 */ lfs f0, lit_4264(r2)
|
||||
/* 80045784 FC 01 00 40 */ fcmpo cr0, f1, f0
|
||||
/* 80045788 40 81 00 D8 */ ble lbl_80045860
|
||||
/* 8004578C 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045790 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045794 48 00 29 E9 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80045798 48 00 00 C8 */ b lbl_80045860
|
||||
lbl_8004579C:
|
||||
/* 8004579C A8 7D 00 44 */ lha r3, 0x44(r29)
|
||||
/* 800457A0 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 800457A4 40 81 00 28 */ ble lbl_800457CC
|
||||
/* 800457A8 38 03 FF FF */ addi r0, r3, -1
|
||||
/* 800457AC B0 1D 00 44 */ sth r0, 0x44(r29)
|
||||
/* 800457B0 A8 1D 00 44 */ lha r0, 0x44(r29)
|
||||
/* 800457B4 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 800457B8 40 82 00 A8 */ bne lbl_80045860
|
||||
/* 800457BC 38 7B 5B D4 */ addi r3, r27, 0x5bd4
|
||||
/* 800457C0 38 80 00 1F */ li r4, 0x1f
|
||||
/* 800457C4 48 02 A5 D1 */ bl StopQuake__12dVibration_cFi
|
||||
/* 800457C8 48 00 00 98 */ b lbl_80045860
|
||||
lbl_800457CC:
|
||||
/* 800457CC 7F C3 F3 78 */ mr r3, r30
|
||||
/* 800457D0 7F E4 FB 78 */ mr r4, r31
|
||||
/* 800457D4 48 00 29 A9 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 800457D8 48 00 00 88 */ b lbl_80045860
|
||||
lbl_800457DC:
|
||||
/* 800457DC A8 1D 00 42 */ lha r0, 0x42(r29)
|
||||
/* 800457E0 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 800457E4 41 82 00 24 */ beq lbl_80045808
|
||||
/* 800457E8 C0 22 84 D0 */ lfs f1, lit_4264(r2)
|
||||
/* 800457EC C0 0D 89 54 */ lfs f0, mWipeRate__12dDlst_list_c(r13)
|
||||
/* 800457F0 FC 01 00 00 */ fcmpu cr0, f1, f0
|
||||
/* 800457F4 40 82 00 6C */ bne lbl_80045860
|
||||
/* 800457F8 7F C3 F3 78 */ mr r3, r30
|
||||
/* 800457FC 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045800 48 00 29 7D */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80045804 48 00 00 5C */ b lbl_80045860
|
||||
lbl_80045808:
|
||||
/* 80045808 C0 2D 89 54 */ lfs f1, mWipeRate__12dDlst_list_c(r13)
|
||||
/* 8004580C C0 02 84 F0 */ lfs f0, lit_4668(r2)
|
||||
/* 80045810 FC 01 00 40 */ fcmpo cr0, f1, f0
|
||||
/* 80045814 4C 41 13 82 */ cror 2, 1, 2
|
||||
/* 80045818 40 82 00 48 */ bne lbl_80045860
|
||||
/* 8004581C 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045820 7F E4 FB 78 */ mr r4, r31
|
||||
/* 80045824 48 00 29 59 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80045828 48 00 00 38 */ b lbl_80045860
|
||||
lbl_8004582C:
|
||||
/* 8004582C A8 7D 00 44 */ lha r3, 0x44(r29)
|
||||
/* 80045830 38 03 FF FF */ addi r0, r3, -1
|
||||
/* 80045834 B0 1D 00 44 */ sth r0, 0x44(r29)
|
||||
/* 80045838 A8 1D 00 44 */ lha r0, 0x44(r29)
|
||||
/* 8004583C 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 80045840 41 81 00 20 */ bgt lbl_80045860
|
||||
/* 80045844 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045848 7F E4 FB 78 */ mr r4, r31
|
||||
/* 8004584C 48 00 29 31 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80045850 48 00 00 10 */ b lbl_80045860
|
||||
lbl_80045854:
|
||||
/* 80045854 7F C3 F3 78 */ mr r3, r30
|
||||
/* 80045858 7F E4 FB 78 */ mr r4, r31
|
||||
/* 8004585C 48 00 29 21 */ bl cutEnd__16dEvent_manager_cFi
|
||||
lbl_80045860:
|
||||
/* 80045860 39 61 00 40 */ addi r11, r1, 0x40
|
||||
/* 80045864 48 31 C9 B1 */ bl _restgpr_24
|
||||
/* 80045868 80 01 00 44 */ lwz r0, 0x44(r1)
|
||||
/* 8004586C 7C 08 03 A6 */ mtlr r0
|
||||
/* 80045870 38 21 00 40 */ addi r1, r1, 0x40
|
||||
/* 80045874 4E 80 00 20 */ blr
|
||||
|
|
@ -1,320 +0,0 @@
|
|||
lbl_80045C34:
|
||||
/* 80045C34 94 21 FF 90 */ stwu r1, -0x70(r1)
|
||||
/* 80045C38 7C 08 02 A6 */ mflr r0
|
||||
/* 80045C3C 90 01 00 74 */ stw r0, 0x74(r1)
|
||||
/* 80045C40 DB E1 00 60 */ stfd f31, 0x60(r1)
|
||||
/* 80045C44 F3 E1 00 68 */ psq_st f31, 104(r1), 0, 0 /* qr0 */
|
||||
/* 80045C48 DB C1 00 50 */ stfd f30, 0x50(r1)
|
||||
/* 80045C4C F3 C1 00 58 */ psq_st f30, 88(r1), 0, 0 /* qr0 */
|
||||
/* 80045C50 39 61 00 50 */ addi r11, r1, 0x50
|
||||
/* 80045C54 48 31 C5 75 */ bl _savegpr_24
|
||||
/* 80045C58 7C 7B 1B 78 */ mr r27, r3
|
||||
/* 80045C5C 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 80045C60 3B C3 61 C0 */ addi r30, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80045C64 3B 9E 4F F8 */ addi r28, r30, 0x4ff8
|
||||
/* 80045C68 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045C6C 3C 80 80 38 */ lis r4, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045C70 38 84 9D D0 */ addi r4, r4, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045C74 38 84 01 5E */ addi r4, r4, 0x15e
|
||||
/* 80045C78 38 A0 00 00 */ li r5, 0
|
||||
/* 80045C7C 38 C0 00 00 */ li r6, 0
|
||||
/* 80045C80 48 00 1E 9D */ bl getMyStaffId__16dEvent_manager_cFPCcP10fopAc_ac_ci
|
||||
/* 80045C84 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 80045C88 2C 1D FF FF */ cmpwi r29, -1
|
||||
/* 80045C8C 41 82 03 F4 */ beq lbl_80046080
|
||||
/* 80045C90 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045C94 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045C98 48 00 22 C5 */ bl getMyNowCutName__16dEvent_manager_cFi
|
||||
/* 80045C9C 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 80045CA0 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045CA4 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045CA8 48 00 20 A5 */ bl getIsAddvance__16dEvent_manager_cFi
|
||||
/* 80045CAC 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80045CB0 41 82 03 10 */ beq lbl_80045FC0
|
||||
/* 80045CB4 38 00 00 00 */ li r0, 0
|
||||
/* 80045CB8 90 1B 00 4A */ stw r0, 0x4a(r27)
|
||||
/* 80045CBC 80 9F 00 00 */ lwz r4, 0(r31)
|
||||
/* 80045CC0 3C 60 53 48 */ lis r3, 0x5348 /* 0x53484F43@ha */
|
||||
/* 80045CC4 38 03 4F 43 */ addi r0, r3, 0x4F43 /* 0x53484F43@l */
|
||||
/* 80045CC8 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045CCC 41 82 00 7C */ beq lbl_80045D48
|
||||
/* 80045CD0 40 80 00 2C */ bge lbl_80045CFC
|
||||
/* 80045CD4 3C 60 51 55 */ lis r3, 0x5155 /* 0x5155414B@ha */
|
||||
/* 80045CD8 38 03 41 4B */ addi r0, r3, 0x414B /* 0x5155414B@l */
|
||||
/* 80045CDC 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045CE0 41 82 00 F0 */ beq lbl_80045DD0
|
||||
/* 80045CE4 40 80 02 DC */ bge lbl_80045FC0
|
||||
/* 80045CE8 3C 60 42 4C */ lis r3, 0x424C /* 0x424C5552@ha */
|
||||
/* 80045CEC 38 03 55 52 */ addi r0, r3, 0x5552 /* 0x424C5552@l */
|
||||
/* 80045CF0 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045CF4 41 82 02 1C */ beq lbl_80045F10
|
||||
/* 80045CF8 48 00 02 C8 */ b lbl_80045FC0
|
||||
lbl_80045CFC:
|
||||
/* 80045CFC 3C 60 57 41 */ lis r3, 0x5741 /* 0x57414954@ha */
|
||||
/* 80045D00 38 03 49 54 */ addi r0, r3, 0x4954 /* 0x57414954@l */
|
||||
/* 80045D04 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045D08 41 82 00 08 */ beq lbl_80045D10
|
||||
/* 80045D0C 48 00 02 B4 */ b lbl_80045FC0
|
||||
lbl_80045D10:
|
||||
/* 80045D10 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045D14 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045D18 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045D1C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045D20 38 A5 00 3D */ addi r5, r5, 0x3d
|
||||
/* 80045D24 38 C0 00 03 */ li r6, 3
|
||||
/* 80045D28 48 00 23 C5 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045D2C 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045D30 41 82 00 0C */ beq lbl_80045D3C
|
||||
/* 80045D34 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80045D38 48 00 00 08 */ b lbl_80045D40
|
||||
lbl_80045D3C:
|
||||
/* 80045D3C 38 00 00 00 */ li r0, 0
|
||||
lbl_80045D40:
|
||||
/* 80045D40 90 1B 00 4A */ stw r0, 0x4a(r27)
|
||||
/* 80045D44 48 00 02 7C */ b lbl_80045FC0
|
||||
lbl_80045D48:
|
||||
/* 80045D48 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045D4C 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045D50 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045D54 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045D58 38 A5 01 65 */ addi r5, r5, 0x165
|
||||
/* 80045D5C 38 C0 00 03 */ li r6, 3
|
||||
/* 80045D60 48 00 23 8D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045D64 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045D68 41 82 00 0C */ beq lbl_80045D74
|
||||
/* 80045D6C 83 43 00 00 */ lwz r26, 0(r3)
|
||||
/* 80045D70 48 00 00 08 */ b lbl_80045D78
|
||||
lbl_80045D74:
|
||||
/* 80045D74 3B 40 00 05 */ li r26, 5
|
||||
lbl_80045D78:
|
||||
/* 80045D78 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045D7C 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045D80 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045D84 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045D88 38 A5 00 62 */ addi r5, r5, 0x62
|
||||
/* 80045D8C 38 C0 00 03 */ li r6, 3
|
||||
/* 80045D90 48 00 23 5D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045D94 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045D98 41 82 00 0C */ beq lbl_80045DA4
|
||||
/* 80045D9C 80 A3 00 00 */ lwz r5, 0(r3)
|
||||
/* 80045DA0 48 00 00 08 */ b lbl_80045DA8
|
||||
lbl_80045DA4:
|
||||
/* 80045DA4 38 A0 00 0F */ li r5, 0xf
|
||||
lbl_80045DA8:
|
||||
/* 80045DA8 C0 22 84 D0 */ lfs f1, lit_4264(r2)
|
||||
/* 80045DAC D0 21 00 20 */ stfs f1, 0x20(r1)
|
||||
/* 80045DB0 C0 02 84 F0 */ lfs f0, lit_4668(r2)
|
||||
/* 80045DB4 D0 01 00 24 */ stfs f0, 0x24(r1)
|
||||
/* 80045DB8 D0 21 00 28 */ stfs f1, 0x28(r1)
|
||||
/* 80045DBC 38 7E 5B D4 */ addi r3, r30, 0x5bd4
|
||||
/* 80045DC0 7F 44 D3 78 */ mr r4, r26
|
||||
/* 80045DC4 38 C1 00 20 */ addi r6, r1, 0x20
|
||||
/* 80045DC8 48 02 9C 5D */ bl StartShock__12dVibration_cFii4cXyz
|
||||
/* 80045DCC 48 00 01 F4 */ b lbl_80045FC0
|
||||
lbl_80045DD0:
|
||||
/* 80045DD0 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045DD4 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045DD8 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045DDC 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045DE0 38 A5 00 3D */ addi r5, r5, 0x3d
|
||||
/* 80045DE4 38 C0 00 03 */ li r6, 3
|
||||
/* 80045DE8 48 00 23 05 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045DEC 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045DF0 41 82 00 0C */ beq lbl_80045DFC
|
||||
/* 80045DF4 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80045DF8 48 00 00 08 */ b lbl_80045E00
|
||||
lbl_80045DFC:
|
||||
/* 80045DFC 38 00 00 1E */ li r0, 0x1e
|
||||
lbl_80045E00:
|
||||
/* 80045E00 90 1B 00 4A */ stw r0, 0x4a(r27)
|
||||
/* 80045E04 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045E08 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045E0C 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045E10 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045E14 38 A5 01 65 */ addi r5, r5, 0x165
|
||||
/* 80045E18 38 C0 00 03 */ li r6, 3
|
||||
/* 80045E1C 48 00 22 D1 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045E20 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045E24 41 82 00 0C */ beq lbl_80045E30
|
||||
/* 80045E28 83 43 00 00 */ lwz r26, 0(r3)
|
||||
/* 80045E2C 48 00 00 08 */ b lbl_80045E34
|
||||
lbl_80045E30:
|
||||
/* 80045E30 3B 40 00 05 */ li r26, 5
|
||||
lbl_80045E34:
|
||||
/* 80045E34 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045E38 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045E3C 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045E40 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045E44 38 A5 00 62 */ addi r5, r5, 0x62
|
||||
/* 80045E48 38 C0 00 03 */ li r6, 3
|
||||
/* 80045E4C 48 00 22 A1 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045E50 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045E54 41 82 00 0C */ beq lbl_80045E60
|
||||
/* 80045E58 83 23 00 00 */ lwz r25, 0(r3)
|
||||
/* 80045E5C 48 00 00 08 */ b lbl_80045E64
|
||||
lbl_80045E60:
|
||||
/* 80045E60 3B 20 00 0F */ li r25, 0xf
|
||||
lbl_80045E64:
|
||||
/* 80045E64 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045E68 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045E6C 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045E70 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045E74 38 A5 01 15 */ addi r5, r5, 0x115
|
||||
/* 80045E78 38 C0 00 04 */ li r6, 4
|
||||
/* 80045E7C 48 00 22 71 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045E80 7C 78 1B 79 */ or. r24, r3, r3
|
||||
/* 80045E84 41 82 00 60 */ beq lbl_80045EE4
|
||||
/* 80045E88 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045E8C 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045E90 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045E94 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045E98 38 A5 01 6B */ addi r5, r5, 0x16b
|
||||
/* 80045E9C 38 C0 00 03 */ li r6, 3
|
||||
/* 80045EA0 48 00 22 4D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045EA4 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045EA8 41 82 00 0C */ beq lbl_80045EB4
|
||||
/* 80045EAC 80 A3 00 00 */ lwz r5, 0(r3)
|
||||
/* 80045EB0 48 00 00 08 */ b lbl_80045EB8
|
||||
lbl_80045EB4:
|
||||
/* 80045EB4 38 A0 00 00 */ li r5, 0
|
||||
lbl_80045EB8:
|
||||
/* 80045EB8 C0 22 84 D0 */ lfs f1, lit_4264(r2)
|
||||
/* 80045EBC D0 21 00 14 */ stfs f1, 0x14(r1)
|
||||
/* 80045EC0 C0 02 84 F0 */ lfs f0, lit_4668(r2)
|
||||
/* 80045EC4 D0 01 00 18 */ stfs f0, 0x18(r1)
|
||||
/* 80045EC8 D0 21 00 1C */ stfs f1, 0x1c(r1)
|
||||
/* 80045ECC 38 7E 5B D4 */ addi r3, r30, 0x5bd4
|
||||
/* 80045ED0 7F 04 C3 78 */ mr r4, r24
|
||||
/* 80045ED4 7F 26 CB 78 */ mr r6, r25
|
||||
/* 80045ED8 38 E1 00 14 */ addi r7, r1, 0x14
|
||||
/* 80045EDC 48 02 9D 31 */ bl StartQuake__12dVibration_cFPCUcii4cXyz
|
||||
/* 80045EE0 48 00 00 E0 */ b lbl_80045FC0
|
||||
lbl_80045EE4:
|
||||
/* 80045EE4 C0 22 84 D0 */ lfs f1, lit_4264(r2)
|
||||
/* 80045EE8 D0 21 00 08 */ stfs f1, 8(r1)
|
||||
/* 80045EEC C0 02 84 F0 */ lfs f0, lit_4668(r2)
|
||||
/* 80045EF0 D0 01 00 0C */ stfs f0, 0xc(r1)
|
||||
/* 80045EF4 D0 21 00 10 */ stfs f1, 0x10(r1)
|
||||
/* 80045EF8 38 7E 5B D4 */ addi r3, r30, 0x5bd4
|
||||
/* 80045EFC 7F 44 D3 78 */ mr r4, r26
|
||||
/* 80045F00 7F 25 CB 78 */ mr r5, r25
|
||||
/* 80045F04 38 C1 00 08 */ addi r6, r1, 8
|
||||
/* 80045F08 48 02 9C 09 */ bl StartQuake__12dVibration_cFii4cXyz
|
||||
/* 80045F0C 48 00 00 B4 */ b lbl_80045FC0
|
||||
lbl_80045F10:
|
||||
/* 80045F10 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045F14 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045F18 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045F1C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045F20 38 A5 00 3D */ addi r5, r5, 0x3d
|
||||
/* 80045F24 38 C0 00 03 */ li r6, 3
|
||||
/* 80045F28 48 00 21 C5 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045F2C 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045F30 41 82 00 0C */ beq lbl_80045F3C
|
||||
/* 80045F34 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80045F38 48 00 00 08 */ b lbl_80045F40
|
||||
lbl_80045F3C:
|
||||
/* 80045F3C 38 00 00 1E */ li r0, 0x1e
|
||||
lbl_80045F40:
|
||||
/* 80045F40 90 1B 00 4A */ stw r0, 0x4a(r27)
|
||||
/* 80045F44 7C 18 03 78 */ mr r24, r0
|
||||
/* 80045F48 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045F4C 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045F50 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045F54 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045F58 38 A5 01 72 */ addi r5, r5, 0x172
|
||||
/* 80045F5C 38 C0 00 00 */ li r6, 0
|
||||
/* 80045F60 48 00 21 8D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045F64 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045F68 41 82 00 0C */ beq lbl_80045F74
|
||||
/* 80045F6C C3 E3 00 00 */ lfs f31, 0(r3)
|
||||
/* 80045F70 48 00 00 08 */ b lbl_80045F78
|
||||
lbl_80045F74:
|
||||
/* 80045F74 C3 E2 84 FC */ lfs f31, lit_5200(r2)
|
||||
lbl_80045F78:
|
||||
/* 80045F78 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045F7C 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045F80 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045F84 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045F88 38 A5 01 78 */ addi r5, r5, 0x178
|
||||
/* 80045F8C 38 C0 00 00 */ li r6, 0
|
||||
/* 80045F90 48 00 21 5D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045F94 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045F98 41 82 00 0C */ beq lbl_80045FA4
|
||||
/* 80045F9C C3 C3 00 00 */ lfs f30, 0(r3)
|
||||
/* 80045FA0 48 00 00 08 */ b lbl_80045FA8
|
||||
lbl_80045FA4:
|
||||
/* 80045FA4 C3 C2 84 F0 */ lfs f30, lit_4668(r2)
|
||||
lbl_80045FA8:
|
||||
/* 80045FA8 48 13 B6 99 */ bl dCam_getBody__Fv
|
||||
/* 80045FAC 7F 04 C3 78 */ mr r4, r24
|
||||
/* 80045FB0 38 A0 00 00 */ li r5, 0
|
||||
/* 80045FB4 FC 20 F8 90 */ fmr f1, f31
|
||||
/* 80045FB8 FC 40 F0 90 */ fmr f2, f30
|
||||
/* 80045FBC 48 13 B1 B5 */ bl StartBlure__9dCamera_cFiP10fopAc_ac_cff
|
||||
lbl_80045FC0:
|
||||
/* 80045FC0 80 7B 00 4A */ lwz r3, 0x4a(r27)
|
||||
/* 80045FC4 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80045FC8 41 82 00 0C */ beq lbl_80045FD4
|
||||
/* 80045FCC 38 03 FF FF */ addi r0, r3, -1
|
||||
/* 80045FD0 90 1B 00 4A */ stw r0, 0x4a(r27)
|
||||
lbl_80045FD4:
|
||||
/* 80045FD4 80 9F 00 00 */ lwz r4, 0(r31)
|
||||
/* 80045FD8 3C 60 51 55 */ lis r3, 0x5155 /* 0x5155414B@ha */
|
||||
/* 80045FDC 38 03 41 4B */ addi r0, r3, 0x414B /* 0x5155414B@l */
|
||||
/* 80045FE0 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045FE4 41 82 00 4C */ beq lbl_80046030
|
||||
/* 80045FE8 40 80 00 18 */ bge lbl_80046000
|
||||
/* 80045FEC 3C 60 42 4C */ lis r3, 0x424C /* 0x424C5552@ha */
|
||||
/* 80045FF0 38 03 55 52 */ addi r0, r3, 0x5552 /* 0x424C5552@l */
|
||||
/* 80045FF4 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045FF8 41 82 00 60 */ beq lbl_80046058
|
||||
/* 80045FFC 48 00 00 78 */ b lbl_80046074
|
||||
lbl_80046000:
|
||||
/* 80046000 3C 60 57 41 */ lis r3, 0x5741 /* 0x57414954@ha */
|
||||
/* 80046004 38 03 49 54 */ addi r0, r3, 0x4954 /* 0x57414954@l */
|
||||
/* 80046008 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 8004600C 41 82 00 08 */ beq lbl_80046014
|
||||
/* 80046010 48 00 00 64 */ b lbl_80046074
|
||||
lbl_80046014:
|
||||
/* 80046014 80 1B 00 4A */ lwz r0, 0x4a(r27)
|
||||
/* 80046018 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 8004601C 40 82 00 64 */ bne lbl_80046080
|
||||
/* 80046020 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80046024 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80046028 48 00 21 55 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 8004602C 48 00 00 54 */ b lbl_80046080
|
||||
lbl_80046030:
|
||||
/* 80046030 80 1B 00 4A */ lwz r0, 0x4a(r27)
|
||||
/* 80046034 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 80046038 40 82 00 48 */ bne lbl_80046080
|
||||
/* 8004603C 38 7E 5B D4 */ addi r3, r30, 0x5bd4
|
||||
/* 80046040 38 80 00 1F */ li r4, 0x1f
|
||||
/* 80046044 48 02 9D 51 */ bl StopQuake__12dVibration_cFi
|
||||
/* 80046048 7F 83 E3 78 */ mr r3, r28
|
||||
/* 8004604C 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80046050 48 00 21 2D */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80046054 48 00 00 2C */ b lbl_80046080
|
||||
lbl_80046058:
|
||||
/* 80046058 80 1B 00 4A */ lwz r0, 0x4a(r27)
|
||||
/* 8004605C 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 80046060 40 82 00 20 */ bne lbl_80046080
|
||||
/* 80046064 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80046068 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8004606C 48 00 21 11 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80046070 48 00 00 10 */ b lbl_80046080
|
||||
lbl_80046074:
|
||||
/* 80046074 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80046078 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8004607C 48 00 21 01 */ bl cutEnd__16dEvent_manager_cFi
|
||||
lbl_80046080:
|
||||
/* 80046080 E3 E1 00 68 */ psq_l f31, 104(r1), 0, 0 /* qr0 */
|
||||
/* 80046084 CB E1 00 60 */ lfd f31, 0x60(r1)
|
||||
/* 80046088 E3 C1 00 58 */ psq_l f30, 88(r1), 0, 0 /* qr0 */
|
||||
/* 8004608C CB C1 00 50 */ lfd f30, 0x50(r1)
|
||||
/* 80046090 39 61 00 50 */ addi r11, r1, 0x50
|
||||
/* 80046094 48 31 C1 81 */ bl _restgpr_24
|
||||
/* 80046098 80 01 00 74 */ lwz r0, 0x74(r1)
|
||||
/* 8004609C 7C 08 03 A6 */ mtlr r0
|
||||
/* 800460A0 38 21 00 70 */ addi r1, r1, 0x70
|
||||
/* 800460A4 4E 80 00 20 */ blr
|
||||
|
|
@ -1,110 +0,0 @@
|
|||
lbl_80044190:
|
||||
/* 80044190 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 80044194 7C 08 02 A6 */ mflr r0
|
||||
/* 80044198 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 8004419C 39 61 00 20 */ addi r11, r1, 0x20
|
||||
/* 800441A0 48 31 E0 3D */ bl _savegpr_29
|
||||
/* 800441A4 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 800441A8 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 800441AC 3B E3 4F F8 */ addi r31, r3, 0x4ff8
|
||||
/* 800441B0 7F E3 FB 78 */ mr r3, r31
|
||||
/* 800441B4 3C 80 80 38 */ lis r4, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800441B8 38 84 9D D0 */ addi r4, r4, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800441BC 38 84 00 43 */ addi r4, r4, 0x43
|
||||
/* 800441C0 38 A0 00 00 */ li r5, 0
|
||||
/* 800441C4 38 C0 00 00 */ li r6, 0
|
||||
/* 800441C8 48 00 39 55 */ bl getMyStaffId__16dEvent_manager_cFPCcP10fopAc_ac_ci
|
||||
/* 800441CC 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 800441D0 2C 1D FF FF */ cmpwi r29, -1
|
||||
/* 800441D4 41 82 01 38 */ beq lbl_8004430C
|
||||
/* 800441D8 7F E3 FB 78 */ mr r3, r31
|
||||
/* 800441DC 7F A4 EB 78 */ mr r4, r29
|
||||
/* 800441E0 48 00 3D 7D */ bl getMyNowCutName__16dEvent_manager_cFi
|
||||
/* 800441E4 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 800441E8 7F E3 FB 78 */ mr r3, r31
|
||||
/* 800441EC 7F A4 EB 78 */ mr r4, r29
|
||||
/* 800441F0 48 00 3B 5D */ bl getIsAddvance__16dEvent_manager_cFi
|
||||
/* 800441F4 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 800441F8 41 82 01 08 */ beq lbl_80044300
|
||||
/* 800441FC 80 9E 00 00 */ lwz r4, 0(r30)
|
||||
/* 80044200 3C 60 43 48 */ lis r3, 0x4348 /* 0x4348414E@ha */
|
||||
/* 80044204 38 03 41 4E */ addi r0, r3, 0x414E /* 0x4348414E@l */
|
||||
/* 80044208 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 8004420C 41 82 00 1C */ beq lbl_80044228
|
||||
/* 80044210 40 80 00 F0 */ bge lbl_80044300
|
||||
/* 80044214 3C 60 41 44 */ lis r3, 0x4144 /* 0x4144445F@ha */
|
||||
/* 80044218 38 03 44 5F */ addi r0, r3, 0x445F /* 0x4144445F@l */
|
||||
/* 8004421C 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044220 41 82 00 78 */ beq lbl_80044298
|
||||
/* 80044224 48 00 00 DC */ b lbl_80044300
|
||||
lbl_80044228:
|
||||
/* 80044228 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8004422C 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80044230 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044234 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044238 38 A5 00 30 */ addi r5, r5, 0x30
|
||||
/* 8004423C 38 C0 00 00 */ li r6, 0
|
||||
/* 80044240 48 00 3E AD */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044244 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80044248 41 82 00 14 */ beq lbl_8004425C
|
||||
/* 8004424C C0 22 84 D4 */ lfs f1, lit_4265(r2)
|
||||
/* 80044250 C0 03 00 00 */ lfs f0, 0(r3)
|
||||
/* 80044254 EC 21 00 32 */ fmuls f1, f1, f0
|
||||
/* 80044258 48 16 49 11 */ bl dKy_instant_timechg__Ff
|
||||
lbl_8004425C:
|
||||
/* 8004425C 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80044260 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80044264 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044268 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 8004426C 38 A5 00 49 */ addi r5, r5, 0x49
|
||||
/* 80044270 38 C0 00 03 */ li r6, 3
|
||||
/* 80044274 48 00 3E 79 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044278 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 8004427C 41 82 00 84 */ beq lbl_80044300
|
||||
/* 80044280 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80044284 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 80044288 41 82 00 08 */ beq lbl_80044290
|
||||
/* 8004428C 48 00 00 74 */ b lbl_80044300
|
||||
lbl_80044290:
|
||||
/* 80044290 48 16 49 39 */ bl dKy_instant_rainchg__Fv
|
||||
/* 80044294 48 00 00 6C */ b lbl_80044300
|
||||
lbl_80044298:
|
||||
/* 80044298 7F E3 FB 78 */ mr r3, r31
|
||||
/* 8004429C 7F A4 EB 78 */ mr r4, r29
|
||||
/* 800442A0 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800442A4 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800442A8 38 A5 00 30 */ addi r5, r5, 0x30
|
||||
/* 800442AC 38 C0 00 00 */ li r6, 0
|
||||
/* 800442B0 48 00 3E 3D */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800442B4 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 800442B8 41 82 00 48 */ beq lbl_80044300
|
||||
/* 800442BC 3C 80 80 40 */ lis r4, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 800442C0 38 84 61 C0 */ addi r4, r4, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 800442C4 C0 24 00 34 */ lfs f1, 0x34(r4)
|
||||
/* 800442C8 C0 02 84 E0 */ lfs f0, lit_4460(r2)
|
||||
/* 800442CC EC 20 00 72 */ fmuls f1, f0, f1
|
||||
/* 800442D0 C0 03 00 00 */ lfs f0, 0(r3)
|
||||
/* 800442D4 EC 21 00 2A */ fadds f1, f1, f0
|
||||
/* 800442D8 C8 02 84 E8 */ lfd f0, lit_4461(r2)
|
||||
/* 800442DC 48 00 00 0C */ b lbl_800442E8
|
||||
lbl_800442E0:
|
||||
/* 800442E0 FC 21 00 28 */ fsub f1, f1, f0
|
||||
/* 800442E4 FC 20 08 18 */ frsp f1, f1
|
||||
lbl_800442E8:
|
||||
/* 800442E8 FC 01 00 40 */ fcmpo cr0, f1, f0
|
||||
/* 800442EC 4C 41 13 82 */ cror 2, 1, 2
|
||||
/* 800442F0 41 82 FF F0 */ beq lbl_800442E0
|
||||
/* 800442F4 C0 02 84 D4 */ lfs f0, lit_4265(r2)
|
||||
/* 800442F8 EC 20 00 72 */ fmuls f1, f0, f1
|
||||
/* 800442FC 48 16 48 6D */ bl dKy_instant_timechg__Ff
|
||||
lbl_80044300:
|
||||
/* 80044300 7F E3 FB 78 */ mr r3, r31
|
||||
/* 80044304 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80044308 48 00 3E 75 */ bl cutEnd__16dEvent_manager_cFi
|
||||
lbl_8004430C:
|
||||
/* 8004430C 39 61 00 20 */ addi r11, r1, 0x20
|
||||
/* 80044310 48 31 DF 19 */ bl _restgpr_29
|
||||
/* 80044314 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 80044318 7C 08 03 A6 */ mtlr r0
|
||||
/* 8004431C 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 80044320 4E 80 00 20 */ blr
|
||||
|
|
@ -1,174 +0,0 @@
|
|||
lbl_80045878:
|
||||
/* 80045878 94 21 FF C0 */ stwu r1, -0x40(r1)
|
||||
/* 8004587C 7C 08 02 A6 */ mflr r0
|
||||
/* 80045880 90 01 00 44 */ stw r0, 0x44(r1)
|
||||
/* 80045884 DB E1 00 30 */ stfd f31, 0x30(r1)
|
||||
/* 80045888 F3 E1 00 38 */ psq_st f31, 56(r1), 0, 0 /* qr0 */
|
||||
/* 8004588C 39 61 00 30 */ addi r11, r1, 0x30
|
||||
/* 80045890 48 31 C9 3D */ bl _savegpr_25
|
||||
/* 80045894 7C 7B 1B 78 */ mr r27, r3
|
||||
/* 80045898 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 8004589C 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 800458A0 80 03 5D BC */ lwz r0, 0x5dbc(r3)
|
||||
/* 800458A4 28 00 00 00 */ cmplwi r0, 0
|
||||
/* 800458A8 41 82 00 08 */ beq lbl_800458B0
|
||||
/* 800458AC 48 1F 27 C1 */ bl demoMessageGroup__12dMsgObject_cFv
|
||||
lbl_800458B0:
|
||||
/* 800458B0 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 800458B4 3B C3 61 C0 */ addi r30, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 800458B8 3B 9E 4F F8 */ addi r28, r30, 0x4ff8
|
||||
/* 800458BC 7F 83 E3 78 */ mr r3, r28
|
||||
/* 800458C0 3C 80 80 38 */ lis r4, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800458C4 38 84 9D D0 */ addi r4, r4, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800458C8 38 84 01 2D */ addi r4, r4, 0x12d
|
||||
/* 800458CC 38 A0 00 00 */ li r5, 0
|
||||
/* 800458D0 38 C0 00 00 */ li r6, 0
|
||||
/* 800458D4 48 00 22 49 */ bl getMyStaffId__16dEvent_manager_cFPCcP10fopAc_ac_ci
|
||||
/* 800458D8 7C 7D 1B 78 */ mr r29, r3
|
||||
/* 800458DC 2C 1D FF FF */ cmpwi r29, -1
|
||||
/* 800458E0 41 82 01 FC */ beq lbl_80045ADC
|
||||
/* 800458E4 7F 83 E3 78 */ mr r3, r28
|
||||
/* 800458E8 7F A4 EB 78 */ mr r4, r29
|
||||
/* 800458EC 48 00 26 71 */ bl getMyNowCutName__16dEvent_manager_cFi
|
||||
/* 800458F0 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 800458F4 7F 83 E3 78 */ mr r3, r28
|
||||
/* 800458F8 7F A4 EB 78 */ mr r4, r29
|
||||
/* 800458FC 48 00 24 51 */ bl getIsAddvance__16dEvent_manager_cFi
|
||||
/* 80045900 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80045904 41 82 01 18 */ beq lbl_80045A1C
|
||||
/* 80045908 80 9F 00 00 */ lwz r4, 0(r31)
|
||||
/* 8004590C 3C 60 57 41 */ lis r3, 0x5741 /* 0x57414954@ha */
|
||||
/* 80045910 38 03 49 54 */ addi r0, r3, 0x4954 /* 0x57414954@l */
|
||||
/* 80045914 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045918 41 82 00 1C */ beq lbl_80045934
|
||||
/* 8004591C 40 80 01 00 */ bge lbl_80045A1C
|
||||
/* 80045920 3C 60 50 4C */ lis r3, 0x504C /* 0x504C4159@ha */
|
||||
/* 80045924 38 03 41 59 */ addi r0, r3, 0x4159 /* 0x504C4159@l */
|
||||
/* 80045928 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 8004592C 41 82 00 18 */ beq lbl_80045944
|
||||
/* 80045930 48 00 00 EC */ b lbl_80045A1C
|
||||
lbl_80045934:
|
||||
/* 80045934 7F 63 DB 78 */ mr r3, r27
|
||||
/* 80045938 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8004593C 4B FF E6 9D */ bl specialProc_WaitStart__12dEvDtStaff_cFi
|
||||
/* 80045940 48 00 00 DC */ b lbl_80045A1C
|
||||
lbl_80045944:
|
||||
/* 80045944 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045948 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8004594C 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045950 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045954 38 A5 01 35 */ addi r5, r5, 0x135
|
||||
/* 80045958 38 C0 00 04 */ li r6, 4
|
||||
/* 8004595C 48 00 27 91 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045960 7C 7A 1B 78 */ mr r26, r3
|
||||
/* 80045964 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045968 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8004596C 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045970 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045974 38 A5 01 3E */ addi r5, r5, 0x13e
|
||||
/* 80045978 38 C0 00 01 */ li r6, 1
|
||||
/* 8004597C 48 00 27 71 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80045980 7C 79 1B 78 */ mr r25, r3
|
||||
/* 80045984 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045988 7F A4 EB 78 */ mr r4, r29
|
||||
/* 8004598C 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80045990 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80045994 38 A5 01 48 */ addi r5, r5, 0x148
|
||||
/* 80045998 38 C0 00 00 */ li r6, 0
|
||||
/* 8004599C 48 00 27 51 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800459A0 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 800459A4 41 82 00 0C */ beq lbl_800459B0
|
||||
/* 800459A8 C3 E3 00 00 */ lfs f31, 0(r3)
|
||||
/* 800459AC 48 00 00 08 */ b lbl_800459B4
|
||||
lbl_800459B0:
|
||||
/* 800459B0 C3 E2 84 D0 */ lfs f31, lit_4264(r2)
|
||||
lbl_800459B4:
|
||||
/* 800459B4 38 7E 4E C8 */ addi r3, r30, 0x4ec8
|
||||
/* 800459B8 7F 44 D3 78 */ mr r4, r26
|
||||
/* 800459BC 4B FF D9 61 */ bl getStbDemoData__14dEvt_control_cFPc
|
||||
/* 800459C0 7F 24 CB 78 */ mr r4, r25
|
||||
/* 800459C4 FC 20 F8 90 */ fmr f1, f31
|
||||
/* 800459C8 4B FF 41 A5 */ bl start__7dDemo_cFPCUcP4cXyzf
|
||||
/* 800459CC C0 02 84 F8 */ lfs f0, lit_5057(r2)
|
||||
/* 800459D0 D0 1E 4F B8 */ stfs f0, 0x4fb8(r30)
|
||||
/* 800459D4 7F 83 E3 78 */ mr r3, r28
|
||||
/* 800459D8 7F A4 EB 78 */ mr r4, r29
|
||||
/* 800459DC 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 800459E0 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 800459E4 38 A5 00 A4 */ addi r5, r5, 0xa4
|
||||
/* 800459E8 38 C0 00 03 */ li r6, 3
|
||||
/* 800459EC 48 00 27 01 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 800459F0 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 800459F4 41 82 00 28 */ beq lbl_80045A1C
|
||||
/* 800459F8 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 800459FC 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80045A00 38 63 07 F0 */ addi r3, r3, 0x7f0
|
||||
/* 80045A04 80 04 00 00 */ lwz r0, 0(r4)
|
||||
/* 80045A08 54 00 08 3C */ slwi r0, r0, 1
|
||||
/* 80045A0C 3C 80 80 3A */ lis r4, saveBitLabels__16dSv_event_flag_c@ha /* 0x803A7288@ha */
|
||||
/* 80045A10 38 84 72 88 */ addi r4, r4, saveBitLabels__16dSv_event_flag_c@l /* 0x803A7288@l */
|
||||
/* 80045A14 7C 84 02 2E */ lhzx r4, r4, r0
|
||||
/* 80045A18 4B FE EF 75 */ bl onEventBit__11dSv_event_cFUs
|
||||
lbl_80045A1C:
|
||||
/* 80045A1C 80 9F 00 00 */ lwz r4, 0(r31)
|
||||
/* 80045A20 3C 60 57 41 */ lis r3, 0x5741 /* 0x57414954@ha */
|
||||
/* 80045A24 38 03 49 54 */ addi r0, r3, 0x4954 /* 0x57414954@l */
|
||||
/* 80045A28 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045A2C 41 82 00 1C */ beq lbl_80045A48
|
||||
/* 80045A30 40 80 00 A0 */ bge lbl_80045AD0
|
||||
/* 80045A34 3C 60 50 4C */ lis r3, 0x504C /* 0x504C4159@ha */
|
||||
/* 80045A38 38 03 41 59 */ addi r0, r3, 0x4159 /* 0x504C4159@l */
|
||||
/* 80045A3C 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80045A40 41 82 00 18 */ beq lbl_80045A58
|
||||
/* 80045A44 48 00 00 8C */ b lbl_80045AD0
|
||||
lbl_80045A48:
|
||||
/* 80045A48 7F 63 DB 78 */ mr r3, r27
|
||||
/* 80045A4C 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045A50 4B FF E5 ED */ bl specialProc_WaitProc__12dEvDtStaff_cFi
|
||||
/* 80045A54 48 00 00 88 */ b lbl_80045ADC
|
||||
lbl_80045A58:
|
||||
/* 80045A58 3B 3E 4E C8 */ addi r25, r30, 0x4ec8
|
||||
/* 80045A5C 80 0D 88 B8 */ lwz r0, m_mode__7dDemo_c(r13)
|
||||
/* 80045A60 2C 00 00 02 */ cmpwi r0, 2
|
||||
/* 80045A64 40 82 00 50 */ bne lbl_80045AB4
|
||||
/* 80045A68 7F 23 CB 78 */ mr r3, r25
|
||||
/* 80045A6C 4B FF D8 0D */ bl getStageEventDt__14dEvt_control_cFv
|
||||
/* 80045A70 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80045A74 41 82 00 3C */ beq lbl_80045AB0
|
||||
/* 80045A78 88 03 00 07 */ lbz r0, 7(r3)
|
||||
/* 80045A7C 28 00 00 FF */ cmplwi r0, 0xff
|
||||
/* 80045A80 41 82 00 30 */ beq lbl_80045AB0
|
||||
/* 80045A84 A0 19 00 DA */ lhz r0, 0xda(r25)
|
||||
/* 80045A88 54 00 07 FF */ clrlwi. r0, r0, 0x1f
|
||||
/* 80045A8C 40 82 00 24 */ bne lbl_80045AB0
|
||||
/* 80045A90 80 8D 88 84 */ lwz r4, m_control__7dDemo_c(r13)
|
||||
/* 80045A94 80 64 00 40 */ lwz r3, 0x40(r4)
|
||||
/* 80045A98 38 03 00 64 */ addi r0, r3, 0x64
|
||||
/* 80045A9C 90 04 00 40 */ stw r0, 0x40(r4)
|
||||
/* 80045AA0 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045AA4 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045AA8 48 00 26 D5 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80045AAC 48 00 00 08 */ b lbl_80045AB4
|
||||
lbl_80045AB0:
|
||||
/* 80045AB0 4B FF 42 49 */ bl end__7dDemo_cFv
|
||||
lbl_80045AB4:
|
||||
/* 80045AB4 80 0D 88 B8 */ lwz r0, m_mode__7dDemo_c(r13)
|
||||
/* 80045AB8 2C 00 00 00 */ cmpwi r0, 0
|
||||
/* 80045ABC 40 82 00 20 */ bne lbl_80045ADC
|
||||
/* 80045AC0 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045AC4 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045AC8 48 00 26 B5 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80045ACC 48 00 00 10 */ b lbl_80045ADC
|
||||
lbl_80045AD0:
|
||||
/* 80045AD0 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80045AD4 7F A4 EB 78 */ mr r4, r29
|
||||
/* 80045AD8 48 00 26 A5 */ bl cutEnd__16dEvent_manager_cFi
|
||||
lbl_80045ADC:
|
||||
/* 80045ADC E3 E1 00 38 */ psq_l f31, 56(r1), 0, 0 /* qr0 */
|
||||
/* 80045AE0 CB E1 00 30 */ lfd f31, 0x30(r1)
|
||||
/* 80045AE4 39 61 00 30 */ addi r11, r1, 0x30
|
||||
/* 80045AE8 48 31 C7 31 */ bl _restgpr_25
|
||||
/* 80045AEC 80 01 00 44 */ lwz r0, 0x44(r1)
|
||||
/* 80045AF0 7C 08 03 A6 */ mtlr r0
|
||||
/* 80045AF4 38 21 00 40 */ addi r1, r1, 0x40
|
||||
/* 80045AF8 4E 80 00 20 */ blr
|
||||
|
|
@ -1,165 +0,0 @@
|
|||
lbl_80044A58:
|
||||
/* 80044A58 94 21 FF E0 */ stwu r1, -0x20(r1)
|
||||
/* 80044A5C 7C 08 02 A6 */ mflr r0
|
||||
/* 80044A60 90 01 00 24 */ stw r0, 0x24(r1)
|
||||
/* 80044A64 39 61 00 20 */ addi r11, r1, 0x20
|
||||
/* 80044A68 48 31 D7 71 */ bl _savegpr_28
|
||||
/* 80044A6C 7C 7C 1B 78 */ mr r28, r3
|
||||
/* 80044A70 3C 60 80 40 */ lis r3, g_dComIfG_gameInfo@ha /* 0x804061C0@ha */
|
||||
/* 80044A74 38 63 61 C0 */ addi r3, r3, g_dComIfG_gameInfo@l /* 0x804061C0@l */
|
||||
/* 80044A78 3B A3 4F F8 */ addi r29, r3, 0x4ff8
|
||||
/* 80044A7C 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80044A80 3C 80 80 38 */ lis r4, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044A84 38 84 9D D0 */ addi r4, r4, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044A88 38 84 00 70 */ addi r4, r4, 0x70
|
||||
/* 80044A8C 38 A0 00 00 */ li r5, 0
|
||||
/* 80044A90 38 C0 00 00 */ li r6, 0
|
||||
/* 80044A94 48 00 30 89 */ bl getMyStaffId__16dEvent_manager_cFPCcP10fopAc_ac_ci
|
||||
/* 80044A98 7C 7E 1B 78 */ mr r30, r3
|
||||
/* 80044A9C 2C 1E FF FF */ cmpwi r30, -1
|
||||
/* 80044AA0 41 82 02 00 */ beq lbl_80044CA0
|
||||
/* 80044AA4 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80044AA8 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80044AAC 48 00 34 B1 */ bl getMyNowCutName__16dEvent_manager_cFi
|
||||
/* 80044AB0 7C 7F 1B 78 */ mr r31, r3
|
||||
/* 80044AB4 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80044AB8 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80044ABC 48 00 32 91 */ bl getIsAddvance__16dEvent_manager_cFi
|
||||
/* 80044AC0 2C 03 00 00 */ cmpwi r3, 0
|
||||
/* 80044AC4 41 82 01 74 */ beq lbl_80044C38
|
||||
/* 80044AC8 80 9F 00 00 */ lwz r4, 0(r31)
|
||||
/* 80044ACC 3C 60 52 49 */ lis r3, 0x5249 /* 0x52494444@ha */
|
||||
/* 80044AD0 38 03 44 44 */ addi r0, r3, 0x4444 /* 0x52494444@l */
|
||||
/* 80044AD4 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044AD8 41 82 00 88 */ beq lbl_80044B60
|
||||
/* 80044ADC 40 80 00 2C */ bge lbl_80044B08
|
||||
/* 80044AE0 3C 60 4E 4F */ lis r3, 0x4E4F /* 0x4E4F4D53@ha */
|
||||
/* 80044AE4 38 03 4D 53 */ addi r0, r3, 0x4D53 /* 0x4E4F4D53@l */
|
||||
/* 80044AE8 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044AEC 41 82 00 64 */ beq lbl_80044B50
|
||||
/* 80044AF0 40 80 01 48 */ bge lbl_80044C38
|
||||
/* 80044AF4 3C 60 42 47 */ lis r3, 0x4247 /* 0x42474D53@ha */
|
||||
/* 80044AF8 38 03 4D 53 */ addi r0, r3, 0x4D53 /* 0x42474D53@l */
|
||||
/* 80044AFC 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044B00 41 82 01 00 */ beq lbl_80044C00
|
||||
/* 80044B04 48 00 01 34 */ b lbl_80044C38
|
||||
lbl_80044B08:
|
||||
/* 80044B08 3C 60 57 41 */ lis r3, 0x5741 /* 0x57414954@ha */
|
||||
/* 80044B0C 38 03 49 54 */ addi r0, r3, 0x4954 /* 0x57414954@l */
|
||||
/* 80044B10 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044B14 41 82 00 1C */ beq lbl_80044B30
|
||||
/* 80044B18 40 80 01 20 */ bge lbl_80044C38
|
||||
/* 80044B1C 3C 60 53 54 */ lis r3, 0x5354 /* 0x5354524D@ha */
|
||||
/* 80044B20 38 03 52 4D */ addi r0, r3, 0x524D /* 0x5354524D@l */
|
||||
/* 80044B24 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044B28 41 82 00 18 */ beq lbl_80044B40
|
||||
/* 80044B2C 48 00 01 0C */ b lbl_80044C38
|
||||
lbl_80044B30:
|
||||
/* 80044B30 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80044B34 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80044B38 4B FF F4 A1 */ bl specialProc_WaitStart__12dEvDtStaff_cFi
|
||||
/* 80044B3C 48 00 00 FC */ b lbl_80044C38
|
||||
lbl_80044B40:
|
||||
/* 80044B40 80 6D 8D E8 */ lwz r3, mAudioMgrPtr__10Z2AudioMgr(r13)
|
||||
/* 80044B44 38 63 03 D0 */ addi r3, r3, 0x3d0
|
||||
/* 80044B48 48 26 B2 D1 */ bl bgmStreamPlay__8Z2SeqMgrFv
|
||||
/* 80044B4C 48 00 00 EC */ b lbl_80044C38
|
||||
lbl_80044B50:
|
||||
/* 80044B50 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80044B54 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80044B58 4B FF F4 81 */ bl specialProc_WaitStart__12dEvDtStaff_cFi
|
||||
/* 80044B5C 48 00 00 DC */ b lbl_80044C38
|
||||
lbl_80044B60:
|
||||
/* 80044B60 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80044B64 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80044B68 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044B6C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044B70 38 A5 00 62 */ addi r5, r5, 0x62
|
||||
/* 80044B74 38 C0 00 03 */ li r6, 3
|
||||
/* 80044B78 48 00 35 75 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044B7C 28 03 00 00 */ cmplwi r3, 0
|
||||
/* 80044B80 41 82 00 48 */ beq lbl_80044BC8
|
||||
/* 80044B84 80 03 00 00 */ lwz r0, 0(r3)
|
||||
/* 80044B88 2C 00 00 01 */ cmpwi r0, 1
|
||||
/* 80044B8C 40 82 00 3C */ bne lbl_80044BC8
|
||||
/* 80044B90 38 00 00 0C */ li r0, 0xc
|
||||
/* 80044B94 90 01 00 0C */ stw r0, 0xc(r1)
|
||||
/* 80044B98 80 6D 8D E8 */ lwz r3, mAudioMgrPtr__10Z2AudioMgr(r13)
|
||||
/* 80044B9C 38 81 00 0C */ addi r4, r1, 0xc
|
||||
/* 80044BA0 38 A0 00 00 */ li r5, 0
|
||||
/* 80044BA4 38 C0 00 00 */ li r6, 0
|
||||
/* 80044BA8 38 E0 00 00 */ li r7, 0
|
||||
/* 80044BAC C0 22 84 F0 */ lfs f1, lit_4668(r2)
|
||||
/* 80044BB0 FC 40 08 90 */ fmr f2, f1
|
||||
/* 80044BB4 C0 62 84 F4 */ lfs f3, lit_4669(r2)
|
||||
/* 80044BB8 FC 80 18 90 */ fmr f4, f3
|
||||
/* 80044BBC 39 00 00 00 */ li r8, 0
|
||||
/* 80044BC0 48 26 6D C5 */ bl seStart__7Z2SeMgrF10JAISoundIDPC3VecUlScffffUc
|
||||
/* 80044BC4 48 00 00 74 */ b lbl_80044C38
|
||||
lbl_80044BC8:
|
||||
/* 80044BC8 38 00 00 0D */ li r0, 0xd
|
||||
/* 80044BCC 90 01 00 08 */ stw r0, 8(r1)
|
||||
/* 80044BD0 80 6D 8D E8 */ lwz r3, mAudioMgrPtr__10Z2AudioMgr(r13)
|
||||
/* 80044BD4 38 81 00 08 */ addi r4, r1, 8
|
||||
/* 80044BD8 38 A0 00 00 */ li r5, 0
|
||||
/* 80044BDC 38 C0 00 00 */ li r6, 0
|
||||
/* 80044BE0 38 E0 00 00 */ li r7, 0
|
||||
/* 80044BE4 C0 22 84 F0 */ lfs f1, lit_4668(r2)
|
||||
/* 80044BE8 FC 40 08 90 */ fmr f2, f1
|
||||
/* 80044BEC C0 62 84 F4 */ lfs f3, lit_4669(r2)
|
||||
/* 80044BF0 FC 80 18 90 */ fmr f4, f3
|
||||
/* 80044BF4 39 00 00 00 */ li r8, 0
|
||||
/* 80044BF8 48 26 6D 8D */ bl seStart__7Z2SeMgrF10JAISoundIDPC3VecUlScffffUc
|
||||
/* 80044BFC 48 00 00 3C */ b lbl_80044C38
|
||||
lbl_80044C00:
|
||||
/* 80044C00 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80044C04 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80044C08 3C A0 80 38 */ lis r5, d_event_d_event_data__stringBase0@ha /* 0x80379DD0@ha */
|
||||
/* 80044C0C 38 A5 9D D0 */ addi r5, r5, d_event_d_event_data__stringBase0@l /* 0x80379DD0@l */
|
||||
/* 80044C10 38 A5 00 3D */ addi r5, r5, 0x3d
|
||||
/* 80044C14 38 C0 00 03 */ li r6, 3
|
||||
/* 80044C18 48 00 34 D5 */ bl getMySubstanceP__16dEvent_manager_cFiPCci
|
||||
/* 80044C1C 7C 64 1B 79 */ or. r4, r3, r3
|
||||
/* 80044C20 41 82 00 18 */ beq lbl_80044C38
|
||||
/* 80044C24 80 6D 8D E8 */ lwz r3, mAudioMgrPtr__10Z2AudioMgr(r13)
|
||||
/* 80044C28 38 63 03 D0 */ addi r3, r3, 0x3d0
|
||||
/* 80044C2C 80 84 00 00 */ lwz r4, 0(r4)
|
||||
/* 80044C30 38 A0 00 00 */ li r5, 0
|
||||
/* 80044C34 48 26 A7 D5 */ bl bgmStop__8Z2SeqMgrFUll
|
||||
lbl_80044C38:
|
||||
/* 80044C38 80 9F 00 00 */ lwz r4, 0(r31)
|
||||
/* 80044C3C 3C 60 57 41 */ lis r3, 0x5741 /* 0x57414954@ha */
|
||||
/* 80044C40 38 03 49 54 */ addi r0, r3, 0x4954 /* 0x57414954@l */
|
||||
/* 80044C44 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044C48 41 82 00 1C */ beq lbl_80044C64
|
||||
/* 80044C4C 40 80 00 48 */ bge lbl_80044C94
|
||||
/* 80044C50 3C 60 4E 4F */ lis r3, 0x4E4F /* 0x4E4F4D53@ha */
|
||||
/* 80044C54 38 03 4D 53 */ addi r0, r3, 0x4D53 /* 0x4E4F4D53@l */
|
||||
/* 80044C58 7C 04 00 00 */ cmpw r4, r0
|
||||
/* 80044C5C 41 82 00 18 */ beq lbl_80044C74
|
||||
/* 80044C60 48 00 00 34 */ b lbl_80044C94
|
||||
lbl_80044C64:
|
||||
/* 80044C64 7F 83 E3 78 */ mr r3, r28
|
||||
/* 80044C68 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80044C6C 4B FF F3 D1 */ bl specialProc_WaitProc__12dEvDtStaff_cFi
|
||||
/* 80044C70 48 00 00 30 */ b lbl_80044CA0
|
||||
lbl_80044C74:
|
||||
/* 80044C74 A8 7C 00 44 */ lha r3, 0x44(r28)
|
||||
/* 80044C78 80 0D 88 B4 */ lwz r0, m_frameNoMsg__7dDemo_c(r13)
|
||||
/* 80044C7C 7C 03 00 40 */ cmplw r3, r0
|
||||
/* 80044C80 41 81 00 20 */ bgt lbl_80044CA0
|
||||
/* 80044C84 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80044C88 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80044C8C 48 00 34 F1 */ bl cutEnd__16dEvent_manager_cFi
|
||||
/* 80044C90 48 00 00 10 */ b lbl_80044CA0
|
||||
lbl_80044C94:
|
||||
/* 80044C94 7F A3 EB 78 */ mr r3, r29
|
||||
/* 80044C98 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80044C9C 48 00 34 E1 */ bl cutEnd__16dEvent_manager_cFi
|
||||
lbl_80044CA0:
|
||||
/* 80044CA0 39 61 00 20 */ addi r11, r1, 0x20
|
||||
/* 80044CA4 48 31 D5 81 */ bl _restgpr_28
|
||||
/* 80044CA8 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 80044CAC 7C 08 03 A6 */ mtlr r0
|
||||
/* 80044CB0 38 21 00 20 */ addi r1, r1, 0x20
|
||||
/* 80044CB4 4E 80 00 20 */ blr
|
||||
|
|
@ -41,7 +41,7 @@ public:
|
|||
/* 802F9620 */ virtual bool isUsed(ResFONT const*);
|
||||
/* 80053BA0 */ virtual void clearAnmTransform();
|
||||
/* 802F9704 */ virtual void setAnimation(J2DAnmColor*);
|
||||
/* 80192414 */ virtual void setAnimation(J2DAnmTransform*);
|
||||
/* 80192414 */ virtual void setAnimation(J2DAnmTransform* i_bck) { J2DPane::setAnimation(i_bck); }
|
||||
/* 802F9798 */ virtual void setAnimation(J2DAnmTextureSRTKey*);
|
||||
/* 802F99A8 */ virtual void setAnimation(J2DAnmVtxColor*);
|
||||
/* 802F9838 */ virtual void setAnimation(J2DAnmTexPattern*);
|
||||
|
|
|
|||
|
|
@ -1,6 +1,11 @@
|
|||
#ifndef METROTRK_PORTABLE_DISPATCH_H
|
||||
#define METROTRK_PORTABLE_DISPATCH_H
|
||||
|
||||
#include "dolphin/types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define TRK_DISPATCH_CMD_CONNECT 1 /* Connect to the console */
|
||||
#define TRK_DISPATCH_CMD_DISCONNECT 2 /* Disconnect from the console */
|
||||
|
|
@ -17,4 +22,12 @@
|
|||
#define TRK_DISPATCH_CMD_STEP 25 /* Step through an instruction */
|
||||
#define TRK_DISPATCH_CMD_STOP 26 /* Stop the debugger */
|
||||
|
||||
typedef struct TRKBuffer TRKBuffer;
|
||||
|
||||
BOOL TRKDispatchMessage(TRKBuffer* buffer);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* METROTRK_PORTABLE_DISPATCH_H */
|
||||
|
|
|
|||
|
|
@ -3,17 +3,36 @@
|
|||
|
||||
#include "dolphin/types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef int MessageBufferID;
|
||||
|
||||
#define TRKMSGBUF_SIZE (0x800 + 0x80)
|
||||
|
||||
typedef struct TRKBuffer {
|
||||
/* 0x00 */ u32 _00;
|
||||
/* 0x04 */ BOOL isInUse;
|
||||
/* 0x08 */ u32 length;
|
||||
/* 0x0C */ u32 position;
|
||||
/* 0x10 */ u8 data[TRKMSGBUF_SIZE];
|
||||
} TRKBuffer;
|
||||
|
||||
/* typedef struct TRKBuffer {
|
||||
u32 _00;
|
||||
u32 _04;
|
||||
s32 _08;
|
||||
u32 _0C;
|
||||
u32 _10;
|
||||
u8 m_buffer[0x87C];
|
||||
} TRKBuffer;
|
||||
} TRKBuffer; */
|
||||
|
||||
s32 TRKSetBufferPosition(TRKBuffer*, u32);
|
||||
void* TRKGetBuffer(int);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* METROTRK_PORTABLE_MSGBUF_H */
|
||||
|
|
|
|||
|
|
@ -2,22 +2,23 @@
|
|||
#define METROTRK_PORTABLE_MSGHNDLR_H
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf.h"
|
||||
#include "trk.h"
|
||||
|
||||
void SetTRKConnected(BOOL);
|
||||
BOOL GetTRKConnected(void);
|
||||
s32 TRKDoSetOption(TRKBuffer*);
|
||||
s32 TRKDoStop(TRKBuffer*);
|
||||
s32 TRKDoStep(TRKBuffer*);
|
||||
s32 TRKDoContinue(TRKBuffer*);
|
||||
s32 TRKDoWriteRegisters(TRKBuffer*);
|
||||
s32 TRKDoReadRegisters(TRKBuffer*);
|
||||
s32 TRKDoWriteMemory(TRKBuffer*);
|
||||
s32 TRKDoReadMemory(TRKBuffer*);
|
||||
s32 TRKDoSupportMask(TRKBuffer*);
|
||||
s32 TRKDoVersions(TRKBuffer*);
|
||||
s32 TRKDoOverride(TRKBuffer*);
|
||||
s32 TRKDoReset(TRKBuffer*);
|
||||
s32 TRKDoDisconnect(TRKBuffer*);
|
||||
s32 TRKDoConnect(TRKBuffer*);
|
||||
DSError TRKDoSetOption(TRKBuffer*);
|
||||
DSError TRKDoStop(TRKBuffer*);
|
||||
DSError TRKDoStep(TRKBuffer*);
|
||||
DSError TRKDoContinue(TRKBuffer*);
|
||||
DSError TRKDoWriteRegisters(TRKBuffer*);
|
||||
DSError TRKDoReadRegisters(TRKBuffer*);
|
||||
DSError TRKDoWriteMemory(TRKBuffer*);
|
||||
DSError TRKDoReadMemory(TRKBuffer*);
|
||||
DSError TRKDoSupportMask(TRKBuffer*);
|
||||
DSError TRKDoVersions(TRKBuffer*);
|
||||
DSError TRKDoOverride(TRKBuffer*);
|
||||
DSError TRKDoReset(TRKBuffer*);
|
||||
DSError TRKDoDisconnect(TRKBuffer*);
|
||||
DSError TRKDoConnect(TRKBuffer*);
|
||||
|
||||
#endif /* METROTRK_PORTABLE_MSGHNDLR_H */
|
||||
|
|
|
|||
|
|
@ -1,32 +1,38 @@
|
|||
#ifndef METROTRK_PORTABLE_NUBEVENT_H
|
||||
#define METROTRK_PORTABLE_NUBEVENT_H
|
||||
|
||||
#include "trk.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef u32 NubEventID;
|
||||
|
||||
typedef enum NubEventType {
|
||||
NullEvent,
|
||||
ShutdownEvent,
|
||||
RequestEvent,
|
||||
BreakpointEvent,
|
||||
ExceptionEvent,
|
||||
SupportEvent
|
||||
} NubEventType;
|
||||
typedef struct TRKEvent {
|
||||
NubEventType eventType;
|
||||
NubEventID eventID;
|
||||
MessageBufferID msgBufID;
|
||||
} TRKEvent;
|
||||
|
||||
typedef struct NubEvent {
|
||||
NubEventType mType;
|
||||
NubEventID mID;
|
||||
MessageBufferID mMessageBufferID;
|
||||
} NubEvent;
|
||||
typedef struct TRKEventQueue {
|
||||
int _00;
|
||||
int count;
|
||||
int next;
|
||||
TRKEvent events[2];
|
||||
NubEventID eventID;
|
||||
} TRKEventQueue;
|
||||
extern TRKEventQueue gTRKEventQueue;
|
||||
|
||||
typedef struct EventQueue {
|
||||
s32 _00;
|
||||
s32 mCount;
|
||||
s32 mFirst;
|
||||
NubEvent mEventList[2];
|
||||
NubEventID mEventID;
|
||||
} EventQueue;
|
||||
EventQueue gTRKEventQueue;
|
||||
BOOL TRKGetNextEvent(TRKEvent* event);
|
||||
void TRKDestructEvent(TRKEvent*);
|
||||
void TRKConstructEvent(TRKEvent*, NubEventType);
|
||||
DSError TRKPostEvent(TRKEvent*);
|
||||
DSError TRKInitializeEventQueue();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* METROTRK_PORTABLE_NUBEVENT_H */
|
||||
|
|
|
|||
|
|
@ -2,9 +2,21 @@
|
|||
#define METROTRK_PORTABLE_NUBINIT_H
|
||||
|
||||
#include "dolphin/types.h"
|
||||
#include "trk.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void TRKNubWelcome(void);
|
||||
s32 TRKTerminateNub(void);
|
||||
s32 TRKInitializeNub(void);
|
||||
void TRKNubMainLoop(void);
|
||||
DSError TRKTerminateNub(void);
|
||||
DSError TRKInitializeNub(void);
|
||||
|
||||
extern BOOL gTRKBigEndian;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* METROTRK_PORTABLE_NUBINIT_H */
|
||||
|
|
|
|||
|
|
@ -3,4 +3,16 @@
|
|||
|
||||
#include "dolphin/types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void TRKGetInput(void);
|
||||
|
||||
extern void* gTRKInputPendingPtr;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* METROTRK_PORTABLE_SERPOLL_H */
|
||||
|
|
|
|||
|
|
@ -1,5 +1,19 @@
|
|||
#ifndef METROTRK_PORTABLE_SUPPORT_H
|
||||
#define METROTRK_PORTABLE_SUPPORT_H
|
||||
|
||||
#include "dolphin/types.h"
|
||||
#include "trk.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef struct TRKBuffer TRKBuffer;
|
||||
|
||||
DSError TRKRequestSend(TRKBuffer* msgBuf, int* bufferId, u32 p1, u32 p2, int p3);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* METROTRK_PORTABLE_SUPPORT_H */
|
||||
|
|
|
|||
|
|
@ -2,8 +2,7 @@
|
|||
#define OS_DOLPHIN_DOLPHIN_TRK_GLUE_H
|
||||
|
||||
#include "dolphin/os/OS.h"
|
||||
|
||||
typedef enum { HARDWARE_GDEV = 0, HARDWARE_DDH = 1, HARDWARE_BBA = 2 } HardwareType;
|
||||
#include "trk.h"
|
||||
|
||||
typedef int (*DBCommFunc)();
|
||||
typedef int (*DBCommInitFunc)(void*, OSInterruptHandler);
|
||||
|
|
|
|||
|
|
@ -1,5 +1,16 @@
|
|||
#ifndef OS_DOLPHIN_TARGCONT_H
|
||||
#define OS_DOLPHIN_TARGCONT_H
|
||||
|
||||
#include "trk.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
DSError TRKTargetContinue(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* OS_DOLPHIN_TARGCONT_H */
|
||||
|
|
|
|||
|
|
@ -3,7 +3,15 @@
|
|||
|
||||
#include "dolphin/types.h"
|
||||
|
||||
u8 GetUseSerialIO();
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
u8 GetUseSerialIO(void);
|
||||
void SetUseSerialIO(u8);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* OS_DOLPHIN_TARGET_OPTIONS_H */
|
||||
|
|
|
|||
|
|
@ -1,5 +1,19 @@
|
|||
#ifndef PPC_EXPORT_TARGSUPP_H
|
||||
#define PPC_EXPORT_TARGSUPP_H
|
||||
|
||||
#include "dolphin/types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
u32 TRKAccessFile(u32, u32, u32*, u8*);
|
||||
u32 TRKOpenFile(u32, u32, u32*, u8*);
|
||||
u32 TRKCloseFile(u32, u32);
|
||||
u32 TRKPositionFile(u32, u32, u32*, u8*);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PPC_EXPORT_TARGSUPP_H */
|
||||
|
|
|
|||
|
|
@ -1,10 +1,19 @@
|
|||
#ifndef PPC_GENERIC_TARGIMPL_H
|
||||
#define PPC_GENERIC_TARGIMPL_H
|
||||
|
||||
#include "dolphin/types.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent.h"
|
||||
#include "trk.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void TRKSwapAndGo();
|
||||
void TRKTargetSetStopped(s32);
|
||||
DSError TRKTargetInterrupt(TRKEvent*);
|
||||
DSError TRKTargetSupportRequest();
|
||||
void TRKDestructEvent(TRKEvent*);
|
||||
BOOL TRKTargetStopped(void);
|
||||
|
||||
typedef struct Default_PPC {
|
||||
u32 GPR[32];
|
||||
|
|
@ -21,98 +30,98 @@ typedef struct Float_PPC {
|
|||
u64 FPECR;
|
||||
} Float_PPC;
|
||||
|
||||
typedef struct Extended1_PPC_6xx_7xx{
|
||||
u32 SR[16];
|
||||
u32 TBL;
|
||||
u32 TBU;
|
||||
u32 HID0;
|
||||
u32 HID1;
|
||||
u32 MSR;
|
||||
u32 PVR;
|
||||
u32 IBAT0U;
|
||||
u32 IBAT0L;
|
||||
u32 IBAT1U;
|
||||
u32 IBAT1L;
|
||||
u32 IBAT2U;
|
||||
u32 IBAT2L;
|
||||
u32 IBAT3U;
|
||||
u32 IBAT3L;
|
||||
u32 DBAT0U;
|
||||
u32 DBAT0L;
|
||||
u32 DBAT1U;
|
||||
u32 DBAT1L;
|
||||
u32 DBAT2U;
|
||||
u32 DBAT2L;
|
||||
u32 DBAT3U;
|
||||
u32 DBAT3L;
|
||||
u32 DMISS;
|
||||
u32 DCMP;
|
||||
u32 HASH1;
|
||||
u32 HASH2;
|
||||
u32 IMISS;
|
||||
u32 ICMP;
|
||||
u32 RPA;
|
||||
u32 SDR1;
|
||||
u32 DAR;
|
||||
u32 DSISR;
|
||||
u32 SPRG0;
|
||||
u32 SPRG1;
|
||||
u32 SPRG2;
|
||||
u32 SPRG3;
|
||||
u32 DEC;
|
||||
u32 IABR;
|
||||
u32 EAR;
|
||||
u32 DABR;
|
||||
u32 PMC1;
|
||||
u32 PMC2;
|
||||
u32 PMC3;
|
||||
u32 PMC4;
|
||||
u32 SIA;
|
||||
u32 MMCR0;
|
||||
u32 MMCR1;
|
||||
u32 THRM1;
|
||||
u32 THRM2;
|
||||
u32 THRM3;
|
||||
u32 ICTC;
|
||||
u32 L2CR;
|
||||
u32 UMMCR2;
|
||||
u32 UBAMR;
|
||||
u32 UMMCR0;
|
||||
u32 UPMC1;
|
||||
u32 UPMC2;
|
||||
u32 USIA;
|
||||
u32 UMMCR1;
|
||||
u32 UPMC3;
|
||||
u32 UPMC4;
|
||||
u32 USDA;
|
||||
u32 MMCR2;
|
||||
u32 BAMR;
|
||||
u32 SDA;
|
||||
u32 MSSCR0;
|
||||
u32 MSSCR1;
|
||||
u32 PIR;
|
||||
u32 exceptionID;
|
||||
u32 GQR[8];
|
||||
u32 HID_G;
|
||||
u32 WPAR;
|
||||
u32 DMA_U;
|
||||
u32 DMA_L;
|
||||
typedef struct Extended1_PPC_6xx_7xx {
|
||||
u32 SR[16];
|
||||
u32 TBL;
|
||||
u32 TBU;
|
||||
u32 HID0;
|
||||
u32 HID1;
|
||||
u32 MSR;
|
||||
u32 PVR;
|
||||
u32 IBAT0U;
|
||||
u32 IBAT0L;
|
||||
u32 IBAT1U;
|
||||
u32 IBAT1L;
|
||||
u32 IBAT2U;
|
||||
u32 IBAT2L;
|
||||
u32 IBAT3U;
|
||||
u32 IBAT3L;
|
||||
u32 DBAT0U;
|
||||
u32 DBAT0L;
|
||||
u32 DBAT1U;
|
||||
u32 DBAT1L;
|
||||
u32 DBAT2U;
|
||||
u32 DBAT2L;
|
||||
u32 DBAT3U;
|
||||
u32 DBAT3L;
|
||||
u32 DMISS;
|
||||
u32 DCMP;
|
||||
u32 HASH1;
|
||||
u32 HASH2;
|
||||
u32 IMISS;
|
||||
u32 ICMP;
|
||||
u32 RPA;
|
||||
u32 SDR1;
|
||||
u32 DAR;
|
||||
u32 DSISR;
|
||||
u32 SPRG0;
|
||||
u32 SPRG1;
|
||||
u32 SPRG2;
|
||||
u32 SPRG3;
|
||||
u32 DEC;
|
||||
u32 IABR;
|
||||
u32 EAR;
|
||||
u32 DABR;
|
||||
u32 PMC1;
|
||||
u32 PMC2;
|
||||
u32 PMC3;
|
||||
u32 PMC4;
|
||||
u32 SIA;
|
||||
u32 MMCR0;
|
||||
u32 MMCR1;
|
||||
u32 THRM1;
|
||||
u32 THRM2;
|
||||
u32 THRM3;
|
||||
u32 ICTC;
|
||||
u32 L2CR;
|
||||
u32 UMMCR2;
|
||||
u32 UBAMR;
|
||||
u32 UMMCR0;
|
||||
u32 UPMC1;
|
||||
u32 UPMC2;
|
||||
u32 USIA;
|
||||
u32 UMMCR1;
|
||||
u32 UPMC3;
|
||||
u32 UPMC4;
|
||||
u32 USDA;
|
||||
u32 MMCR2;
|
||||
u32 BAMR;
|
||||
u32 SDA;
|
||||
u32 MSSCR0;
|
||||
u32 MSSCR1;
|
||||
u32 PIR;
|
||||
u32 exceptionID;
|
||||
u32 GQR[8];
|
||||
u32 HID_G;
|
||||
u32 WPAR;
|
||||
u32 DMA_U;
|
||||
u32 DMA_L;
|
||||
} Extended1_PPC_6xx_7xx;
|
||||
|
||||
typedef struct Extended2_PPC_6xx_7xx{
|
||||
u32 PSR[32][2];
|
||||
typedef struct Extended2_PPC_6xx_7xx {
|
||||
u32 PSR[32][2];
|
||||
} Extended2_PPC_6xx_7xx;
|
||||
|
||||
typedef struct ProcessorState_PPC_6xx_7xx{
|
||||
Default_PPC Default;
|
||||
Float_PPC Float;
|
||||
Extended1_PPC_6xx_7xx Extended1;
|
||||
Extended2_PPC_6xx_7xx Extended2;
|
||||
u32 transport_handler_saved_ra;
|
||||
typedef struct ProcessorState_PPC_6xx_7xx {
|
||||
Default_PPC Default;
|
||||
Float_PPC Float;
|
||||
Extended1_PPC_6xx_7xx Extended1;
|
||||
Extended2_PPC_6xx_7xx Extended2;
|
||||
u32 transport_handler_saved_ra;
|
||||
} ProcessorState_PPC_6xx_7xx;
|
||||
|
||||
typedef ProcessorState_PPC_6xx_7xx ProcessorState_PPC;
|
||||
ProcessorState_PPC gTRKCPUState;
|
||||
extern ProcessorState_PPC gTRKCPUState;
|
||||
|
||||
typedef struct TRKState {
|
||||
/* 0x00 */ u32 GPR[32];
|
||||
|
|
@ -126,6 +135,10 @@ typedef struct TRKState {
|
|||
/* 0x9C */ u32 inputActivated;
|
||||
/* 0xA0 */ void* inputPendingPtr;
|
||||
} TRKState;
|
||||
TRKState gTRKState;
|
||||
extern TRKState gTRKState;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PPC_GENERIC_TARGIMPL_H */
|
||||
|
|
|
|||
|
|
@ -3,19 +3,27 @@
|
|||
|
||||
#include "dolphin/types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef struct CircleBuffer {
|
||||
u8* field_0x0;
|
||||
u8* field_0x4;
|
||||
u8* field_0x8;
|
||||
u32 field_0xc;
|
||||
u8* read_ptr;
|
||||
u8* write_ptr;
|
||||
u8* start_ptr;
|
||||
u32 size;
|
||||
s32 mBytesToRead;
|
||||
u32 mBytesToWrite;
|
||||
u32 mCriticalSection;
|
||||
} CircleBuffer;
|
||||
|
||||
s32 CircleBufferReadBytes(CircleBuffer*, u8*, u32);
|
||||
s32 CircleBufferWriteBytes(CircleBuffer*, u8*, u32);
|
||||
int CircleBufferReadBytes(CircleBuffer*, u8*, u32);
|
||||
int CircleBufferWriteBytes(CircleBuffer*, u8*, u32);
|
||||
void CircleBufferInitialize(CircleBuffer*, u8*, s32);
|
||||
s32 CBGetBytesAvailableForRead(CircleBuffer*);
|
||||
u32 CBGetBytesAvailableForRead(CircleBuffer*);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* UTILS_COMMON_CIRCLEBUFFER_H */
|
||||
|
|
|
|||
|
|
@ -3,8 +3,16 @@
|
|||
|
||||
#include "dolphin/types.h"
|
||||
|
||||
void MWExitCriticalSection(u32* section);
|
||||
void MWEnterCriticalSection(u32* section);
|
||||
void MWInitializeCriticalSection();
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
void MWExitCriticalSection(unsigned int* section);
|
||||
void MWEnterCriticalSection(unsigned int* section);
|
||||
void MWInitializeCriticalSection(unsigned int*);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* UTILS_GC_MWCRITICALSECTION_GC_H */
|
||||
|
|
|
|||
|
|
@ -1,15 +0,0 @@
|
|||
#ifndef AMCEXI2STUBS_H
|
||||
#define AMCEXI2STUBS_H
|
||||
|
||||
#include "dolphin/types.h"
|
||||
|
||||
void EXI2_Init(void);
|
||||
void EXI2_EnableInterrupts(void);
|
||||
u8 EXI2_Poll(void);
|
||||
u8 EXI2_ReadN(void*, u32);
|
||||
u8 EXI2_WriteN(void*, u32);
|
||||
void EXI2_Reserve(void);
|
||||
void EXI2_Unreserve(void);
|
||||
u8 AMC_IsStub(void);
|
||||
|
||||
#endif /* AMCEXI2STUBS_H */
|
||||
|
|
@ -7,23 +7,10 @@
|
|||
#include "f_op/f_op_msg_mng.h"
|
||||
#include "m_Do/m_Do_hostIO.h"
|
||||
|
||||
class dGov_HIO_c : public mDoHIO_entry_c {
|
||||
public:
|
||||
/* 8019AFE0 */ dGov_HIO_c();
|
||||
/* 8019C06C */ virtual ~dGov_HIO_c();
|
||||
|
||||
/* 0x04 */ u8 unk_0x4;
|
||||
/* 0x08 */ f32 mScale;
|
||||
/* 0x0C */ f32 mAlpha;
|
||||
/* 0x10 */ f32 mAnimSpeed;
|
||||
/* 0x14 */ GXColor mBlack;
|
||||
/* 0x18 */ GXColor mWhite;
|
||||
}; // Size: 0x1C
|
||||
|
||||
class dDlst_Gameover_CAPTURE_c : public dDlst_base_c {
|
||||
public:
|
||||
/* 8019ACF8 */ virtual void draw();
|
||||
/* 8019C2CC */ virtual ~dDlst_Gameover_CAPTURE_c();
|
||||
/* 8019C2CC */ virtual ~dDlst_Gameover_CAPTURE_c(); // supposed to be inlined
|
||||
};
|
||||
|
||||
class dMsgScrnLight_c;
|
||||
|
|
|
|||
|
|
@ -1,9 +1,24 @@
|
|||
#ifndef D_FILE_D_FILE_SEL_WARNING_H
|
||||
#define D_FILE_D_FILE_SEL_WARNING_H
|
||||
|
||||
#include "JSystem/JUtility/TColor.h"
|
||||
#include "d/d_drawlist.h"
|
||||
|
||||
class JKRArchive;
|
||||
class CPaneMgr;
|
||||
class J2DScreen;
|
||||
class JUTFont;
|
||||
class J2DTextBox;
|
||||
class dMsgString_c;
|
||||
|
||||
class dDlst_FileWarn_c : public dDlst_base_c {
|
||||
public:
|
||||
/* 80192354 */ virtual void draw();
|
||||
/* 801923CC */ virtual ~dDlst_FileWarn_c() {}
|
||||
|
||||
/* 0x04 */ J2DScreen* Scr;
|
||||
/* 0x08 */ JUTFont* mFont;
|
||||
/* 0x0C */ dMsgString_c* mMsgString;
|
||||
};
|
||||
|
||||
class dFile_warning_c {
|
||||
public:
|
||||
|
|
@ -12,7 +27,7 @@ public:
|
|||
/* 80191F18 */ void _move();
|
||||
/* 80191F90 */ void modeWait();
|
||||
/* 80191F94 */ void modeMove();
|
||||
/* 80191FD4 */ void baseMoveAnm();
|
||||
/* 80191FD4 */ bool baseMoveAnm();
|
||||
/* 801920B8 */ void openInit();
|
||||
/* 8019210C */ void closeInit();
|
||||
/* 80192160 */ void init();
|
||||
|
|
@ -23,13 +38,27 @@ public:
|
|||
|
||||
/* 80191C18 */ virtual ~dFile_warning_c();
|
||||
|
||||
// fake? needed to get vtable size correct
|
||||
virtual void dummy() = 0;
|
||||
virtual void dummy2() = 0;
|
||||
|
||||
u8 getStatus() { return mStatus; }
|
||||
void draw() { _draw(); }
|
||||
|
||||
u8 field_0x4[0x38 - 0x4];
|
||||
/* 0x04 */ JKRArchive* mpArchive;
|
||||
/* 0x08 */ dDlst_FileWarn_c mFileWarn;
|
||||
/* 0x18 */ u8 field_0x18;
|
||||
/* 0x1C */ CPaneMgr* mpRootPane;
|
||||
/* 0x20 */ J2DTextBox* field_0x20;
|
||||
/* 0x24 */ J2DAnmTransform* field_0x24;
|
||||
/* 0x28 */ int field_0x28;
|
||||
/* 0x2C */ int field_0x2c;
|
||||
/* 0x30 */ u8 field_0x30[4];
|
||||
/* 0x34 */ f32 field_0x34;
|
||||
/* 0x38 */ f32 mPosY;
|
||||
/* 0x3C */ u8 field_0x3c[0x3D - 0x3C];
|
||||
/* 0x3C */ u8 field_0x3c;
|
||||
/* 0x3D */ u8 mStatus;
|
||||
/* 0x3E */ u8 field_0x3e;
|
||||
};
|
||||
|
||||
#endif /* D_FILE_D_FILE_SEL_WARNING_H */
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@ public:
|
|||
dDlst_MenuSaveExplain_c() { mpScrn = NULL; }
|
||||
|
||||
/* 801F6ADC */ virtual void draw();
|
||||
/* 801F6B8C */ virtual ~dDlst_MenuSaveExplain_c();
|
||||
/* 801F6B8C */ virtual ~dDlst_MenuSaveExplain_c() {}
|
||||
|
||||
void setScrnExplain(dMsgScrnExplain_c* p_scrn) { mpScrn = p_scrn; }
|
||||
|
||||
|
|
@ -39,7 +39,7 @@ public:
|
|||
}
|
||||
|
||||
/* 801F6B0C */ virtual void draw();
|
||||
/* 801F6B44 */ virtual ~dDlst_MenuSave_c();
|
||||
/* 801F6B44 */ virtual ~dDlst_MenuSave_c() {}
|
||||
|
||||
/* 0x04 */ J2DScreen* Scr;
|
||||
/* 0x08 */ JUTFont* font[2];
|
||||
|
|
@ -49,7 +49,7 @@ public:
|
|||
class dMs_HIO_c {
|
||||
public:
|
||||
/* 801EF654 */ dMs_HIO_c();
|
||||
/* 801F6BD4 */ virtual ~dMs_HIO_c();
|
||||
/* 801F6BD4 */ virtual ~dMs_HIO_c() {}
|
||||
|
||||
/* 0x4 */ s8 field_0x4;
|
||||
/* 0x5 */ u8 mDisplayWaitFrames;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,31 @@
|
|||
#ifndef AMCEXI2STUBS_H
|
||||
#define AMCEXI2STUBS_H
|
||||
|
||||
#include "dolphin/os/OS.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef OSInterruptHandler AmcEXICallback;
|
||||
|
||||
typedef enum {
|
||||
AMC_EXI_NO_ERROR = 0,
|
||||
AMC_EXI_UNSELECTED
|
||||
} AmcExiError;
|
||||
|
||||
void EXI2_Init(vu8**, AmcEXICallback);
|
||||
void EXI2_EnableInterrupts(void);
|
||||
int EXI2_Poll(void);
|
||||
AmcExiError EXI2_ReadN(void*, u32);
|
||||
AmcExiError EXI2_WriteN(const void*, u32);
|
||||
void EXI2_Reserve(void);
|
||||
void EXI2_Unreserve(void);
|
||||
BOOL AMC_IsStub(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
};
|
||||
#endif
|
||||
|
||||
#endif /* AMCEXI2STUBS_H */
|
||||
|
|
@ -2,6 +2,7 @@
|
|||
#define DB_H
|
||||
|
||||
#include "dolphin/types.h"
|
||||
#include "amcstubs/AmcExi2Stubs.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
|
@ -22,6 +23,13 @@ void DBInit(void);
|
|||
void __DBExceptionDestinationAux(void);
|
||||
void __DBExceptionDestination(void);
|
||||
void DBPrintf(char* format, ...);
|
||||
void DBInitComm(vu8**, AmcEXICallback); // possibly not this type, but some similar construction
|
||||
void DBInitInterrupts();
|
||||
u32 DBQueryData();
|
||||
BOOL DBRead(void*, u32);
|
||||
BOOL DBWrite(const void*, u32);
|
||||
void DBOpen();
|
||||
void DBClose();
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
#ifndef SRC_ODEMUEXI2LIB_DEBUGGERDRIVER_H
|
||||
#define SRC_ODEMUEXI2LIB_DEBUGGERDRIVER_H
|
||||
|
||||
|
||||
#endif /* SRC_ODEMUEXI2LIB_DEBUGGERDRIVER_H */
|
||||
|
|
@ -44,9 +44,9 @@
|
|||
-include libs/PowerPC_EABI_Support/Runtime/Src/Makefile
|
||||
-include libs/PowerPC_EABI_Support/MSL/MSL_C/Makefile
|
||||
-include libs/TRK_MINNOW_DOLPHIN/Makefile
|
||||
-include libs/amcstubs/Makefile
|
||||
-include libs/odemuexi2/Makefile
|
||||
-include libs/odenotstub/Makefile
|
||||
-include libs/dolphin/amcstubs/Makefile
|
||||
-include libs/dolphin/odemuexi2/Makefile
|
||||
-include libs/dolphin/odenotstub/Makefile
|
||||
|
||||
# rels
|
||||
-include rel/f_pc/f_pc_profile_lst/Makefile
|
||||
|
|
|
|||
|
|
@ -1,23 +1,13 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: J2DAnimation
|
||||
//
|
||||
|
||||
#include "JSystem/J2DGraph/J2DAnimation.h"
|
||||
#include "JSystem/J2DGraph/J2DScreen.h"
|
||||
#include "JSystem/J3DGraphBase/J3DTexture.h"
|
||||
#include "JSystem/JUtility/JUTPalette.h"
|
||||
#include "JSystem/JUtility/JUTResource.h"
|
||||
#include "dolphin/os/OS.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
f32 J2DGetKeyFrameInterpolationf(f32 param_0, J3DAnmKeyTableBase* param_1, f32* param_2);
|
||||
f32 J2DGetKeyFrameInterpolations(f32 param_0, J3DAnmKeyTableBase* param_1, s16* param_2);
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* 8030A590-8030AAFC 304ED0 056C+00 1/0 0/0 0/0 .text
|
||||
* getTransform__19J2DAnmTransformFullCFUsP16J3DTransformInfo */
|
||||
void J2DAnmTransformFull::getTransform(u16 param_0, J3DTransformInfo* transformInfo) const {
|
||||
|
|
|
|||
|
|
@ -3,12 +3,13 @@
|
|||
// Translation Unit: J2DAnmLoader
|
||||
//
|
||||
|
||||
// non matching because some dtors are emitted immediately after
|
||||
// J2DAnmLoaderDataBase::load but they should be at the very end
|
||||
// this should match with -sym on and once J2DMaterialFactory is done
|
||||
// JSUConvertOffsetToPtr<u16> needs to be emitted in J2DMaterialFactory before its used here
|
||||
|
||||
#include "JSystem/J2DGraph/J2DAnmLoader.h"
|
||||
#include "dol2asm.h"
|
||||
#include "dolphin/types.h"
|
||||
#include "JSystem/JSupport/JSupport.h"
|
||||
|
||||
//
|
||||
// Types:
|
||||
|
|
@ -16,7 +17,7 @@
|
|||
|
||||
/* 80308A6C-80309290 3033AC 0824+00 0/0 26/26 2/2 .text load__20J2DAnmLoaderDataBaseFPCv
|
||||
*/
|
||||
void* J2DAnmLoaderDataBase::load(void const* p_data) {
|
||||
J2DAnmBase* J2DAnmLoaderDataBase::load(void const* p_data) {
|
||||
const J3DAnmDataHeader* hdr = (const J3DAnmDataHeader*)p_data;
|
||||
|
||||
if (hdr == NULL) {
|
||||
|
|
@ -26,13 +27,13 @@ void* J2DAnmLoaderDataBase::load(void const* p_data) {
|
|||
case 'bck1': {
|
||||
J2DAnmKeyLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmTransformKey();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
break;
|
||||
}
|
||||
case 'bpk1': {
|
||||
J2DAnmKeyLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmColorKey();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
break;
|
||||
}
|
||||
case 'blk1':
|
||||
|
|
@ -40,42 +41,42 @@ void* J2DAnmLoaderDataBase::load(void const* p_data) {
|
|||
case 'btk1': {
|
||||
J2DAnmKeyLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmTextureSRTKey();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
break;
|
||||
}
|
||||
case 'brk1': {
|
||||
J2DAnmKeyLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmTevRegKey();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
break;
|
||||
}
|
||||
case 'bxk1': {
|
||||
J2DAnmKeyLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmVtxColorKey();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
break;
|
||||
}
|
||||
case 'bca1': {
|
||||
J2DAnmFullLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmTransformFull();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
break;
|
||||
}
|
||||
case 'bpa1': {
|
||||
J2DAnmFullLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmColorFull();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
break;
|
||||
}
|
||||
case 'btp1': {
|
||||
J2DAnmFullLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmTexPattern();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
}
|
||||
case 'bva1': {
|
||||
J2DAnmFullLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmVisibilityFull();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
break;
|
||||
}
|
||||
case 'bla1':
|
||||
|
|
@ -83,7 +84,7 @@ void* J2DAnmLoaderDataBase::load(void const* p_data) {
|
|||
case 'bxa1': {
|
||||
J2DAnmFullLoader_v15 loader;
|
||||
loader.mpResource = new J2DAnmVtxColorFull();
|
||||
return loader.load(p_data);
|
||||
return (J2DAnmBase*)loader.load(p_data);
|
||||
}
|
||||
}
|
||||
return NULL;
|
||||
|
|
|
|||
|
|
@ -1,15 +1,5 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: J2DGrafContext
|
||||
//
|
||||
|
||||
#include "JSystem/J2DGraph/J2DGrafContext.h"
|
||||
#include "dolphin/gx/GX.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* 802E8B08-802E8BB4 2E3448 00AC+00 0/0 2/2 0/0 .text __ct__14J2DGrafContextFffff */
|
||||
J2DGrafContext::J2DGrafContext(f32 x, f32 y, f32 width, f32 height)
|
||||
|
|
|
|||
|
|
@ -1,16 +1,6 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: J2DManage
|
||||
//
|
||||
|
||||
#include "JSystem/J2DGraph/J2DManage.h"
|
||||
#include "JSystem/JSupport/JSUInputStream.h"
|
||||
#include "string.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* 8030CE18-8030CE7C 307758 0064+00 1/1 3/3 0/0 .text get__13J2DDataManageFPCc */
|
||||
void* J2DDataManage::get(char const* name) {
|
||||
|
|
|
|||
|
|
@ -1,23 +1,5 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: J2DOrthoGraph
|
||||
//
|
||||
|
||||
#include "JSystem/J2DGraph/J2DOrthoGraph.h"
|
||||
#include "dolphin/gx/GX.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* 802E9670-802E96D0 2E3FB0 0060+00 3/3 1/1 0/0 .text __ct__13J2DOrthoGraphFv */
|
||||
J2DOrthoGraph::J2DOrthoGraph() : J2DGrafContext(0, 0, 0, 0) {
|
||||
|
|
|
|||
|
|
@ -1,17 +1,10 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: J2DPane
|
||||
//
|
||||
|
||||
#include "JSystem/J2DGraph/J2DPane.h"
|
||||
#include "JSystem/J2DGraph/J2DAnimation.h"
|
||||
#include "JSystem/J2DGraph/J2DOrthoGraph.h"
|
||||
#include "JSystem/J2DGraph/J2DScreen.h"
|
||||
#include "JSystem/JSupport/JSURandomInputStream.h"
|
||||
#include "JSystem/JUtility/JUTResource.h"
|
||||
#include "dol2asm.h"
|
||||
#include "dolphin/gx/GX.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
/* 802F5BF8-802F5CB8 2F0538 00C0+00 0/0 10/10 0/0 .text __ct__7J2DPaneFv */
|
||||
J2DPane::J2DPane() : mBounds(), mGlobalBounds(), mClipRect(), mPaneTree(this) {
|
||||
|
|
|
|||
|
|
@ -6,7 +6,6 @@
|
|||
#include "JSystem/J2DGraph/J2DPrint.h"
|
||||
#include "JSystem/JSupport/JSURandomInputStream.h"
|
||||
#include "JSystem/JUtility/JUTResFont.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
/* 803071E4-8030751C 301B24 0338+00 0/0 1/1 0/0 .text
|
||||
* __ct__12J2DTextBoxExFP7J2DPaneP20JSURandomInputStreamUlP11J2DMaterial */
|
||||
|
|
|
|||
|
|
@ -1,27 +1,9 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: J2DWindow
|
||||
//
|
||||
|
||||
#include "JSystem/J2DGraph/J2DWindow.h"
|
||||
#include "JSystem/JSupport/JSURandomInputStream.h"
|
||||
#include "JSystem/JUtility/JUTPalette.h"
|
||||
#include "JSystem/JUtility/JUTResource.h"
|
||||
#include "JSystem/JUtility/JUTTexture.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
|
||||
/* 802F9A7C-802F9B74 2F43BC 00F8+00 0/0 1/1 0/0 .text __ct__9J2DWindowFv */
|
||||
J2DWindow::J2DWindow()
|
||||
: field_0x100(NULL), field_0x104(NULL), field_0x108(NULL), field_0x10c(NULL), field_0x110(NULL),
|
||||
|
|
|
|||
|
|
@ -5,6 +5,9 @@
|
|||
#include "extras.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
// TODO: std namespace should be used for C++, but it breaks asm compatibility afaict.
|
||||
// try to fix later
|
||||
// namespace std {
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
|
@ -24,6 +27,7 @@ char* strcpy(char* dst, const char* src);
|
|||
size_t strlen(const char* str);
|
||||
|
||||
#ifdef __cplusplus
|
||||
// }
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,224 @@
|
|||
#ifndef __METROTRK_TRK_H__
|
||||
#define __METROTRK_TRK_H__
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
//////////// TRK ENUMS /////////////
|
||||
// Hardware types.
|
||||
typedef enum {
|
||||
HARDWARE_AMC_DDH = 0,
|
||||
HARDWARE_GDEV = 1,
|
||||
HARDWARE_BBA = 2,
|
||||
} HardwareType;
|
||||
|
||||
// DS Error returns.
|
||||
typedef enum {
|
||||
DS_NoError = 0x0,
|
||||
DS_StepError = 0x1,
|
||||
DS_ParameterError = 0x2,
|
||||
|
||||
DS_EventQueueFull = 0x100,
|
||||
|
||||
DS_NoMessageBufferAvailable = 0x300,
|
||||
DS_MessageBufferOverflow = 0x301,
|
||||
DS_MessageBufferReadError = 0x302,
|
||||
|
||||
DS_DispatchError = 0x500,
|
||||
|
||||
DS_InvalidMemory = 0x700,
|
||||
DS_InvalidRegister = 0x701,
|
||||
DS_CWDSException = 0x702,
|
||||
DS_UnsupportedError = 0x703,
|
||||
DS_InvalidProcessID = 0x704,
|
||||
DS_InvalidThreadID = 0x705,
|
||||
DS_OSError = 0x706,
|
||||
|
||||
DS_Error800 = 0x800,
|
||||
} DSError;
|
||||
|
||||
// Where to read/write.
|
||||
typedef enum {
|
||||
DS_Stdin = 0,
|
||||
DS_Stdout = 1,
|
||||
DS_Stderr = 2,
|
||||
} DSFileHandle;
|
||||
|
||||
// IO returns.
|
||||
typedef enum {
|
||||
DS_IONoError = 0,
|
||||
DS_IOError = 1,
|
||||
DS_IOEOF = 2,
|
||||
} DSIOResult;
|
||||
|
||||
// Message command IDs
|
||||
typedef enum {
|
||||
DSMSG_Ping = 0x0,
|
||||
DSMSG_Connect = 0x1,
|
||||
DSMSG_Disconnect = 0x2,
|
||||
DSMSG_Reset = 0x3,
|
||||
DSMSG_Versions = 0x4,
|
||||
DSMSG_SupportMask = 0x5,
|
||||
DSMSG_Override = 0x7,
|
||||
|
||||
DSMSG_ReadMemory = 0x10,
|
||||
DSMSG_WriteMemory = 0x11,
|
||||
DSMSG_ReadRegisters = 0x12,
|
||||
DSMSG_WriteRegisters = 0x13,
|
||||
DSMSG_SetOption = 0x17,
|
||||
DSMSG_Continue = 0x18,
|
||||
DSMSG_Step = 0x19,
|
||||
DSMSG_Stop = 0x1A,
|
||||
|
||||
DSMSG_ReplyACK = 0x80,
|
||||
|
||||
DSMSG_NotifyStopped = 0x90,
|
||||
DSMSG_NotifyException = 0x91,
|
||||
|
||||
DSMSG_WriteFile = 0xD0,
|
||||
DSMSG_ReadFile = 0xD1,
|
||||
DSMSG_OpenFile = 0xD2,
|
||||
DSMSG_CloseFile = 0xD3,
|
||||
DSMSG_PositionFile = 0xD4,
|
||||
|
||||
DSMSG_ReplyNAK = 0xFF,
|
||||
} MessageCommandID;
|
||||
|
||||
// Register commands.
|
||||
typedef enum {
|
||||
DSREG_Default = 0,
|
||||
DSREG_FP = 1,
|
||||
DSREG_Extended1 = 2,
|
||||
DSREG_Extended2 = 3,
|
||||
} DSMessageRegisterOptions;
|
||||
|
||||
// Step commands.
|
||||
typedef enum {
|
||||
DSSTEP_IntoCount = 0x0,
|
||||
DSSTEP_IntoRange = 0x1,
|
||||
DSSTEP_OverCount = 0x10,
|
||||
DSSTEP_OverRange = 0x11,
|
||||
} DSMessageStepOptions;
|
||||
|
||||
typedef enum {
|
||||
DSREPLY_NoError = 0x0,
|
||||
DSREPLY_Error = 0x1,
|
||||
DSREPLY_PacketSizeError = 0x2,
|
||||
DSREPLY_CWDSError = 0x3,
|
||||
DSREPLY_EscapeError = 0x4,
|
||||
DSREPLY_BadFCS = 0x5,
|
||||
DSREPLY_Overflow = 0x6,
|
||||
DSREPLY_SequenceMissing = 0x7,
|
||||
|
||||
DSREPLY_UnsupportedCommandError = 0x10,
|
||||
DSREPLY_ParameterError = 0x11,
|
||||
DSREPLY_UnsupportedOptionError = 0x12,
|
||||
DSREPLY_InvalidMemoryRange = 0x13,
|
||||
DSREPLY_InvalidRegisterRange = 0x14,
|
||||
DSREPLY_CWDSException = 0x15,
|
||||
DSREPLY_NotStopped = 0x16,
|
||||
DSREPLY_BreakpointsFull = 0x17,
|
||||
DSREPLY_BreakpointConflict = 0x18,
|
||||
|
||||
DSREPLY_OSError = 0x20,
|
||||
DSREPLY_InvalidProcessID = 0x21,
|
||||
DSREPLY_InvalidThreadID = 0x22,
|
||||
DSREPLY_DebugSecurityError = 0x23,
|
||||
} DSReplyError;
|
||||
|
||||
typedef enum {
|
||||
DSRECV_Wait = 0,
|
||||
DSRECV_Found = 1,
|
||||
DSRECV_InFrame = 2,
|
||||
DSRECV_FrameOverflow = 3,
|
||||
} ReceiverState;
|
||||
|
||||
typedef enum {
|
||||
DSMSGMEMORY_Segmented = 0x01, /* non-flat addr space */
|
||||
DSMSGMEMORY_Extended = 0x02, /* > 32-bit data addr */
|
||||
DSMSGMEMORY_Protected = 0x04, /* non-user memory */
|
||||
DSMSGMEMORY_Userview = 0x08, /* breakpoints are invisible */
|
||||
DSMSGMEMORY_Space_program = 0x00,
|
||||
DSMSGMEMORY_Space_data = 0x40,
|
||||
DSMSGMEMORY_Space_io = 0x80
|
||||
};
|
||||
|
||||
typedef enum {
|
||||
NUBEVENT_Null = 0,
|
||||
NUBEVENT_Shutdown = 1,
|
||||
NUBEVENT_Request = 2,
|
||||
NUBEVENT_Breakpoint = 3,
|
||||
NUBEVENT_Exception = 4,
|
||||
NUBEVENT_Support = 5,
|
||||
} NubEventType;
|
||||
|
||||
typedef enum {
|
||||
VALIDMEM_Readable = 0,
|
||||
VALIDMEM_Writeable = 1,
|
||||
} ValidMemoryOptions;
|
||||
|
||||
typedef enum {
|
||||
MEMACCESS_UserMemory = 0,
|
||||
MEMACCESS_DebuggerMemory = 1,
|
||||
} MemoryAccessOptions;
|
||||
|
||||
typedef enum {
|
||||
UART_NoError = 0,
|
||||
UART_UnknownBaudRate = 1,
|
||||
UART_ConfigurationError = 2,
|
||||
UART_BufferOverflow = 3, // specified buffer was too small
|
||||
UART_NoData = 4, // no data available from polling
|
||||
} UARTErrorOptions;
|
||||
|
||||
typedef enum {
|
||||
kBaudHWSet = -1, // use HW settings such as DIP switches
|
||||
kBaud300 = 300, // valid baud rates
|
||||
kBaud600 = 600,
|
||||
kBaud1200 = 1200,
|
||||
kBaud1800 = 1800,
|
||||
kBaud2000 = 2000,
|
||||
kBaud2400 = 2400,
|
||||
kBaud3600 = 3600,
|
||||
kBaud4800 = 4800,
|
||||
kBaud7200 = 7200,
|
||||
kBaud9600 = 9600,
|
||||
kBaud19200 = 19200,
|
||||
kBaud38400 = 38400,
|
||||
kBaud57600 = 57600,
|
||||
kBaud115200 = 115200,
|
||||
kBaud230400 = 230400
|
||||
} UARTBaudRate;
|
||||
|
||||
////////////////////////////////////
|
||||
|
||||
typedef struct TRKFramingState {
|
||||
MessageBufferID msgBufID; // _00
|
||||
TRKBuffer* buffer; // _04
|
||||
ReceiverState receiveState; // _08
|
||||
BOOL isEscape; // _0C
|
||||
u8 fcsType; // _10
|
||||
} TRKFramingState;
|
||||
|
||||
typedef struct CommandReply {
|
||||
u32 _00; // _00
|
||||
union {
|
||||
u8 b;
|
||||
MessageCommandID m;
|
||||
} commandID; // _04, use MessageCommandID enum
|
||||
union {
|
||||
u8 b;
|
||||
DSReplyError r;
|
||||
} replyError; // _08, use DSReplyError enum - should be enum type? check size.
|
||||
u32 _0C; // _0C
|
||||
u8 _10[0x30]; // _10, unknown
|
||||
} CommandReply;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __METROTRK_TRK_H__ */
|
||||
|
|
@ -1,159 +1,150 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: GCN/EXI2_DDH_GCN/main
|
||||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/GCN/EXI2_DDH_GCN/main.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/CircleBuffer.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
#include "amcstubs/AmcExi2Stubs.h"
|
||||
#include "dol2asm.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
#define DDH_ERR_NOT_INITIALIZED -0x2711
|
||||
#define DDH_ERR_ALREADY_INITIALIZED -0x2715
|
||||
#define DDH_ERR_READ_ERROR -0x2719
|
||||
|
||||
int ddh_cc_initinterrupts();
|
||||
void ddh_cc_peek();
|
||||
int ddh_cc_post_stop();
|
||||
int ddh_cc_pre_continue();
|
||||
void ddh_cc_write();
|
||||
void ddh_cc_read();
|
||||
u8 ddh_cc_close();
|
||||
s32 ddh_cc_open();
|
||||
u8 ddh_cc_shutdown();
|
||||
void ddh_cc_initialize();
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 8044F830-80450030 07C550 0800+00 1/1 0/0 0/0 .bss gRecvBuf */
|
||||
static u8 gRecvBuf[2048];
|
||||
#define DDH_BUF_SIZE (0x800)
|
||||
|
||||
/* 80450030-80450050 07CD50 001C+04 3/3 0/0 0/0 .bss gRecvCB */
|
||||
static CircleBuffer gRecvCB;
|
||||
|
||||
// copied from pikmin2. should try to find a real fix
|
||||
static makeMainBSSOrderingWork() {
|
||||
u8 buff[0x500];
|
||||
memcpy(buff, gRecvBuf, 0x500);
|
||||
}
|
||||
|
||||
/* 8037235C-80372380 36CC9C 0024+00 0/0 1/1 0/0 .text ddh_cc_initinterrupts */
|
||||
int ddh_cc_initinterrupts() {
|
||||
EXI2_EnableInterrupts();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 80372380-803723F0 36CCC0 0070+00 0/0 1/1 0/0 .text ddh_cc_peek */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void ddh_cc_peek() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/GCN/EXI2_DDH_GCN/main/ddh_cc_peek.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 803723F0-80372414 36CD30 0024+00 0/0 1/1 0/0 .text ddh_cc_post_stop */
|
||||
int ddh_cc_post_stop() {
|
||||
EXI2_Reserve();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 80372414-80372438 36CD54 0024+00 0/0 1/1 0/0 .text ddh_cc_pre_continue */
|
||||
int ddh_cc_pre_continue() {
|
||||
EXI2_Unreserve();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2D10-803A2D24 02F370 0014+00 1/1 0/0 0/0 .rodata @318 */
|
||||
SECTION_RODATA static char const lit_318[] = "cc not initialized\n";
|
||||
COMPILER_STRIP_GATE(0x803A2D10, &lit_318);
|
||||
|
||||
/* 803A2D24-803A2D50 02F384 0029+03 0/1 0/0 0/0 .rodata @319 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_319[] = "cc_write : Output data 0x%08x %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A2D24, &lit_319);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2D50-803A2D6C 02F3B0 001C+00 0/1 0/0 0/0 .rodata @320 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_320[] = "cc_write sending %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A2D50, &lit_320);
|
||||
#pragma pop
|
||||
/* 8044F830-80450030 07C550 0800+00 1/1 0/0 0/0 .bss gRecvBuf */
|
||||
static u8 gRecvBuf[DDH_BUF_SIZE];
|
||||
|
||||
/* 804519C0-804519C8 000EC0 0004+04 3/3 0/0 0/0 .sbss gIsInitialized */
|
||||
static BOOL gIsInitialized;
|
||||
|
||||
/* 80372438-803724F8 36CD78 00C0+00 0/0 1/1 0/0 .text ddh_cc_write */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void ddh_cc_write() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/GCN/EXI2_DDH_GCN/main/ddh_cc_write.s"
|
||||
/* 80372618-803726A0 36CF58 0088+00 0/0 1/1 0/0 .text ddh_cc_initialize */
|
||||
BOOL ddh_cc_initialize(vu8** inputPendingPtrRef, AmcEXICallback monitorCallback) {
|
||||
MWTRACE(1, "CALLING EXI2_Init\n");
|
||||
EXI2_Init(inputPendingPtrRef, monitorCallback);
|
||||
MWTRACE(1, "DONE CALLING EXI2_Init\n");
|
||||
CircleBufferInitialize(&gRecvCB, gRecvBuf, DDH_BUF_SIZE);
|
||||
return FALSE;
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2D6C-803A2D94 02F3CC 0025+03 1/1 0/0 0/0 .rodata @342 */
|
||||
SECTION_RODATA static char const lit_342[] = "Expected packet size : 0x%08x (%ld)\n";
|
||||
COMPILER_STRIP_GATE(0x803A2D6C, &lit_342);
|
||||
|
||||
/* 803A2D94-803A2DC4 02F3F4 002D+03 1/1 0/0 0/0 .rodata @343 */
|
||||
SECTION_RODATA static char const lit_343[] = "cc_read : error reading bytes from EXI2 %ld\n";
|
||||
COMPILER_STRIP_GATE(0x803A2D94, &lit_343);
|
||||
|
||||
/* 803724F8-803725E4 36CE38 00EC+00 0/0 1/1 0/0 .text ddh_cc_read */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void ddh_cc_read() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/GCN/EXI2_DDH_GCN/main/ddh_cc_read.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 803725E4-803725EC 36CF24 0008+00 0/0 1/1 0/0 .text ddh_cc_close */
|
||||
u8 ddh_cc_close() {
|
||||
return 0;
|
||||
/* 80372610-80372618 36CF50 0008+00 0/0 1/1 0/0 .text ddh_cc_shutdown */
|
||||
BOOL ddh_cc_shutdown() {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* 803725EC-80372610 36CF2C 0024+00 0/0 1/1 0/0 .text ddh_cc_open */
|
||||
s32 ddh_cc_open() {
|
||||
int ddh_cc_open() {
|
||||
if (gIsInitialized != FALSE) {
|
||||
return -10005;
|
||||
return DDH_ERR_ALREADY_INITIALIZED;
|
||||
}
|
||||
|
||||
gIsInitialized = TRUE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 80372610-80372618 36CF50 0008+00 0/0 1/1 0/0 .text ddh_cc_shutdown */
|
||||
u8 ddh_cc_shutdown() {
|
||||
/* 803725E4-803725EC 36CF24 0008+00 0/0 1/1 0/0 .text ddh_cc_close */
|
||||
BOOL ddh_cc_close() {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* 803724F8-803725E4 36CE38 00EC+00 0/0 1/1 0/0 .text ddh_cc_read */
|
||||
u32 ddh_cc_read(u8* data, u32 size) {
|
||||
u8 buff[DDH_BUF_SIZE];
|
||||
int originalDataSize;
|
||||
u32 result;
|
||||
int expectedDataSize;
|
||||
int poll;
|
||||
|
||||
result = 0;
|
||||
if (!gIsInitialized) {
|
||||
return DDH_ERR_NOT_INITIALIZED;
|
||||
}
|
||||
|
||||
MWTRACE(1, "Expected packet size : 0x%08x (%ld)\n", size, size);
|
||||
|
||||
originalDataSize = expectedDataSize = size;
|
||||
while ((u32)CBGetBytesAvailableForRead(&gRecvCB) < expectedDataSize) {
|
||||
result = 0;
|
||||
|
||||
poll = EXI2_Poll();
|
||||
if (poll != 0) {
|
||||
result = EXI2_ReadN(buff, poll);
|
||||
if (result == 0) {
|
||||
CircleBufferWriteBytes(&gRecvCB, buff, poll);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (result == 0) {
|
||||
CircleBufferReadBytes(&gRecvCB, data, originalDataSize);
|
||||
} else {
|
||||
MWTRACE(8, "cc_read : error reading bytes from EXI2 %ld\n", result);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/* 80372438-803724F8 36CD78 00C0+00 0/0 1/1 0/0 .text ddh_cc_write */
|
||||
int ddh_cc_write(u32 bytes, u32 length) {
|
||||
int exi2Len;
|
||||
int n_copy;
|
||||
u32 hexCopy;
|
||||
|
||||
hexCopy = bytes;
|
||||
n_copy = length;
|
||||
|
||||
if (gIsInitialized == FALSE) {
|
||||
MWTRACE(8, "cc not initialized\n");
|
||||
return DDH_ERR_NOT_INITIALIZED;
|
||||
}
|
||||
|
||||
MWTRACE(8, "cc_write : Output data 0x%08x %ld bytes\n", bytes, length);
|
||||
|
||||
while (n_copy > 0) {
|
||||
MWTRACE(1, "cc_write sending %ld bytes\n", n_copy);
|
||||
exi2Len = EXI2_WriteN((const void*)hexCopy, n_copy);
|
||||
if (exi2Len == AMC_EXI_NO_ERROR) {
|
||||
break;
|
||||
}
|
||||
hexCopy += exi2Len;
|
||||
n_copy -= exi2Len;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2DC4-803A2DD8 02F424 0013+01 1/1 0/0 0/0 .rodata @349 */
|
||||
SECTION_RODATA static char const lit_349[] = "CALLING EXI2_Init\n";
|
||||
COMPILER_STRIP_GATE(0x803A2DC4, &lit_349);
|
||||
|
||||
/* 803A2DD8-803A2DF0 02F438 0018+00 1/1 0/0 0/0 .rodata @350 */
|
||||
SECTION_RODATA static char const lit_350[] = "DONE CALLING EXI2_Init\n";
|
||||
COMPILER_STRIP_GATE(0x803A2DD8, &lit_350);
|
||||
|
||||
/* 80372618-803726A0 36CF58 0088+00 0/0 1/1 0/0 .text ddh_cc_initialize */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void ddh_cc_initialize() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/GCN/EXI2_DDH_GCN/main/ddh_cc_initialize.s"
|
||||
/* 80372414-80372438 36CD54 0024+00 0/0 1/1 0/0 .text ddh_cc_pre_continue */
|
||||
BOOL ddh_cc_pre_continue() {
|
||||
EXI2_Unreserve();
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* 803723F0-80372414 36CD30 0024+00 0/0 1/1 0/0 .text ddh_cc_post_stop */
|
||||
BOOL ddh_cc_post_stop() {
|
||||
EXI2_Reserve();
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* 80372380-803723F0 36CCC0 0070+00 0/0 1/1 0/0 .text ddh_cc_peek */
|
||||
int ddh_cc_peek() {
|
||||
int poll;
|
||||
u8 buff[DDH_BUF_SIZE];
|
||||
|
||||
poll = EXI2_Poll();
|
||||
if (poll <= 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (EXI2_ReadN(buff, poll) == 0) {
|
||||
CircleBufferWriteBytes(&gRecvCB, buff, poll);
|
||||
} else {
|
||||
return DDH_ERR_READ_ERROR;
|
||||
}
|
||||
|
||||
return poll;
|
||||
}
|
||||
|
||||
/* 8037235C-80372380 36CC9C 0024+00 0/0 1/1 0/0 .text ddh_cc_initinterrupts */
|
||||
BOOL ddh_cc_initinterrupts() {
|
||||
EXI2_EnableInterrupts();
|
||||
return FALSE;
|
||||
}
|
||||
#pragma pop
|
||||
|
|
|
|||
|
|
@ -1,170 +1,145 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: GCN/EXI2_GDEV_GCN/main
|
||||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/GCN/EXI2_GDEV_GCN/main.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/CircleBuffer.h"
|
||||
#include "dol2asm.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
#include "dolphin/db/db.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
|
||||
u8 gdev_cc_initinterrupts();
|
||||
void gdev_cc_peek();
|
||||
u8 gdev_cc_post_stop();
|
||||
u8 gdev_cc_pre_continue();
|
||||
void gdev_cc_write();
|
||||
void gdev_cc_read();
|
||||
u8 gdev_cc_close();
|
||||
s32 gdev_cc_open();
|
||||
u8 gdev_cc_shutdown();
|
||||
void gdev_cc_initialize();
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
void MWTRACE();
|
||||
void DBClose();
|
||||
void DBOpen();
|
||||
void DBWrite();
|
||||
int DBRead();
|
||||
int DBQueryData();
|
||||
void DBInitInterrupts();
|
||||
void DBInitComm();
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 80450050-80450550 07CD70 0500+00 1/1 0/0 0/0 .bss gRecvBuf */
|
||||
static u8 gRecvBuf[1280];
|
||||
#define GDEV_BUF_SIZE (0x500)
|
||||
|
||||
/* 80450550-8045056C 07D270 001C+00 3/3 0/0 0/0 .bss gRecvCB */
|
||||
static CircleBuffer gRecvCB;
|
||||
|
||||
// copied from pikmin2. should try to find a real fix
|
||||
static makeMainBSSOrderingWork() {
|
||||
u8 buff[0x500];
|
||||
memcpy(buff, gRecvBuf, 0x500);
|
||||
}
|
||||
|
||||
/* 80372908-8037292C 36D248 0024+00 0/0 1/1 0/0 .text gdev_cc_initinterrupts */
|
||||
u8 gdev_cc_initinterrupts() {
|
||||
DBInitInterrupts();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 8037292C-8037299C 36D26C 0070+00 0/0 1/1 0/0 .text gdev_cc_peek */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void gdev_cc_peek() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/GCN/EXI2_GDEV_GCN/main/gdev_cc_peek.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8037299C-803729C0 36D2DC 0024+00 0/0 1/1 0/0 .text gdev_cc_post_stop */
|
||||
u8 gdev_cc_post_stop() {
|
||||
DBOpen();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 803729C0-803729E4 36D300 0024+00 0/0 1/1 0/0 .text gdev_cc_pre_continue */
|
||||
u8 gdev_cc_pre_continue() {
|
||||
DBClose();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2DF0-803A2E04 02F450 0014+00 1/1 0/0 0/0 .rodata @318 */
|
||||
SECTION_RODATA static char const lit_318[] = "cc not initialized\n";
|
||||
COMPILER_STRIP_GATE(0x803A2DF0, &lit_318);
|
||||
|
||||
/* 803A2E04-803A2E30 02F464 0029+03 0/1 0/0 0/0 .rodata @319 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_319[] = "cc_write : Output data 0x%08x %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A2E04, &lit_319);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2E30-803A2E4C 02F490 001C+00 0/1 0/0 0/0 .rodata @320 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static u8 const lit_320[] = "cc_write sending %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A2E30, &lit_320);
|
||||
#pragma pop
|
||||
/* 80450050-80450550 07CD70 0500+00 1/1 0/0 0/0 .bss gRecvBuf */
|
||||
static u8 gRecvBuf[GDEV_BUF_SIZE];
|
||||
|
||||
/* 804519C8-804519D0 000EC8 0004+04 3/3 0/0 0/0 .sbss gIsInitialized */
|
||||
static BOOL gIsInitialized;
|
||||
|
||||
/* 803729E4-80372AA4 36D324 00C0+00 0/0 1/1 0/0 .text gdev_cc_write */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void gdev_cc_write() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/GCN/EXI2_GDEV_GCN/main/gdev_cc_write.s"
|
||||
/* 80372BCC-80372C54 36D50C 0088+00 0/0 1/1 0/0 .text gdev_cc_initialize */
|
||||
BOOL gdev_cc_initialize(vu8** inputPendingPtrRef, AmcEXICallback monitorCallback) {
|
||||
MWTRACE(1, "CALLING EXI2_Init\n");
|
||||
DBInitComm(inputPendingPtrRef, monitorCallback);
|
||||
MWTRACE(1, "DONE CALLING EXI2_Init\n");
|
||||
CircleBufferInitialize(&gRecvCB, gRecvBuf, GDEV_BUF_SIZE);
|
||||
return FALSE;
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2E4C-803A2E74 02F4AC 0025+03 1/1 0/0 0/0 .rodata @341 */
|
||||
SECTION_RODATA static char const lit_341[] = "Expected packet size : 0x%08x (%ld)\n";
|
||||
COMPILER_STRIP_GATE(0x803A2E4C, &lit_341);
|
||||
|
||||
/* 803A2E74-803A2EA4 02F4D4 002D+03 1/1 0/0 0/0 .rodata @342 */
|
||||
SECTION_RODATA static char const lit_342[] = "cc_read : error reading bytes from EXI2 %ld\n";
|
||||
COMPILER_STRIP_GATE(0x803A2E74, &lit_342);
|
||||
|
||||
/* 80372AA4-80372B98 36D3E4 00F4+00 0/0 1/1 0/0 .text gdev_cc_read */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void gdev_cc_read() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/GCN/EXI2_GDEV_GCN/main/gdev_cc_read.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 80372B98-80372BA0 36D4D8 0008+00 0/0 1/1 0/0 .text gdev_cc_close */
|
||||
u8 gdev_cc_close() {
|
||||
return 0;
|
||||
/* 80372BC4-80372BCC 36D504 0008+00 0/0 1/1 0/0 .text gdev_cc_shutdown */
|
||||
BOOL gdev_cc_shutdown() {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* 80372BA0-80372BC4 36D4E0 0024+00 0/0 1/1 0/0 .text gdev_cc_open */
|
||||
s32 gdev_cc_open() {
|
||||
int gdev_cc_open() {
|
||||
if (gIsInitialized != FALSE) {
|
||||
return -10005;
|
||||
}
|
||||
|
||||
gIsInitialized = TRUE;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 80372BC4-80372BCC 36D504 0008+00 0/0 1/1 0/0 .text gdev_cc_shutdown */
|
||||
u8 gdev_cc_shutdown() {
|
||||
/* 80372B98-80372BA0 36D4D8 0008+00 0/0 1/1 0/0 .text gdev_cc_close */
|
||||
BOOL gdev_cc_close() {
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* 80372AA4-80372B98 36D3E4 00F4+00 0/0 1/1 0/0 .text gdev_cc_read */
|
||||
u32 gdev_cc_read(u8* data, u32 size) {
|
||||
u8 buff[GDEV_BUF_SIZE];
|
||||
int p1;
|
||||
u32 retval;
|
||||
int p2;
|
||||
int poll;
|
||||
retval = 0;
|
||||
if (!gIsInitialized) {
|
||||
return -0x2711;
|
||||
}
|
||||
|
||||
MWTRACE(1, "Expected packet size : 0x%08x (%ld)\n", size, size);
|
||||
|
||||
p1 = size;
|
||||
p2 = size;
|
||||
while ((u32)CBGetBytesAvailableForRead(&gRecvCB) < p2) {
|
||||
retval = 0;
|
||||
poll = DBQueryData();
|
||||
if (poll != 0) {
|
||||
retval = DBRead(buff, p2);
|
||||
if (retval == 0) {
|
||||
CircleBufferWriteBytes(&gRecvCB, buff, poll);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (retval == 0) {
|
||||
CircleBufferReadBytes(&gRecvCB, data, p1);
|
||||
} else {
|
||||
MWTRACE(8, "cc_read : error reading bytes from EXI2 %ld\n", retval);
|
||||
}
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* 803729E4-80372AA4 36D324 00C0+00 0/0 1/1 0/0 .text gdev_cc_write */
|
||||
int gdev_cc_write(int bytes, int length) {
|
||||
int exi2Len;
|
||||
int n_copy;
|
||||
u32 hexCopy;
|
||||
|
||||
hexCopy = bytes;
|
||||
n_copy = length;
|
||||
|
||||
if (gIsInitialized == FALSE) {
|
||||
MWTRACE(8, "cc not initialized\n");
|
||||
return -0x2711;
|
||||
}
|
||||
|
||||
MWTRACE(8, "cc_write : Output data 0x%08x %ld bytes\n", bytes, length);
|
||||
|
||||
while (n_copy > 0) {
|
||||
MWTRACE(1, "cc_write sending %ld bytes\n", n_copy);
|
||||
exi2Len = DBWrite((const void*)hexCopy, n_copy);
|
||||
if (exi2Len == AMC_EXI_NO_ERROR) {
|
||||
break;
|
||||
}
|
||||
hexCopy += exi2Len;
|
||||
n_copy -= exi2Len;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2EA4-803A2EB8 02F504 0013+01 1/1 0/0 0/0 .rodata @348 */
|
||||
SECTION_RODATA static char const lit_348[] = "CALLING EXI2_Init\n";
|
||||
COMPILER_STRIP_GATE(0x803A2EA4, &lit_348);
|
||||
|
||||
/* 803A2EB8-803A2ED0 02F518 0018+00 1/1 0/0 0/0 .rodata @349 */
|
||||
SECTION_RODATA static char const lit_349[] = "DONE CALLING EXI2_Init\n";
|
||||
COMPILER_STRIP_GATE(0x803A2EB8, &lit_349);
|
||||
|
||||
/* 80372BCC-80372C54 36D50C 0088+00 0/0 1/1 0/0 .text gdev_cc_initialize */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void gdev_cc_initialize() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/GCN/EXI2_GDEV_GCN/main/gdev_cc_initialize.s"
|
||||
/* 803729C0-803729E4 36D300 0024+00 0/0 1/1 0/0 .text gdev_cc_pre_continue */
|
||||
BOOL gdev_cc_pre_continue() {
|
||||
DBClose();
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* 8037299C-803729C0 36D2DC 0024+00 0/0 1/1 0/0 .text gdev_cc_post_stop */
|
||||
BOOL gdev_cc_post_stop() {
|
||||
DBOpen();
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/* 8037292C-8037299C 36D26C 0070+00 0/0 1/1 0/0 .text gdev_cc_peek */
|
||||
int gdev_cc_peek() {
|
||||
int poll;
|
||||
u8 buff[GDEV_BUF_SIZE];
|
||||
|
||||
poll = DBQueryData();
|
||||
if (poll <= 0) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (DBRead(buff, poll) == 0) {
|
||||
CircleBufferWriteBytes(&gRecvCB, buff, poll);
|
||||
} else {
|
||||
return -0x2719;
|
||||
}
|
||||
|
||||
return poll;
|
||||
}
|
||||
|
||||
/* 80372908-8037292C 36D248 0024+00 0/0 1/1 0/0 .text gdev_cc_initinterrupts */
|
||||
BOOL gdev_cc_initinterrupts() {
|
||||
DBInitInterrupts();
|
||||
return FALSE;
|
||||
}
|
||||
#pragma pop
|
||||
|
|
|
|||
|
|
@ -31,7 +31,7 @@ LIBTRK_MINNOW_DOLPHIN_A_CPP_FILES := \
|
|||
libs/TRK_MINNOW_DOLPHIN/utils/common/CircleBuffer.c \
|
||||
libs/TRK_MINNOW_DOLPHIN/GCN/EXI2_GDEV_GCN/main.c \
|
||||
libs/TRK_MINNOW_DOLPHIN/utils/common/MWTrace.c \
|
||||
libs/TRK_MINNOW_DOLPHIN/utils/gc/MWCriticalSection_gc.c \
|
||||
libs/TRK_MINNOW_DOLPHIN/utils/gc/MWCriticalSection_gc.cpp \
|
||||
|
||||
LIBTRK_MINNOW_DOLPHIN_A_O_FILES := \
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/mainloop.o \
|
||||
|
|
@ -67,7 +67,7 @@ LIBTRK_MINNOW_DOLPHIN_A_O_FILES := \
|
|||
LIBTRK_MINNOW_DOLPHIN_A_CFLAGS := \
|
||||
-O4,p \
|
||||
-lang=c \
|
||||
-rostr
|
||||
-rostr \
|
||||
|
||||
LIBTRK_MINNOW_DOLPHIN_A_LDFLAGS := \
|
||||
-nodefaults \
|
||||
|
|
@ -75,7 +75,27 @@ LIBTRK_MINNOW_DOLPHIN_A_LDFLAGS := \
|
|||
-proc gekko \
|
||||
-linkmode moreram \
|
||||
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/dispatch.o: CFLAGS := -Cpp_exceptions off -proc gekko -fp hard -O4,p -nodefaults -str reuse -RTTI off -maxerrors 5 -enum int $(INCLUDES) -lang=c
|
||||
|
||||
BASE_CFLAGS := -Cpp_exceptions off -proc gekko -fp hard -O4,p -inline deferred -use_lmw_stmw on -nodefaults -str reuse -RTTI off -maxerrors 5 -enum int $(INCLUDES)
|
||||
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/GCN/EXI2_DDH_GCN/main.o: CFLAGS := $(BASE_CFLAGS) -sdata 8
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/GCN/EXI2_GDEV_GCN/main.o: CFLAGS := $(BASE_CFLAGS) -sdata 8
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Export/mslsupp.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/main_TRK.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/mainloop.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/dispatch.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/mutex_TRK.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubinit.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/serpoll.o: CFLAGS := $(BASE_CFLAGS) -sdata 8
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/support.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/Os/dolphin/target_options.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/Os/dolphin/UDP_Stubs.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/Os/dolphin/usr_put.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/utils/common/CircleBuffer.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
$(BUILD_DIR)/libs/TRK_MINNOW_DOLPHIN/utils/gc/MWCriticalSection_gc.o: CFLAGS := $(BASE_CFLAGS) -sdata 0 -sdata2 0
|
||||
|
||||
$(BUILD_DIR)/libTRK_MINNOW_DOLPHIN.a: $(LIBTRK_MINNOW_DOLPHIN_A_O_FILES)
|
||||
@echo linking... $(BUILD_DIR)/libTRK_MINNOW_DOLPHIN.a
|
||||
|
|
|
|||
|
|
@ -1,46 +1,57 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: MetroTRK/Export/mslsupp
|
||||
//
|
||||
#include "trk.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/Os/dolphin/target_options.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/ppc/Export/targsupp.h"
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Export/mslsupp.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
|
||||
void __TRK_write_console();
|
||||
void __read_console();
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
void GetTRKConnected();
|
||||
void TRKAccessFile();
|
||||
void GetUseSerialIO();
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* 8037219C-80372258 36CADC 00BC+00 0/0 1/1 0/0 .text __TRK_write_console */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void __TRK_write_console() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Export/mslsupp/__TRK_write_console.s"
|
||||
}
|
||||
#pragma pop
|
||||
DSIOResult __read_file(u32 handle, u8* buffer, size_t* count, void* ref_con);
|
||||
DSIOResult __write_file(u32 handle, u8* buffer, size_t* count, void* ref_con);
|
||||
DSIOResult __close_file(u32 handle, u8* buffer, size_t* count, void* ref_con);
|
||||
DSIOResult __access_file(u32 handle, u8* buffer, size_t* count, void* ref_con,
|
||||
MessageCommandID cmd);
|
||||
|
||||
/* 80372258-80372314 36CB98 00BC+00 0/0 1/0 0/0 .text __read_console */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void __read_console() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Export/mslsupp/__read_console.s"
|
||||
DSIOResult __read_console(u32 handle, u8* buffer, size_t* count, void* ref_con) {
|
||||
if (GetUseSerialIO() == 0) {
|
||||
return DS_IOError;
|
||||
}
|
||||
return __read_file(DS_Stdin, buffer, count, ref_con);
|
||||
}
|
||||
|
||||
/* 8037219C-80372258 36CADC 00BC+00 0/0 1/1 0/0 .text __TRK_write_console */
|
||||
DSIOResult __TRK_write_console(u32 handle, u8* buffer, size_t* count, void* ref_con) {
|
||||
if (GetUseSerialIO() == 0) {
|
||||
return DS_IOError;
|
||||
}
|
||||
return __write_file(DS_Stdout, buffer, count, ref_con);
|
||||
}
|
||||
|
||||
static inline DSIOResult __read_file(u32 handle, u8* buffer, size_t* count, void* ref_con) {
|
||||
return __access_file(handle, buffer, count, ref_con, DSMSG_ReadFile);
|
||||
}
|
||||
|
||||
static inline DSIOResult __write_file(u32 handle, u8* buffer, size_t* count, void* ref_con) {
|
||||
return __access_file(handle, buffer, count, ref_con, DSMSG_WriteFile);
|
||||
}
|
||||
|
||||
static inline DSIOResult __access_file(u32 handle, u8* buffer, size_t* count, void* ref_con,
|
||||
MessageCommandID cmd) {
|
||||
size_t countTemp;
|
||||
u32 r0;
|
||||
|
||||
if (GetTRKConnected() == DS_NoError) {
|
||||
return DS_IOError;
|
||||
}
|
||||
|
||||
countTemp = *count;
|
||||
r0 = TRKAccessFile(cmd, handle, &countTemp, buffer);
|
||||
*count = countTemp;
|
||||
|
||||
switch ((u8)r0) {
|
||||
case DS_IONoError:
|
||||
return DS_IONoError;
|
||||
case DS_IOEOF:
|
||||
return DS_IOEOF;
|
||||
}
|
||||
|
||||
return DS_IOError;
|
||||
}
|
||||
#pragma pop
|
||||
|
|
|
|||
|
|
@ -3,68 +3,69 @@
|
|||
* Description:
|
||||
*/
|
||||
|
||||
#include "trk.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/dispatch.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
|
||||
/* 8036DB9C-8036DD0C 3684DC 0170+00 1/0 1/1 0/0 .text TRKDispatchMessage */
|
||||
s32 TRKDispatchMessage(TRKBuffer* buffer) {
|
||||
u32 ret;
|
||||
|
||||
ret = 0x500;
|
||||
TRKSetBufferPosition(buffer, 0);
|
||||
MWTRACE(1, "Dispatch command 0x%08x\n", buffer->m_buffer[0]);
|
||||
|
||||
switch (buffer->m_buffer[0]) {
|
||||
case TRK_DISPATCH_CMD_CONNECT:
|
||||
ret = TRKDoConnect(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_DISCONNECT:
|
||||
ret = TRKDoDisconnect(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_RESET:
|
||||
ret = TRKDoReset(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_OVERRIDE:
|
||||
ret = TRKDoOverride(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_GETVERSION:
|
||||
ret = TRKDoVersions(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_GETSUPPORTMASK:
|
||||
ret = TRKDoSupportMask(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_READMEM:
|
||||
ret = TRKDoReadMemory(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_WRITEMEM:
|
||||
ret = TRKDoWriteMemory(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_READREGS:
|
||||
ret = TRKDoReadRegisters(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_WRITEREGS:
|
||||
ret = TRKDoWriteRegisters(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_CONTINUE:
|
||||
ret = TRKDoContinue(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_STEP:
|
||||
ret = TRKDoStep(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_STOP:
|
||||
ret = TRKDoStop(buffer);
|
||||
break;
|
||||
case TRK_DISPATCH_CMD_SETOPTION:
|
||||
ret = TRKDoSetOption(buffer);
|
||||
break;
|
||||
}
|
||||
|
||||
MWTRACE(1, "Dispatch complete err = %ld\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* 8036DD0C-8036DD14 36864C 0008+00 0/0 1/1 0/0 .text TRKInitializeDispatcher */
|
||||
u8 TRKInitializeDispatcher() {
|
||||
return 0;
|
||||
DSError TRKInitializeDispatcher() {
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036DB9C-8036DD0C 3684DC 0170+00 1/0 1/1 0/0 .text TRKDispatchMessage */
|
||||
BOOL TRKDispatchMessage(TRKBuffer* msg) {
|
||||
u32 err;
|
||||
|
||||
err = DS_DispatchError;
|
||||
TRKSetBufferPosition(msg, 0);
|
||||
MWTRACE(1, "Dispatch command 0x%08x\n", msg->data[4]);
|
||||
|
||||
switch (msg->data[4]) {
|
||||
case DSMSG_Connect:
|
||||
err = TRKDoConnect(msg);
|
||||
break;
|
||||
case DSMSG_Disconnect:
|
||||
err = TRKDoDisconnect(msg);
|
||||
break;
|
||||
case DSMSG_Reset:
|
||||
err = TRKDoReset(msg);
|
||||
break;
|
||||
case DSMSG_Override:
|
||||
err = TRKDoOverride(msg);
|
||||
break;
|
||||
case DSMSG_Versions:
|
||||
err = TRKDoVersions(msg);
|
||||
break;
|
||||
case DSMSG_SupportMask:
|
||||
err = TRKDoSupportMask(msg);
|
||||
break;
|
||||
case DSMSG_ReadMemory:
|
||||
err = TRKDoReadMemory(msg);
|
||||
break;
|
||||
case DSMSG_WriteMemory:
|
||||
err = TRKDoWriteMemory(msg);
|
||||
break;
|
||||
case DSMSG_ReadRegisters:
|
||||
err = TRKDoReadRegisters(msg);
|
||||
break;
|
||||
case DSMSG_WriteRegisters:
|
||||
err = TRKDoWriteRegisters(msg);
|
||||
break;
|
||||
case DSMSG_Continue:
|
||||
err = TRKDoContinue(msg);
|
||||
break;
|
||||
case DSMSG_Step:
|
||||
err = TRKDoStep(msg);
|
||||
break;
|
||||
case DSMSG_Stop:
|
||||
err = TRKDoStop(msg);
|
||||
break;
|
||||
case DSMSG_SetOption:
|
||||
err = TRKDoSetOption(msg);
|
||||
break;
|
||||
}
|
||||
MWTRACE(1, "Dispatch complete err = %ld\n", err);
|
||||
return err;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,18 +4,19 @@
|
|||
*/
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/main_TRK.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubinit.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
#include "dol2asm.h"
|
||||
#include "trk.h"
|
||||
|
||||
/* 8044F818-8044F820 07C538 0004+04 1/1 0/0 0/0 .bss TRK_mainError */
|
||||
SECTION_BSS static s32 TRK_mainError;
|
||||
static DSError TRK_mainError;
|
||||
|
||||
/* 80371B9C-80371BF4 36C4DC 0058+00 0/0 2/2 0/0 .text TRK_main */
|
||||
s32 TRK_main(void) {
|
||||
DSError TRK_main(void) {
|
||||
MWTRACE(1, "TRK_Main \n");
|
||||
TRK_mainError = TRKInitializeNub();
|
||||
|
||||
if (!TRK_mainError) {
|
||||
|
||||
if (TRK_mainError == DS_NoError) {
|
||||
TRKNubWelcome();
|
||||
TRKNubMainLoop();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,36 +1,59 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: MetroTRK/Portable/mainloop
|
||||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/mainloop.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
void TRKDestructEvent();
|
||||
void TRKGetNextEvent();
|
||||
void TRKGetBuffer();
|
||||
void TRKGetInput();
|
||||
void TRKDispatchMessage();
|
||||
void TRKTargetStopped();
|
||||
void TRKTargetSupportRequest();
|
||||
void TRKTargetInterrupt();
|
||||
void TRKTargetContinue();
|
||||
extern u8 gTRKInputPendingPtr[4 + 4 /* padding */];
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/dispatch.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/serpoll.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/Os/dolphin/targcont.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl.h"
|
||||
#include "trk.h"
|
||||
|
||||
/* 8036CB20-8036CC18 367460 00F8+00 0/0 1/1 0/0 .text TRKNubMainLoop */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKNubMainLoop(void) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/mainloop/TRKNubMainLoop.s"
|
||||
void TRKNubMainLoop(void) {
|
||||
void* msg;
|
||||
TRKEvent event;
|
||||
BOOL isShutdownRequested;
|
||||
BOOL isNewInput;
|
||||
|
||||
isShutdownRequested = FALSE;
|
||||
isNewInput = FALSE;
|
||||
while (isShutdownRequested == FALSE) {
|
||||
if (TRKGetNextEvent(&event) != FALSE) {
|
||||
isNewInput = FALSE;
|
||||
|
||||
switch (event.eventType) {
|
||||
case NUBEVENT_Null:
|
||||
break;
|
||||
|
||||
case NUBEVENT_Request:
|
||||
msg = TRKGetBuffer(event.msgBufID);
|
||||
TRKDispatchMessage(msg);
|
||||
break;
|
||||
|
||||
case NUBEVENT_Shutdown:
|
||||
isShutdownRequested = TRUE;
|
||||
break;
|
||||
|
||||
case NUBEVENT_Breakpoint:
|
||||
case NUBEVENT_Exception:
|
||||
TRKTargetInterrupt(&event);
|
||||
break;
|
||||
|
||||
case NUBEVENT_Support:
|
||||
TRKTargetSupportRequest();
|
||||
break;
|
||||
}
|
||||
|
||||
TRKDestructEvent(&event);
|
||||
continue;
|
||||
}
|
||||
|
||||
if ((isNewInput == FALSE) || (*(u8*)gTRKInputPendingPtr != '\0')) {
|
||||
isNewInput = TRUE;
|
||||
TRKGetInput();
|
||||
continue;
|
||||
}
|
||||
|
||||
if (TRKTargetStopped() == FALSE) {
|
||||
TRKTargetContinue();
|
||||
}
|
||||
isNewInput = FALSE;
|
||||
}
|
||||
}
|
||||
#pragma pop
|
||||
|
|
|
|||
|
|
@ -5,10 +5,11 @@
|
|||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msg.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
#include "trk.h"
|
||||
|
||||
/* 8036CFD8-8036D01C 367918 0044+00 0/0 6/6 0/0 .text TRKMessageSend */
|
||||
s32 TRKMessageSend(TRK_Msg* msg) {
|
||||
u32 write_val = TRKWriteUARTN(&msg->m_msg, msg->m_msgLength);
|
||||
MWTRACE(1, "MessageSend : cc_write returned %ld\n", write_val);
|
||||
return 0;
|
||||
DSError TRKMessageSend(TRK_Msg* msg) {
|
||||
DSError write_err = TRKWriteUARTN(&msg->m_msg, msg->m_msgLength);
|
||||
MWTRACE(1, "MessageSend : cc_write returned %ld\n", write_err);
|
||||
return DS_NoError;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,7 +20,6 @@ void TRKReadBuffer();
|
|||
void TRKAppendBuffer();
|
||||
void TRKResetBuffer();
|
||||
void TRKReleaseBuffer();
|
||||
void TRKGetBuffer();
|
||||
void TRKGetFreeBuffer();
|
||||
void TRKInitializeMessageBuffers();
|
||||
|
||||
|
|
@ -158,7 +157,7 @@ asm void TRKReleaseBuffer() {
|
|||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKGetBuffer() {
|
||||
asm void* TRKGetBuffer(int) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf/TRKGetBuffer.s"
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,297 +1,26 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: MetroTRK/Portable/msghndlr
|
||||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr.h"
|
||||
#include "dol2asm.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/Os/dolphin/dolphin_trk_glue.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
#include "trk.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
|
||||
void OutputData();
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
SECTION_INIT void memset();
|
||||
SECTION_INIT void __TRK_reset();
|
||||
void TRKConstructEvent();
|
||||
void TRKPostEvent();
|
||||
void TRKMessageSend();
|
||||
void TRKAppendBuffer_ui8();
|
||||
void TRKReadBuffer();
|
||||
void TRKAppendBuffer();
|
||||
void TRKResetBuffer();
|
||||
void usr_puts_serial();
|
||||
void TRKTargetAccessARAM();
|
||||
void TRKTargetStop();
|
||||
void TRKTargetStopped();
|
||||
void TRKTargetGetPC();
|
||||
void TRKTargetStepOutOfRange();
|
||||
void TRKTargetSingleStep();
|
||||
void TRKTargetAccessExtended2();
|
||||
void TRKTargetAccessExtended1();
|
||||
void TRKTargetAccessFP();
|
||||
void TRKTargetAccessDefault();
|
||||
void TRKTargetAccessMemory();
|
||||
void __TRK_copy_vectors();
|
||||
void TRKWriteUARTN();
|
||||
void TRKTargetContinue();
|
||||
void SetUseSerialIO();
|
||||
void MWTRACE();
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A28D0-803A28F0 02EF30 001F+01 4/4 0/0 0/0 .rodata @321 */
|
||||
SECTION_RODATA static char const lit_321[] = "\nMetroTRK Option : SerialIO - ";
|
||||
COMPILER_STRIP_GATE(0x803A28D0, &lit_321);
|
||||
|
||||
/* 803A28F0-803A28F8 02EF50 0008+00 0/1 0/0 0/0 .rodata @322 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_322[] = "Enable\n";
|
||||
COMPILER_STRIP_GATE(0x803A28F0, &lit_322);
|
||||
#pragma pop
|
||||
|
||||
/* 803A28F8-803A2904 02EF58 0009+03 0/1 0/0 0/0 .rodata @323 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_323[] = "Disable\n";
|
||||
COMPILER_STRIP_GATE(0x803A28F8, &lit_323);
|
||||
#pragma pop
|
||||
|
||||
/* 8036DD14-8036DDBC 368654 00A8+00 0/0 1/1 0/0 .text TRKDoSetOption */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoSetOption(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoSetOption.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036DDBC-8036DE64 3686FC 00A8+00 0/0 1/1 0/0 .text TRKDoStop */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoStop(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoStop.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036DE64-8036E084 3687A4 0220+00 0/0 1/1 0/0 .text TRKDoStep */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoStep(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoStep.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2904-803A2910 02EF64 000C+00 1/1 0/0 0/0 .rodata @370 */
|
||||
SECTION_RODATA static char const lit_370[] = "DoContinue\n";
|
||||
COMPILER_STRIP_GATE(0x803A2904, &lit_370);
|
||||
|
||||
/* 8036E084-8036E134 3689C4 00B0+00 0/0 1/1 0/0 .text TRKDoContinue */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoContinue(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoContinue.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2910-803A2930 02EF70 001F+01 0/0 0/0 0/0 .rodata @402 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_402[] = "DoFlushCache unimplemented!!!\n";
|
||||
COMPILER_STRIP_GATE(0x803A2910, &lit_402);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2930-803A2950 02EF90 001F+01 1/4 0/0 0/0 .rodata @403 */
|
||||
SECTION_RODATA static char const lit_403[] = "SendACK : Calling MessageSend\n";
|
||||
COMPILER_STRIP_GATE(0x803A2930, &lit_403);
|
||||
|
||||
/* 803A2950-803A2968 02EFB0 0017+01 1/4 0/0 0/0 .rodata @404 */
|
||||
SECTION_RODATA static char const lit_404[] = "MessageSend err : %ld\n";
|
||||
COMPILER_STRIP_GATE(0x803A2950, &lit_404);
|
||||
|
||||
/* 8036E134-8036E3C4 368A74 0290+00 0/0 1/1 0/0 .text TRKDoWriteRegisters */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoWriteRegisters(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoWriteRegisters.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2968-803A2990 02EFC8 0028+00 0/1 0/0 0/0 .rodata @462 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_462[] = "DoReadRegisters : Buffer length 0x%08x\n";
|
||||
COMPILER_STRIP_GATE(0x803A2968, &lit_462);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2990-803A29C8 02EFF0 0036+02 0/1 0/0 0/0 .rodata @463 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_463[] = "DoReadRegisters : Error reading default regs 0x%08x\n";
|
||||
COMPILER_STRIP_GATE(0x803A2990, &lit_463);
|
||||
#pragma pop
|
||||
|
||||
/* 803A29C8-803A29F0 02F028 0028+00 0/1 0/0 0/0 .rodata @464 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_464[] = "DoReadRegisters : Error FP regs 0x%08x\n";
|
||||
COMPILER_STRIP_GATE(0x803A29C8, &lit_464);
|
||||
#pragma pop
|
||||
|
||||
/* 803A29F0-803A2A20 02F050 002F+01 0/1 0/0 0/0 .rodata @465 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_465[] = "DoReadRegisters : Error extended1 regs 0x%08x\n";
|
||||
COMPILER_STRIP_GATE(0x803A29F0, &lit_465);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2A20-803A2A50 02F080 002F+01 0/1 0/0 0/0 .rodata @466 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_466[] = "DoReadRegisters : Error extended2 regs 0x%08x\n";
|
||||
COMPILER_STRIP_GATE(0x803A2A20, &lit_466);
|
||||
#pragma pop
|
||||
|
||||
/* 8036E3C4-8036E6A4 368D04 02E0+00 0/0 1/1 0/0 .text TRKDoReadRegisters */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoReadRegisters(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoReadRegisters.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2A50-803A2A80 02F0B0 002D+03 0/1 0/0 0/0 .rodata @498 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_498[] = "WriteMemory (0x%02x) : 0x%08x 0x%08x 0x%08x\n";
|
||||
COMPILER_STRIP_GATE(0x803A2A50, &lit_498);
|
||||
#pragma pop
|
||||
|
||||
/* 803D3200-803D321C -00001 001C+00 1/1 0/0 0/0 .data @499 */
|
||||
SECTION_DATA static void* lit_499[7] = {
|
||||
(void*)(((char*)TRKDoWriteMemory) + 0x194), (void*)(((char*)TRKDoWriteMemory) + 0x1B4),
|
||||
(void*)(((char*)TRKDoWriteMemory) + 0x18C), (void*)(((char*)TRKDoWriteMemory) + 0x1B4),
|
||||
(void*)(((char*)TRKDoWriteMemory) + 0x19C), (void*)(((char*)TRKDoWriteMemory) + 0x1A4),
|
||||
(void*)(((char*)TRKDoWriteMemory) + 0x1AC),
|
||||
};
|
||||
|
||||
/* 8036E6A4-8036E8E0 368FE4 023C+00 1/0 1/1 0/0 .text TRKDoWriteMemory */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoWriteMemory(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoWriteMemory.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2A80-803A2AAC 02F0E0 002C+00 0/1 0/0 0/0 .rodata @535 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_535[] = "ReadMemory (0x%02x) : 0x%08x 0x%08x 0x%08x\n";
|
||||
COMPILER_STRIP_GATE(0x803A2A80, &lit_535);
|
||||
#pragma pop
|
||||
|
||||
/* 803D321C-803D3238 -00001 001C+00 1/1 0/0 0/0 .data @536 */
|
||||
SECTION_DATA static void* lit_536[7] = {
|
||||
(void*)(((char*)TRKDoReadMemory) + 0x19C), (void*)(((char*)TRKDoReadMemory) + 0x1BC),
|
||||
(void*)(((char*)TRKDoReadMemory) + 0x194), (void*)(((char*)TRKDoReadMemory) + 0x1BC),
|
||||
(void*)(((char*)TRKDoReadMemory) + 0x1A4), (void*)(((char*)TRKDoReadMemory) + 0x1AC),
|
||||
(void*)(((char*)TRKDoReadMemory) + 0x1B4),
|
||||
};
|
||||
|
||||
/* 8036E8E0-8036EB24 369220 0244+00 1/0 1/1 0/0 .text TRKDoReadMemory */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoReadMemory(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoReadMemory.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036EB24-8036EB2C 369464 0008+00 0/0 1/1 0/0 .text TRKDoSupportMask */
|
||||
s32 TRKDoSupportMask(TRKBuffer*) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 8036EB2C-8036EB34 36946C 0008+00 0/0 1/1 0/0 .text TRKDoVersions */
|
||||
s32 TRKDoVersions(TRKBuffer*) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 8036EB34-8036EB8C 369474 0058+00 0/0 1/1 0/0 .text TRKDoOverride */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoOverride(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoOverride.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036EB8C-8036EBE4 3694CC 0058+00 0/0 1/1 0/0 .text TRKDoReset */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoReset(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoReset.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 8044F288-8044F290 07BFA8 0004+04 4/4 0/0 0/0 .bss IsTRKConnected */
|
||||
SECTION_BSS static BOOL IsTRKConnected;
|
||||
static BOOL IsTRKConnected;
|
||||
|
||||
/* 8036EBE4-8036EC5C 369524 0078+00 0/0 1/1 0/0 .text TRKDoDisconnect */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoDisconnect(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoDisconnect.s"
|
||||
}
|
||||
#pragma pop
|
||||
/* 8036ECDC-8036ED84 36961C 00A8+00 0/0 1/1 0/0 .text OutputData */
|
||||
void OutputData(void* data, int length) {
|
||||
// u8 byte;
|
||||
int i;
|
||||
u8* datapointer = data;
|
||||
|
||||
/* 8036EC5C-8036ECC0 36959C 0064+00 0/0 1/1 0/0 .text TRKDoConnect */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKDoConnect(TRKBuffer*) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/TRKDoConnect.s"
|
||||
}
|
||||
#pragma pop
|
||||
for (i = 0; i < length; i++) {
|
||||
MWTRACE(8, "%02x ", datapointer[i]);
|
||||
if (i % 16 == 15) {
|
||||
MWTRACE(8, "\n");
|
||||
}
|
||||
}
|
||||
|
||||
/* 8036ECC0-8036ECCC 369600 000C+00 0/0 1/1 0/0 .text SetTRKConnected */
|
||||
void SetTRKConnected(BOOL isTRKConnected) {
|
||||
IsTRKConnected = isTRKConnected;
|
||||
MWTRACE(8, "\n");
|
||||
}
|
||||
|
||||
/* 8036ECCC-8036ECDC 36960C 0010+00 0/0 3/3 0/0 .text GetTRKConnected */
|
||||
|
|
@ -299,21 +28,507 @@ BOOL GetTRKConnected(void) {
|
|||
return IsTRKConnected;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2AAC-803A2AB4 02F10C 0006+02 1/1 0/0 0/0 .rodata @573 */
|
||||
SECTION_RODATA static char const lit_573[] = "%02x ";
|
||||
COMPILER_STRIP_GATE(0x803A2AAC, &lit_573);
|
||||
|
||||
/* 803A2AB4-803A2AB8 02F114 0002+02 1/1 0/0 0/0 .rodata @574 */
|
||||
SECTION_RODATA static char const lit_574[] = "\n";
|
||||
COMPILER_STRIP_GATE(0x803A2AB4, &lit_574);
|
||||
|
||||
/* 8036ECDC-8036ED84 36961C 00A8+00 0/0 1/1 0/0 .text OutputData */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void OutputData() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msghndlr/OutputData.s"
|
||||
/* 8036ECC0-8036ECCC 369600 000C+00 0/0 1/1 0/0 .text SetTRKConnected */
|
||||
void SetTRKConnected(BOOL isTRKConnected) {
|
||||
IsTRKConnected = isTRKConnected;
|
||||
}
|
||||
|
||||
inline DSError TRKSendACK(TRKBuffer* buffer) {
|
||||
DSError err;
|
||||
MWTRACE(1, "SendACK : Calling MessageSend\n");
|
||||
err = TRKMessageSend(buffer);
|
||||
MWTRACE(1, "MessageSend err : %ld\n", err);
|
||||
return err;
|
||||
}
|
||||
|
||||
inline DSError TRKStandardACK(TRKBuffer* buffer, MessageCommandID commandID,
|
||||
DSReplyError replyError) {
|
||||
CommandReply reply;
|
||||
|
||||
memset(&reply, 0, sizeof(CommandReply));
|
||||
reply.commandID.b = commandID;
|
||||
reply._00 = 0x40;
|
||||
reply.replyError.b = replyError;
|
||||
TRKWriteUARTN(&reply, sizeof(CommandReply));
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036EC5C-8036ECC0 36959C 0064+00 0/0 1/1 0/0 .text TRKDoConnect */
|
||||
DSError TRKDoConnect(TRKBuffer* buffer) {
|
||||
IsTRKConnected = TRUE;
|
||||
return TRKStandardACK(buffer, 0x80, DSREPLY_NoError);
|
||||
}
|
||||
|
||||
/* 8036EBE4-8036EC5C 369524 0078+00 0/0 1/1 0/0 .text TRKDoDisconnect */
|
||||
DSError TRKDoDisconnect(TRKBuffer* buffer) {
|
||||
TRKEvent event;
|
||||
|
||||
IsTRKConnected = FALSE;
|
||||
TRKStandardACK(buffer, 0x80, DSREPLY_NoError);
|
||||
TRKConstructEvent(&event, 1);
|
||||
TRKPostEvent(&event);
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036EB8C-8036EBE4 3694CC 0058+00 0/0 1/1 0/0 .text TRKDoReset */
|
||||
DSError TRKDoReset(TRKBuffer* buffer) {
|
||||
TRKStandardACK(buffer, 0x80, DSREPLY_NoError);
|
||||
__TRK_reset();
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036EB34-8036EB8C 369474 0058+00 0/0 1/1 0/0 .text TRKDoOverride */
|
||||
DSError TRKDoOverride(TRKBuffer* buffer) {
|
||||
TRKStandardACK(buffer, 0x80, DSREPLY_NoError);
|
||||
__TRK_copy_vectors();
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036EB2C-8036EB34 36946C 0008+00 0/0 1/1 0/0 .text TRKDoVersions */
|
||||
DSError TRKDoVersions(TRKBuffer*) {
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036EB24-8036EB2C 369464 0008+00 0/0 1/1 0/0 .text TRKDoSupportMask */
|
||||
DSError TRKDoSupportMask(TRKBuffer*) {
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036E8E0-8036EB24 369220 0244+00 1/0 1/1 0/0 .text TRKDoReadMemory */
|
||||
DSError TRKDoReadMemory(TRKBuffer* buffer) {
|
||||
u8 buf[0x820] __attribute__((aligned(32)));
|
||||
size_t tempLength;
|
||||
int result;
|
||||
int replyErr;
|
||||
int options;
|
||||
size_t length;
|
||||
u32 start;
|
||||
|
||||
start = *(u32*)(buffer->data + 16);
|
||||
length = *(u16*)(buffer->data + 12);
|
||||
options = buffer->data[8];
|
||||
|
||||
MWTRACE(1, "ReadMemory (0x%02x) : 0x%08x 0x%08x 0x%08x\n", buffer->data[4], start, length,
|
||||
options);
|
||||
|
||||
if (options & DSMSGMEMORY_Extended) {
|
||||
return TRKStandardACK(buffer, DSMSG_ReplyACK, DSREPLY_UnsupportedOptionError);
|
||||
}
|
||||
|
||||
tempLength = length;
|
||||
|
||||
if (options & DSMSGMEMORY_Space_data) {
|
||||
result = TRKTargetAccessARAM(buf, start, &tempLength, TRUE);
|
||||
} else {
|
||||
result = TRKTargetAccessMemory(buf, start, &tempLength,
|
||||
options & DSMSGMEMORY_Userview ? 0 : 1, TRUE);
|
||||
}
|
||||
|
||||
TRKResetBuffer(buffer, 0);
|
||||
|
||||
if (result == DS_NoError) {
|
||||
CommandReply reply;
|
||||
memset(&reply, 0, sizeof(CommandReply));
|
||||
reply.replyError.b = result;
|
||||
reply._00 = tempLength + 0x40;
|
||||
reply.commandID.b = DSMSG_ReplyACK;
|
||||
TRKAppendBuffer(buffer, &reply, sizeof(CommandReply));
|
||||
|
||||
if (options & 0x40) {
|
||||
result = TRKAppendBuffer(buffer, buf + (start & 0x1F), tempLength);
|
||||
} else {
|
||||
result = TRKAppendBuffer(buffer, buf, tempLength);
|
||||
}
|
||||
}
|
||||
|
||||
if (result) {
|
||||
switch (result) {
|
||||
case DS_CWDSException:
|
||||
replyErr = DSREPLY_CWDSException;
|
||||
break;
|
||||
case DS_InvalidMemory:
|
||||
replyErr = DSREPLY_InvalidMemoryRange;
|
||||
break;
|
||||
case DS_InvalidProcessID:
|
||||
replyErr = DSREPLY_InvalidProcessID;
|
||||
break;
|
||||
case DS_InvalidThreadID:
|
||||
replyErr = DSREPLY_InvalidThreadID;
|
||||
break;
|
||||
case DS_OSError:
|
||||
replyErr = DSREPLY_OSError;
|
||||
break;
|
||||
default:
|
||||
replyErr = DSREPLY_CWDSError;
|
||||
break;
|
||||
}
|
||||
return TRKStandardACK(buffer, DSMSG_ReplyACK, replyErr);
|
||||
}
|
||||
|
||||
return TRKSendACK(buffer);
|
||||
}
|
||||
|
||||
/* 8036E6A4-8036E8E0 368FE4 023C+00 1/0 1/1 0/0 .text TRKDoWriteMemory */
|
||||
DSError TRKDoWriteMemory(TRKBuffer* b) {
|
||||
u8 buf[0x820] __attribute__((aligned(32)));
|
||||
size_t tempLength;
|
||||
int options;
|
||||
int result;
|
||||
int replyErr;
|
||||
size_t length;
|
||||
u32 start;
|
||||
|
||||
start = *(u32*)(&b->data[16]);
|
||||
length = *(u16*)(&b->data[12]);
|
||||
options = b->data[8];
|
||||
|
||||
MWTRACE(1, "WriteMemory (0x%02x) : 0x%08x 0x%08x 0x%08x\n", (unsigned int)b->data[0x4], start,
|
||||
length, options);
|
||||
|
||||
if (options & DSMSGMEMORY_Extended) {
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, DSMSG_ReadRegisters);
|
||||
}
|
||||
|
||||
tempLength = length;
|
||||
|
||||
TRKSetBufferPosition(b, DSMSGMEMORY_Space_data);
|
||||
if (options & DSMSGMEMORY_Space_data) {
|
||||
TRKReadBuffer(b, buf + (start & 0x1f), tempLength);
|
||||
result = TRKTargetAccessARAM(buf, start, &tempLength, FALSE);
|
||||
} else {
|
||||
TRKReadBuffer(b, buf, tempLength);
|
||||
result = TRKTargetAccessMemory(buf, start, &tempLength,
|
||||
options & DSMSGMEMORY_Userview ? 0 : 1, FALSE);
|
||||
}
|
||||
|
||||
TRKResetBuffer(b, 0);
|
||||
|
||||
if (result == DS_NoError) {
|
||||
CommandReply reply;
|
||||
memset(&reply, 0, sizeof(CommandReply));
|
||||
reply._00 = 0x40;
|
||||
reply.commandID.b = DSMSG_ReplyACK;
|
||||
reply.replyError.b = result;
|
||||
result = TRKAppendBuffer(b, &reply, sizeof(CommandReply));
|
||||
}
|
||||
|
||||
if (result != DS_NoError) {
|
||||
switch (result) {
|
||||
case DS_CWDSException:
|
||||
replyErr = DSREPLY_CWDSException;
|
||||
break;
|
||||
case DS_InvalidMemory:
|
||||
replyErr = DSREPLY_InvalidMemoryRange;
|
||||
break;
|
||||
case DS_InvalidProcessID:
|
||||
replyErr = DSREPLY_InvalidProcessID;
|
||||
break;
|
||||
case DS_InvalidThreadID:
|
||||
replyErr = DSREPLY_InvalidThreadID;
|
||||
break;
|
||||
case DS_OSError:
|
||||
replyErr = DSREPLY_OSError;
|
||||
break;
|
||||
default:
|
||||
replyErr = DSREPLY_CWDSError;
|
||||
break;
|
||||
}
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, replyErr);
|
||||
}
|
||||
|
||||
return TRKSendACK(b);
|
||||
}
|
||||
|
||||
/* 8036E3C4-8036E6A4 368D04 02E0+00 0/0 1/1 0/0 .text TRKDoReadRegisters */
|
||||
DSError TRKDoReadRegisters(TRKBuffer* b) {
|
||||
int error;
|
||||
u8 options;
|
||||
u16 firstRegister;
|
||||
u16 lastRegister;
|
||||
size_t registersLength;
|
||||
CommandReply local_50;
|
||||
|
||||
options = b->data[8];
|
||||
firstRegister = *(u16*)(b->data + 12);
|
||||
lastRegister = *(u16*)(b->data + 16);
|
||||
|
||||
if (firstRegister > lastRegister) {
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, DSREPLY_InvalidRegisterRange);
|
||||
}
|
||||
|
||||
local_50.commandID.b = DSMSG_ReplyACK;
|
||||
local_50._00 = 0x468;
|
||||
|
||||
TRKResetBuffer(b, 0);
|
||||
MWTRACE(4, "DoReadRegisters : Buffer length 0x%08x\n", b->length);
|
||||
|
||||
TRKAppendBuffer_ui8(b, (u8*)&local_50, sizeof(CommandReply));
|
||||
MWTRACE(4, "DoReadRegisters : Buffer length 0x%08x\n", b->length);
|
||||
|
||||
error = TRKTargetAccessDefault(0, 36, b, ®istersLength, TRUE);
|
||||
MWTRACE(4, "DoReadRegisters : Error reading default regs 0x%08x\n", error);
|
||||
MWTRACE(4, "DoReadRegisters : Buffer length 0x%08x\n", b->length);
|
||||
|
||||
if (error == DS_NoError) {
|
||||
error = TRKTargetAccessFP(0, 33, b, ®istersLength, TRUE);
|
||||
}
|
||||
MWTRACE(4, "DoReadRegisters : Error FP regs 0x%08x\n", error);
|
||||
MWTRACE(4, "DoReadRegisters : Buffer length 0x%08x\n", b->length);
|
||||
if (error == DS_NoError) {
|
||||
error = TRKTargetAccessExtended1(0, 0x60, b, ®istersLength, TRUE);
|
||||
}
|
||||
MWTRACE(4, "DoReadRegisters : Error extended1 regs 0x%08x\n", error);
|
||||
MWTRACE(4, "DoReadRegisters : Buffer length 0x%08x\n", b->length);
|
||||
if (error == DS_NoError) {
|
||||
error = TRKTargetAccessExtended2(0, 31, b, ®istersLength, TRUE);
|
||||
}
|
||||
MWTRACE(4, "DoReadRegisters : Error extended2 regs 0x%08x\n", error);
|
||||
MWTRACE(4, "DoReadRegisters : Buffer length 0x%08x\n", b->length);
|
||||
|
||||
// Check if there was an error, and respond accordingly
|
||||
if (error != DS_NoError) {
|
||||
int replyError;
|
||||
switch (error) {
|
||||
case DS_UnsupportedError:
|
||||
replyError = DSREPLY_UnsupportedOptionError;
|
||||
break;
|
||||
case DS_InvalidRegister:
|
||||
replyError = DSREPLY_InvalidRegisterRange;
|
||||
break;
|
||||
case DS_CWDSException:
|
||||
replyError = DSREPLY_CWDSException;
|
||||
break;
|
||||
case DS_InvalidProcessID:
|
||||
replyError = DSREPLY_InvalidProcessID;
|
||||
break;
|
||||
case DS_InvalidThreadID:
|
||||
replyError = DSREPLY_InvalidThreadID;
|
||||
break;
|
||||
case DS_OSError:
|
||||
replyError = DSREPLY_OSError;
|
||||
break;
|
||||
default:
|
||||
replyError = DSREPLY_CWDSError;
|
||||
}
|
||||
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, replyError);
|
||||
} else {
|
||||
// No error, send ack
|
||||
return TRKSendACK(b);
|
||||
}
|
||||
}
|
||||
|
||||
/* 8036E134-8036E3C4 368A74 0290+00 0/0 1/1 0/0 .text TRKDoWriteRegisters */
|
||||
DSError TRKDoWriteRegisters(TRKBuffer* b) {
|
||||
int error;
|
||||
int replyError;
|
||||
u8 options;
|
||||
u16 firstRegister;
|
||||
u16 lastRegister;
|
||||
size_t registersLength;
|
||||
|
||||
options = b->data[8];
|
||||
firstRegister = *(u16*)(b->data + 12);
|
||||
lastRegister = *(u16*)(b->data + 16);
|
||||
|
||||
TRKSetBufferPosition(b, 0);
|
||||
|
||||
if (firstRegister > lastRegister) {
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, DSREPLY_InvalidRegisterRange);
|
||||
}
|
||||
|
||||
TRKSetBufferPosition(b, 0x40);
|
||||
|
||||
switch (options) {
|
||||
case DSREG_Default:
|
||||
error = TRKTargetAccessDefault(firstRegister, lastRegister, b, ®istersLength, FALSE);
|
||||
break;
|
||||
case DSREG_FP:
|
||||
error = TRKTargetAccessFP(firstRegister, lastRegister, b, ®istersLength, FALSE);
|
||||
break;
|
||||
case DSREG_Extended1:
|
||||
error = TRKTargetAccessExtended1(firstRegister, lastRegister, b, ®istersLength, FALSE);
|
||||
break;
|
||||
case DSREG_Extended2:
|
||||
error = TRKTargetAccessExtended2(firstRegister, lastRegister, b, ®istersLength, FALSE);
|
||||
break;
|
||||
default:
|
||||
// invalid option
|
||||
error = DS_UnsupportedError;
|
||||
break;
|
||||
}
|
||||
|
||||
TRKResetBuffer(b, 0);
|
||||
|
||||
if (error == DS_NoError) {
|
||||
CommandReply local_50;
|
||||
memset(&local_50, 0, sizeof(CommandReply));
|
||||
local_50._00 = 0x40;
|
||||
local_50.commandID.b = DSMSG_ReplyACK;
|
||||
local_50.replyError.b = error;
|
||||
error = TRKAppendBuffer(b, (u8*)&local_50, sizeof(CommandReply));
|
||||
}
|
||||
|
||||
// Check if there was an error, and respond accordingly
|
||||
if (error != DS_NoError) {
|
||||
switch (error) {
|
||||
case DS_UnsupportedError:
|
||||
replyError = DSREPLY_UnsupportedOptionError;
|
||||
break;
|
||||
case DS_InvalidRegister:
|
||||
replyError = DSREPLY_InvalidRegisterRange;
|
||||
break;
|
||||
case DS_MessageBufferReadError:
|
||||
replyError = DSREPLY_PacketSizeError;
|
||||
break;
|
||||
case DS_CWDSException:
|
||||
replyError = DSREPLY_CWDSException;
|
||||
break;
|
||||
case DS_InvalidProcessID:
|
||||
replyError = DSREPLY_InvalidProcessID;
|
||||
break;
|
||||
case DS_InvalidThreadID:
|
||||
replyError = DSREPLY_InvalidThreadID;
|
||||
break;
|
||||
case DS_OSError:
|
||||
replyError = DSREPLY_OSError;
|
||||
break;
|
||||
default:
|
||||
replyError = DSREPLY_CWDSError;
|
||||
}
|
||||
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, replyError);
|
||||
} else {
|
||||
// No error, send ack
|
||||
return TRKSendACK(b);
|
||||
}
|
||||
}
|
||||
|
||||
void TRKDoFlushCache(void) {
|
||||
MWTRACE(1, "DoFlushCache unimplemented!!!\n");
|
||||
// UNUSED FUNCTION
|
||||
}
|
||||
|
||||
/* 8036E084-8036E134 3689C4 00B0+00 0/0 1/1 0/0 .text TRKDoContinue */
|
||||
DSError TRKDoContinue(TRKBuffer*) {
|
||||
MWTRACE(1, "DoContinue\n");
|
||||
if (!TRKTargetStopped()) {
|
||||
u8 arr[0x40];
|
||||
memset(arr, 0, 0x40);
|
||||
|
||||
arr[4] = 0x80;
|
||||
*(u32*)arr = 0x40;
|
||||
arr[8] = 0x16;
|
||||
|
||||
TRKWriteUARTN(arr, 0x40);
|
||||
return DS_NoError;
|
||||
} else {
|
||||
u8 arr[0x40];
|
||||
memset(arr, 0, 0x40);
|
||||
|
||||
arr[4] = 0x80;
|
||||
*(u32*)arr = 0x40;
|
||||
arr[8] = 0x00;
|
||||
|
||||
TRKWriteUARTN(arr, 0x40);
|
||||
return TRKTargetContinue();
|
||||
}
|
||||
}
|
||||
|
||||
/* 8036DE64-8036E084 3687A4 0220+00 0/0 1/1 0/0 .text TRKDoStep */
|
||||
DSError TRKDoStep(TRKBuffer* b) {
|
||||
DSError result;
|
||||
u8 options;
|
||||
u8 count;
|
||||
u32 rangeStart;
|
||||
u32 rangeEnd;
|
||||
u32 pc;
|
||||
TRKSetBufferPosition(b, 0);
|
||||
|
||||
options = *(u8*)&b->data[8];
|
||||
rangeStart = *(u32*)&b->data[16];
|
||||
rangeEnd = *(u32*)&b->data[20];
|
||||
|
||||
switch (options) {
|
||||
case DSSTEP_IntoCount:
|
||||
case DSSTEP_OverCount:
|
||||
count = b->data[12];
|
||||
if (count >= 1) {
|
||||
break;
|
||||
}
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, DSREPLY_ParameterError);
|
||||
case DSSTEP_IntoRange:
|
||||
case DSSTEP_OverRange:
|
||||
pc = TRKTargetGetPC();
|
||||
if (pc >= rangeStart && pc <= rangeEnd) {
|
||||
break;
|
||||
}
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, DSREPLY_ParameterError);
|
||||
default:
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, DSREPLY_UnsupportedOptionError);
|
||||
}
|
||||
|
||||
if (!TRKTargetStopped()) {
|
||||
return TRKStandardACK(b, DSMSG_ReplyACK, DSREPLY_NotStopped);
|
||||
} else {
|
||||
result = TRKStandardACK(b, DSMSG_ReplyACK, DSREPLY_NoError);
|
||||
switch (options) {
|
||||
case DSSTEP_IntoCount:
|
||||
case DSSTEP_OverCount:
|
||||
result = TRKTargetSingleStep(count, (options == DSSTEP_OverCount));
|
||||
break;
|
||||
case DSSTEP_IntoRange:
|
||||
case DSSTEP_OverRange:
|
||||
result = TRKTargetStepOutOfRange(rangeStart, rangeEnd, (options == DSSTEP_OverRange));
|
||||
break;
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
}
|
||||
|
||||
/* 8036DDBC-8036DE64 3686FC 00A8+00 0/0 1/1 0/0 .text TRKDoStop */
|
||||
DSError TRKDoStop(TRKBuffer* b) {
|
||||
MessageCommandID c;
|
||||
|
||||
switch (TRKTargetStop()) {
|
||||
case DS_NoError:
|
||||
c = DSMSG_Ping;
|
||||
break;
|
||||
case DS_InvalidProcessID:
|
||||
c = '!';
|
||||
break;
|
||||
case DS_InvalidThreadID:
|
||||
c = '\"';
|
||||
break;
|
||||
case DS_OSError:
|
||||
c = ' ';
|
||||
break;
|
||||
default:
|
||||
c = DSMSG_Connect;
|
||||
break;
|
||||
}
|
||||
|
||||
TRKStandardACK(b, DSMSG_ReplyACK, c);
|
||||
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036DD14-8036DDBC 368654 00A8+00 0/0 1/1 0/0 .text TRKDoSetOption */
|
||||
DSError TRKDoSetOption(TRKBuffer* message) {
|
||||
u8 enable = message->data[0xc];
|
||||
|
||||
if (message->data[0x8] == '\1') {
|
||||
usr_puts_serial("\nMetroTRK Option : SerialIO - ");
|
||||
if (enable) {
|
||||
usr_puts_serial("Enable\n");
|
||||
} else {
|
||||
usr_puts_serial("Disable\n");
|
||||
}
|
||||
SetUseSerialIO(enable);
|
||||
}
|
||||
|
||||
TRKStandardACK(message, DSMSG_ReplyACK, DS_NoError);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#pragma pop
|
||||
|
|
|
|||
|
|
@ -3,19 +3,19 @@
|
|||
* Description:
|
||||
*/
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/mutex_TRK.h"
|
||||
#include "trk.h"
|
||||
|
||||
/* 8036F498-8036F4A0 369DD8 0008+00 0/0 6/6 0/0 .text TRKReleaseMutex */
|
||||
u8 TRKReleaseMutex() {
|
||||
return 0;
|
||||
/* 8036F4A8-8036F4B0 369DE8 0008+00 0/0 2/2 0/0 .text TRKInitializeMutex */
|
||||
DSError TRKInitializeMutex(void*) {
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036F4A0-8036F4A8 369DE0 0008+00 0/0 6/6 0/0 .text TRKAcquireMutex */
|
||||
u8 TRKAcquireMutex() {
|
||||
return 0;
|
||||
DSError TRKAcquireMutex(void*) {
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036F4A8-8036F4B0 369DE8 0008+00 0/0 2/2 0/0 .text TRKInitializeMutex */
|
||||
u8 TRKInitializeMutex() {
|
||||
return 0;
|
||||
/* 8036F498-8036F4A0 369DD8 0008+00 0/0 6/6 0/0 .text TRKReleaseMutex */
|
||||
DSError TRKReleaseMutex(void*) {
|
||||
return DS_NoError;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,37 +1,31 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: MetroTRK/Portable/notify
|
||||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/notify.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
|
||||
void TRKDoNotifyStopped();
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
void TRKReleaseBuffer();
|
||||
void TRKGetFreeBuffer();
|
||||
void TRKRequestSend();
|
||||
void TRKTargetAddExceptionInfo();
|
||||
void TRKTargetAddStopInfo();
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/support.h"
|
||||
#include "trk.h"
|
||||
|
||||
/* 8036F4B0-8036F548 369DF0 0098+00 0/0 1/1 0/0 .text TRKDoNotifyStopped */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKDoNotifyStopped() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/notify/TRKDoNotifyStopped.s"
|
||||
DSError TRKDoNotifyStopped(MessageCommandID cmd) {
|
||||
int reqIdx;
|
||||
int bufIdx;
|
||||
TRKBuffer* msg;
|
||||
DSError err;
|
||||
DSError bufError;
|
||||
|
||||
bufError = TRKGetFreeBuffer(&bufIdx, &msg);
|
||||
if ((err = bufError) == FALSE) {
|
||||
if (err == DS_NoError) {
|
||||
if (cmd == DSMSG_NotifyStopped) {
|
||||
TRKTargetAddStopInfo(msg);
|
||||
} else {
|
||||
TRKTargetAddExceptionInfo(msg);
|
||||
}
|
||||
}
|
||||
bufError = TRKRequestSend(msg, &reqIdx, 2, 3, 1);
|
||||
err = bufError;
|
||||
if (err == DS_NoError) {
|
||||
TRKReleaseBuffer(reqIdx);
|
||||
}
|
||||
TRKReleaseBuffer(bufIdx);
|
||||
}
|
||||
return err;
|
||||
}
|
||||
#pragma pop
|
||||
|
|
|
|||
|
|
@ -1,65 +1,28 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: MetroTRK/Portable/nubevent
|
||||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/mutex_TRK.h"
|
||||
#include "dol2asm.h"
|
||||
#include "dolphin/types.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
TRKEventQueue gTRKEventQueue;
|
||||
|
||||
void TRKDestructEvent();
|
||||
void TRKConstructEvent(NubEvent*, NubEventType);
|
||||
void TRKPostEvent();
|
||||
u8 TRKGetNextEvent(NubEvent*);
|
||||
u8 TRKInitializeEventQueue();
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
SECTION_INIT void TRK_memcpy(void* dst, const void* src, size_t n);
|
||||
void TRKReleaseBuffer();
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* 8036CC18-8036CC3C 367558 0024+00 0/0 1/1 0/0 .text TRKDestructEvent */
|
||||
void TRKDestructEvent(NubEvent* event) {
|
||||
TRKReleaseBuffer(event->mMessageBufferID);
|
||||
/* 8036CDE8-8036CE40 367728 0058+00 0/0 1/1 0/0 .text TRKInitializeEventQueue */
|
||||
DSError TRKInitializeEventQueue() {
|
||||
TRKInitializeMutex(&gTRKEventQueue);
|
||||
TRKAcquireMutex(&gTRKEventQueue);
|
||||
gTRKEventQueue.count = 0;
|
||||
gTRKEventQueue.next = 0;
|
||||
gTRKEventQueue.eventID = 0x100;
|
||||
TRKReleaseMutex(&gTRKEventQueue);
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036CC3C-8036CC54 36757C 0018+00 0/0 5/5 0/0 .text TRKConstructEvent */
|
||||
void TRKConstructEvent(NubEvent* event, NubEventType eventType) {
|
||||
event->mType = eventType;
|
||||
event->mID = 0;
|
||||
event->mMessageBufferID = -1;
|
||||
}
|
||||
|
||||
/* 8036CC54-8036CD34 367594 00E0+00 0/0 5/5 0/0 .text TRKPostEvent */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKPostEvent() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent/TRKPostEvent.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036CD34-8036CDE8 367674 00B4+00 0/0 1/1 0/0 .text TRKGetNextEvent */
|
||||
u8 TRKGetNextEvent(NubEvent* event) {
|
||||
u8 status = 0;
|
||||
BOOL TRKGetNextEvent(TRKEvent* event) {
|
||||
BOOL status = 0;
|
||||
TRKAcquireMutex(&gTRKEventQueue);
|
||||
if (0 < gTRKEventQueue.mCount) {
|
||||
TRK_memcpy(event, &gTRKEventQueue.mEventList[gTRKEventQueue.mFirst], sizeof(NubEvent));
|
||||
gTRKEventQueue.mCount--;
|
||||
if (++gTRKEventQueue.mFirst == 2) {
|
||||
gTRKEventQueue.mFirst = 0;
|
||||
if (0 < gTRKEventQueue.count) {
|
||||
TRK_memcpy(event, &gTRKEventQueue.events[gTRKEventQueue.next], sizeof(TRKEvent));
|
||||
gTRKEventQueue.count--;
|
||||
if (++gTRKEventQueue.next == 2) {
|
||||
gTRKEventQueue.next = 0;
|
||||
}
|
||||
status = 1;
|
||||
}
|
||||
|
|
@ -67,13 +30,40 @@ u8 TRKGetNextEvent(NubEvent* event) {
|
|||
return status;
|
||||
}
|
||||
|
||||
/* 8036CDE8-8036CE40 367728 0058+00 0/0 1/1 0/0 .text TRKInitializeEventQueue */
|
||||
u8 TRKInitializeEventQueue() {
|
||||
TRKInitializeMutex(&gTRKEventQueue);
|
||||
/* 8036CC54-8036CD34 367594 00E0+00 0/0 5/5 0/0 .text TRKPostEvent */
|
||||
DSError TRKPostEvent(TRKEvent* event) {
|
||||
DSError ret = DS_NoError;
|
||||
int nextEventID;
|
||||
|
||||
TRKAcquireMutex(&gTRKEventQueue);
|
||||
gTRKEventQueue.mCount = 0;
|
||||
gTRKEventQueue.mFirst = 0;
|
||||
gTRKEventQueue.mEventID = 0x100;
|
||||
TRKReleaseMutex();
|
||||
return 0;
|
||||
|
||||
if (gTRKEventQueue.count == 2) {
|
||||
ret = DS_EventQueueFull;
|
||||
|
||||
} else {
|
||||
nextEventID = (gTRKEventQueue.next + gTRKEventQueue.count) % 2;
|
||||
TRK_memcpy(&gTRKEventQueue.events[nextEventID], event, sizeof(TRKEvent));
|
||||
gTRKEventQueue.events[nextEventID].eventID = gTRKEventQueue.eventID;
|
||||
|
||||
if (++gTRKEventQueue.eventID < 0x100) {
|
||||
gTRKEventQueue.eventID = 0x100;
|
||||
}
|
||||
|
||||
gTRKEventQueue.count++;
|
||||
}
|
||||
|
||||
TRKReleaseMutex(&gTRKEventQueue);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* 8036CC3C-8036CC54 36757C 0018+00 0/0 5/5 0/0 .text TRKConstructEvent */
|
||||
void TRKConstructEvent(TRKEvent* event, NubEventType eventType) {
|
||||
event->eventType = eventType;
|
||||
event->eventID = 0;
|
||||
event->msgBufID = -1;
|
||||
}
|
||||
|
||||
/* 8036CC18-8036CC3C 367558 0024+00 0/0 1/1 0/0 .text TRKDestructEvent */
|
||||
void TRKDestructEvent(TRKEvent* event) {
|
||||
TRKReleaseBuffer(event->msgBufID);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,80 +4,78 @@
|
|||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubinit.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/serpoll.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
#include "dol2asm.h"
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
/* 8044D8B8-8044D8C0 07A5D8 0004+04 1/1 4/4 0/0 .bss gTRKBigEndian */
|
||||
BOOL gTRKBigEndian;
|
||||
|
||||
int TRKInitializeEventQueue();
|
||||
int TRKInitializeMessageBuffers();
|
||||
u8 TRKTerminateSerialHandler();
|
||||
int TRKInitializeSerialHandler();
|
||||
void usr_put_initialize();
|
||||
int TRKInitializeDispatcher();
|
||||
void TRKTargetSetInputPendingPtr(void*);
|
||||
int TRKInitializeTarget();
|
||||
void InitializeProgramEndTrap();
|
||||
void TRK_board_display(const char*);
|
||||
int TRKInitializeIntDrivenUART(u32, u32, u32, void*);
|
||||
extern u8 gTRKInputPendingPtr[4 + 4 /* padding */];
|
||||
/* 8036CE8C-8036CFD8 3677CC 014C+00 0/0 1/1 0/0 .text TRKInitializeNub */
|
||||
DSError TRKInitializeNub(void) {
|
||||
DSError ret;
|
||||
DSError uartErr;
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
ret = TRKInitializeEndian();
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2688-803A26A4 02ECE8 001B+01 1/1 0/0 0/0 .rodata @133 */
|
||||
SECTION_RODATA static char const lit_133[] = "MetroTRK for GAMECUBE v2.6";
|
||||
COMPILER_STRIP_GATE(0x803A2688, &lit_133);
|
||||
|
||||
/* 8036CE40-8036CE68 367780 0028+00 0/0 1/1 0/0 .text TRKNubWelcome */
|
||||
void TRKNubWelcome(void) {
|
||||
TRK_board_display(lit_133);
|
||||
MWTRACE(1, "Initialize NUB\n");
|
||||
if (ret == DS_NoError) {
|
||||
usr_put_initialize();
|
||||
}
|
||||
if (ret == DS_NoError) {
|
||||
ret = TRKInitializeEventQueue();
|
||||
}
|
||||
if (ret == DS_NoError) {
|
||||
ret = TRKInitializeMessageBuffers();
|
||||
}
|
||||
if (ret == DS_NoError) {
|
||||
ret = TRKInitializeDispatcher();
|
||||
}
|
||||
InitializeProgramEndTrap();
|
||||
if (ret == DS_NoError) {
|
||||
ret = TRKInitializeSerialHandler();
|
||||
}
|
||||
if (ret == DS_NoError) {
|
||||
ret = TRKInitializeTarget();
|
||||
}
|
||||
if (ret == DS_NoError) {
|
||||
uartErr = TRKInitializeIntDrivenUART(0x0000e100, 1, 0, &gTRKInputPendingPtr);
|
||||
TRKTargetSetInputPendingPtr(gTRKInputPendingPtr);
|
||||
if (uartErr != DS_NoError) {
|
||||
ret = uartErr;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* 8036CE68-8036CE8C 3677A8 0024+00 0/0 1/1 0/0 .text TRKTerminateNub */
|
||||
s32 TRKTerminateNub(void) {
|
||||
DSError TRKTerminateNub(void) {
|
||||
TRKTerminateSerialHandler();
|
||||
return 0;
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A26A4-803A26B8 02ED04 0010+04 1/1 0/0 0/0 .rodata @154 */
|
||||
SECTION_RODATA static char const lit_154[] = "Initialize NUB\n";
|
||||
COMPILER_STRIP_GATE(0x803A26A4, &lit_154);
|
||||
/* 8036CE40-8036CE68 367780 0028+00 0/0 1/1 0/0 .text TRKNubWelcome */
|
||||
void TRKNubWelcome(void) {
|
||||
TRK_board_display("MetroTRK for GAMECUBE v2.6");
|
||||
return;
|
||||
}
|
||||
|
||||
/* 8044D8B8-8044D8C0 07A5D8 0004+04 1/1 4/4 0/0 .bss gTRKBigEndian */
|
||||
SECTION_BSS extern BOOL gTRKBigEndian;
|
||||
SECTION_BSS BOOL gTRKBigEndian;
|
||||
|
||||
inline BOOL TRKInitializeEndian() {
|
||||
BOOL res = FALSE;
|
||||
inline BOOL TRKInitializeEndian(void) {
|
||||
u8 bendian[4];
|
||||
u32 load;
|
||||
BOOL result = FALSE;
|
||||
gTRKBigEndian = TRUE;
|
||||
|
||||
bendian[0] = 0x12;
|
||||
bendian[1] = 0x34;
|
||||
bendian[2] = 0x56;
|
||||
bendian[3] = 0x78;
|
||||
load = *(u32*)bendian;
|
||||
if (load == 0x12345678) {
|
||||
|
||||
if (*(u32*)bendian == 0x12345678) {
|
||||
gTRKBigEndian = TRUE;
|
||||
} else if (load == 0x78563412) {
|
||||
} else if (*(u32*)bendian == 0x78563412) {
|
||||
gTRKBigEndian = FALSE;
|
||||
} else {
|
||||
res = TRUE;
|
||||
result = TRUE;
|
||||
}
|
||||
return res;
|
||||
}
|
||||
|
||||
/* 8036CE8C-8036CFD8 3677CC 014C+00 0/0 1/1 0/0 .text TRKInitializeNub */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm s32 TRKInitializeNub(void) {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubinit/TRKInitializeNub.s"
|
||||
return result;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,166 +1,98 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: MetroTRK/Portable/serpoll
|
||||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/serpoll.h"
|
||||
#include "dol2asm.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
|
||||
u8 TRKTerminateSerialHandler();
|
||||
void TRKInitializeSerialHandler();
|
||||
void TRKProcessInput();
|
||||
void TRKGetInput();
|
||||
void TRKTestForPacket();
|
||||
extern u8 gTRKInputPendingPtr[4 + 4 /* padding */];
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
void TRKConstructEvent();
|
||||
void TRKPostEvent();
|
||||
void TRKAppendBuffer_ui8();
|
||||
void TRKSetBufferPosition();
|
||||
void TRKReleaseBuffer();
|
||||
void TRKGetBuffer();
|
||||
void TRKGetFreeBuffer();
|
||||
void TRKReadUARTN();
|
||||
void TRKPollUART();
|
||||
void MWTRACE();
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* 8036D858-8036D860 368198 0008+00 0/0 1/1 0/0 .text TRKTerminateSerialHandler */
|
||||
u8 TRKTerminateSerialHandler() {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2700-803A2724 02ED60 0022+02 2/2 0/0 0/0 .rodata @121 */
|
||||
SECTION_RODATA static char const lit_121[] = "TRK_Packet_Header \t %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A2700, &lit_121);
|
||||
|
||||
/* 803A2724-803A2748 02ED84 0022+02 0/1 0/0 0/0 .rodata @122 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_122[] = "TRK_CMD_ReadMemory %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A2724, &lit_122);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2748-803A276C 02EDA8 0022+02 0/1 0/0 0/0 .rodata @123 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_123[] = "TRK_CMD_WriteMemory %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A2748, &lit_123);
|
||||
#pragma pop
|
||||
|
||||
/* 803A276C-803A278C 02EDCC 0020+00 0/1 0/0 0/0 .rodata @124 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_124[] = "TRK_CMD_Connect \t %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A276C, &lit_124);
|
||||
#pragma pop
|
||||
|
||||
/* 803A278C-803A27AC 02EDEC 0020+00 0/1 0/0 0/0 .rodata @125 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_125[] = "TRK_CMD_ReplyAck\t %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A278C, &lit_125);
|
||||
#pragma pop
|
||||
|
||||
/* 803A27AC-803A27D0 02EE0C 0021+03 0/1 0/0 0/0 .rodata @126 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_126[] = "TRK_CMD_ReadRegisters\t%ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A27AC, &lit_126);
|
||||
#pragma pop
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/msgbuf.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/nubevent.h"
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
#include "trk.h"
|
||||
|
||||
/* 8044F270-8044F288 07BF90 0014+04 3/3 0/0 0/0 .bss gTRKFramingState */
|
||||
static u8 gTRKFramingState[20 + 4 /* padding */];
|
||||
static TRKFramingState gTRKFramingState;
|
||||
|
||||
/* 8036D860-8036D924 3681A0 00C4+00 0/0 1/1 0/0 .text TRKInitializeSerialHandler */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKInitializeSerialHandler() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/serpoll/TRKInitializeSerialHandler.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036D924-8036D974 368264 0050+00 0/0 1/1 0/0 .text TRKProcessInput */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKProcessInput() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/serpoll/TRKProcessInput.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036D974-8036D9D4 3682B4 0060+00 0/0 1/1 0/0 .text TRKGetInput */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKGetInput() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/serpoll/TRKGetInput.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A27D0-803A27F4 02EE30 0024+00 0/1 0/0 0/0 .rodata @146 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_146[] = "TestForPacket : FreeBuffer is %ld\n";
|
||||
COMPILER_STRIP_GATE(0x803A27D0, &lit_146);
|
||||
#pragma pop
|
||||
|
||||
/* 803A27F4-803A2810 02EE54 001B+01 0/1 0/0 0/0 .rodata @147 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_147[] = "Reading payload %ld bytes\n";
|
||||
COMPILER_STRIP_GATE(0x803A27F4, &lit_147);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2810-803A2844 02EE70 0031+03 0/1 0/0 0/0 .rodata @148 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_148[] = "TestForPacket : Invalid size of packet hdr.size\n";
|
||||
COMPILER_STRIP_GATE(0x803A2810, &lit_148);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2844-803A286C 02EEA4 0028+00 0/1 0/0 0/0 .rodata @149 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_149[] = "TestForPacket : Invalid size of packet\n";
|
||||
COMPILER_STRIP_GATE(0x803A2844, &lit_149);
|
||||
#pragma pop
|
||||
|
||||
/* 803A286C-803A2890 02EECC 001D+07 0/1 0/0 0/0 .rodata @150 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_150[] = "TestForPacket returning %ld\n";
|
||||
COMPILER_STRIP_GATE(0x803A286C, &lit_150);
|
||||
#pragma pop
|
||||
/* 804519B8-804519C0 000EB8 0004+04 0/0 2/2 0/0 .sbss gTRKInputPendingPtr */
|
||||
void* gTRKInputPendingPtr;
|
||||
|
||||
/* 8036D9D4-8036DB10 368314 013C+00 1/1 1/1 0/0 .text TRKTestForPacket */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKTestForPacket() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/serpoll/TRKTestForPacket.s"
|
||||
}
|
||||
#pragma pop
|
||||
MessageBufferID TRKTestForPacket() {
|
||||
u8 payloadBuf[0x880];
|
||||
u8 packetBuf[0x40];
|
||||
int bufID;
|
||||
TRKBuffer* msg;
|
||||
MessageBufferID result;
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 804519B8-804519C0 000EB8 0004+04 0/0 2/2 0/0 .sbss gTRKInputPendingPtr */
|
||||
extern u8 gTRKInputPendingPtr[4 + 4 /* padding */];
|
||||
u8 gTRKInputPendingPtr[4 + 4 /* padding */];
|
||||
if (TRKPollUART() <= 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
result = TRKGetFreeBuffer(&bufID, &msg);
|
||||
|
||||
MWTRACE(4, "TestForPacket : FreeBuffer is %ld\n", result);
|
||||
|
||||
TRKSetBufferPosition(msg, 0);
|
||||
if (TRKReadUARTN(packetBuf, 0x40) == UART_NoError) {
|
||||
int readSize;
|
||||
|
||||
TRKAppendBuffer_ui8(msg, packetBuf, 0x40);
|
||||
readSize = ((u32*)packetBuf)[0] - 0x40;
|
||||
result = bufID;
|
||||
if (readSize > 0) {
|
||||
MWTRACE(1, "Reading payload %ld bytes\n", readSize);
|
||||
if (TRKReadUARTN(payloadBuf, ((u32*)packetBuf)[0] - 0x40) == UART_NoError) {
|
||||
TRKAppendBuffer_ui8(msg, payloadBuf, ((u32*)packetBuf)[0]);
|
||||
} else {
|
||||
MWTRACE(8, "TestForPacket : Invalid size of packet hdr.size\n");
|
||||
TRKReleaseBuffer(result);
|
||||
result = -1;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
MWTRACE(8, "TestForPacket : Invalid size of packet\n");
|
||||
TRKReleaseBuffer(result);
|
||||
result = -1;
|
||||
}
|
||||
|
||||
MWTRACE(1, "TestForPacket returning %ld\n", result);
|
||||
return result;
|
||||
}
|
||||
|
||||
/* 8036D974-8036D9D4 3682B4 0060+00 0/0 1/1 0/0 .text TRKGetInput */
|
||||
void TRKGetInput(void) {
|
||||
MessageBufferID id = TRKTestForPacket();
|
||||
if (id != -1) {
|
||||
TRKEvent event;
|
||||
TRKGetBuffer(id);
|
||||
TRKConstructEvent(&event, NUBEVENT_Request);
|
||||
event.msgBufID = id;
|
||||
gTRKFramingState.msgBufID = -1;
|
||||
TRKPostEvent(&event);
|
||||
}
|
||||
}
|
||||
|
||||
/* 8036D924-8036D974 368264 0050+00 0/0 1/1 0/0 .text TRKProcessInput */
|
||||
void TRKProcessInput(int bufferIdx) {
|
||||
TRKEvent event;
|
||||
|
||||
TRKConstructEvent(&event, NUBEVENT_Request);
|
||||
event.msgBufID = bufferIdx;
|
||||
gTRKFramingState.msgBufID = -1;
|
||||
TRKPostEvent(&event);
|
||||
}
|
||||
|
||||
/* 8036D860-8036D924 3681A0 00C4+00 0/0 1/1 0/0 .text TRKInitializeSerialHandler */
|
||||
DSError TRKInitializeSerialHandler() {
|
||||
gTRKFramingState.msgBufID = -1;
|
||||
gTRKFramingState.receiveState = DSRECV_Wait;
|
||||
gTRKFramingState.isEscape = FALSE;
|
||||
|
||||
MWTRACE(1, "TRK_Packet_Header \t %ld bytes\n", 0x40);
|
||||
MWTRACE(1, "TRK_CMD_ReadMemory %ld bytes\n", 0x40);
|
||||
MWTRACE(1, "TRK_CMD_WriteMemory %ld bytes\n", 0x40);
|
||||
MWTRACE(1, "TRK_CMD_Connect \t %ld bytes\n", 0x40);
|
||||
MWTRACE(1, "TRK_CMD_ReplyAck\t %ld bytes\n", 0x40);
|
||||
MWTRACE(1, "TRK_CMD_ReadRegisters\t%ld bytes\n", 0x40);
|
||||
|
||||
return DS_NoError;
|
||||
}
|
||||
|
||||
/* 8036D858-8036D860 368198 0008+00 0/0 1/1 0/0 .text TRKTerminateSerialHandler */
|
||||
DSError TRKTerminateSerialHandler(void) {
|
||||
return DS_NoError;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,115 +1,289 @@
|
|||
//
|
||||
// Generated By: dol2asm
|
||||
// Translation Unit: MetroTRK/Portable/support
|
||||
//
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/MetroTRK/Portable/support.h"
|
||||
#include "dol2asm.h"
|
||||
|
||||
//
|
||||
// Forward References:
|
||||
//
|
||||
|
||||
void HandlePositionFileSupportRequest();
|
||||
void HandleCloseFileSupportRequest();
|
||||
void HandleOpenFileSupportRequest();
|
||||
void TRKRequestSend();
|
||||
void TRKSuppAccessFile();
|
||||
|
||||
//
|
||||
// External References:
|
||||
//
|
||||
|
||||
SECTION_INIT void memset();
|
||||
void strlen();
|
||||
void TRKMessageSend();
|
||||
void TRKReadBuffer_ui8();
|
||||
void TRKAppendBuffer_ui8();
|
||||
void TRKSetBufferPosition();
|
||||
void TRKReleaseBuffer();
|
||||
void TRKGetBuffer();
|
||||
void TRKGetFreeBuffer();
|
||||
void TRKProcessInput();
|
||||
void TRKTestForPacket();
|
||||
void OutputData();
|
||||
void MWTRACE();
|
||||
|
||||
//
|
||||
// Declarations:
|
||||
//
|
||||
|
||||
/* 8036ED84-8036EE94 3696C4 0110+00 0/0 1/1 0/0 .text HandlePositionFileSupportRequest */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void HandlePositionFileSupportRequest() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/support/HandlePositionFileSupportRequest.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036EE94-8036EF7C 3697D4 00E8+00 0/0 1/1 0/0 .text HandleCloseFileSupportRequest */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void HandleCloseFileSupportRequest() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/support/HandleCloseFileSupportRequest.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* 8036EF7C-8036F098 3698BC 011C+00 0/0 1/1 0/0 .text HandleOpenFileSupportRequest */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void HandleOpenFileSupportRequest() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/support/HandleOpenFileSupportRequest.s"
|
||||
}
|
||||
#pragma pop
|
||||
|
||||
/* ############################################################################################## */
|
||||
/* 803A2AB8-803A2AD0 02F118 0015+03 1/1 0/0 0/0 .rodata @274 */
|
||||
SECTION_RODATA static char const lit_274[] = "Calling MessageSend\n";
|
||||
COMPILER_STRIP_GATE(0x803A2AB8, &lit_274);
|
||||
|
||||
/* 803A2AD0-803A2AF8 02F130 0028+00 0/1 0/0 0/0 .rodata @275 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_275[] = "msg_command : 0x%02x hdr->cmdID 0x%02x\n";
|
||||
COMPILER_STRIP_GATE(0x803A2AD0, &lit_275);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2AF8-803A2B0C 02F158 0014+00 0/1 0/0 0/0 .rodata @276 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_276[] = "msg_error : 0x%02x\n";
|
||||
COMPILER_STRIP_GATE(0x803A2AF8, &lit_276);
|
||||
#pragma pop
|
||||
|
||||
/* 803A2B0C-803A2B60 02F16C 0051+03 0/1 0/0 0/0 .rodata @277 */
|
||||
#pragma push
|
||||
#pragma force_active on
|
||||
SECTION_RODATA static char const lit_277[] = "RequestSend : Bad ack or non ack received msg_command : 0x%02x msg_error 0x%02x\n";
|
||||
COMPILER_STRIP_GATE(0x803A2B0C, &lit_277);
|
||||
#pragma pop
|
||||
|
||||
/* 8036F098-8036F278 3699D8 01E0+00 4/4 1/1 0/0 .text TRKRequestSend */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKRequestSend() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/support/TRKRequestSend.s"
|
||||
}
|
||||
#pragma pop
|
||||
#include "TRK_MINNOW_DOLPHIN/utils/common/MWTrace.h"
|
||||
#include "trk.h"
|
||||
|
||||
/* 8036F278-8036F498 369BB8 0220+00 0/0 1/1 0/0 .text TRKSuppAccessFile */
|
||||
#pragma push
|
||||
#pragma optimization_level 0
|
||||
#pragma optimizewithasm off
|
||||
asm void TRKSuppAccessFile() {
|
||||
nofralloc
|
||||
#include "asm/TRK_MINNOW_DOLPHIN/MetroTRK/Portable/support/TRKSuppAccessFile.s"
|
||||
DSError TRKSuppAccessFile(u32 file_handle, u8* data, size_t* count, DSIOResult* io_result,
|
||||
BOOL need_reply, BOOL read) {
|
||||
DSError error;
|
||||
int replyBufferId;
|
||||
TRKBuffer* replyBuffer;
|
||||
u32 length;
|
||||
int bufferId;
|
||||
TRKBuffer* buffer;
|
||||
u32 i;
|
||||
u8 replyIOResult;
|
||||
u32 replyLength;
|
||||
BOOL exit;
|
||||
CommandReply reply;
|
||||
|
||||
if (data == NULL || *count == 0) {
|
||||
return DS_ParameterError;
|
||||
}
|
||||
|
||||
exit = FALSE;
|
||||
*io_result = DS_IONoError;
|
||||
i = 0;
|
||||
error = DS_NoError;
|
||||
while (!exit && i < *count && error == DS_NoError && *io_result == 0) {
|
||||
memset(&reply, 0, sizeof(CommandReply));
|
||||
|
||||
if (*count - i <= 0x800) {
|
||||
length = *count - i;
|
||||
} else {
|
||||
length = 0x800;
|
||||
}
|
||||
|
||||
reply.commandID.b = read ? DSMSG_ReadFile : DSMSG_WriteFile;
|
||||
|
||||
if (read) {
|
||||
reply._00 = 0x40;
|
||||
} else {
|
||||
reply._00 = length + 0x40;
|
||||
}
|
||||
|
||||
reply.replyError.r = file_handle;
|
||||
*(u16*)&reply._0C = length;
|
||||
|
||||
TRKGetFreeBuffer(&bufferId, &buffer);
|
||||
error = TRKAppendBuffer_ui8(buffer, (u8*)&reply, 0x40);
|
||||
|
||||
if (!read && error == DS_NoError) {
|
||||
error = TRKAppendBuffer_ui8(buffer, data + i, length);
|
||||
}
|
||||
|
||||
if (error == DS_NoError) {
|
||||
if (need_reply) {
|
||||
BOOL b = read && file_handle == 0;
|
||||
|
||||
error = TRKRequestSend(buffer, &replyBufferId, read ? 5 : 5, 3, !b);
|
||||
if (error == DS_NoError) {
|
||||
replyBuffer = (TRKBuffer*)TRKGetBuffer(replyBufferId);
|
||||
}
|
||||
replyIOResult = *(u32*)(replyBuffer->data + 0x10);
|
||||
replyLength = *(u16*)(replyBuffer->data + 0x14);
|
||||
if (read && error == DS_NoError && replyLength <= length) {
|
||||
TRKSetBufferPosition(replyBuffer, 0x40);
|
||||
error = TRKReadBuffer_ui8(replyBuffer, data + i, replyLength);
|
||||
if (error == DS_MessageBufferReadError) {
|
||||
error = DS_NoError;
|
||||
}
|
||||
}
|
||||
|
||||
if (replyLength != length) {
|
||||
length = replyLength;
|
||||
exit = TRUE;
|
||||
}
|
||||
|
||||
*io_result = (DSIOResult)replyIOResult;
|
||||
TRKReleaseBuffer(replyBufferId);
|
||||
} else {
|
||||
error = TRKMessageSend(buffer);
|
||||
}
|
||||
}
|
||||
|
||||
TRKReleaseBuffer(bufferId);
|
||||
i += length;
|
||||
}
|
||||
|
||||
*count = i;
|
||||
return error;
|
||||
}
|
||||
|
||||
/* 8036F098-8036F278 3699D8 01E0+00 4/4 1/1 0/0 .text TRKRequestSend */
|
||||
DSError TRKRequestSend(TRKBuffer* msgBuf, int* bufferId, u32 p1, u32 p2, int p3) {
|
||||
int error = DS_NoError;
|
||||
TRKBuffer* buffer;
|
||||
u32 counter;
|
||||
int count;
|
||||
u8 msgCmd;
|
||||
int msgReplyError;
|
||||
BOOL badReply = TRUE;
|
||||
|
||||
*bufferId = -1;
|
||||
|
||||
for (count = p2 + 1; count != 0 && *bufferId == -1 && error == DS_NoError; count--) {
|
||||
MWTRACE(1, "Calling MessageSend\n");
|
||||
error = TRKMessageSend(msgBuf);
|
||||
if (error == DS_NoError) {
|
||||
if (p3) {
|
||||
counter = 0;
|
||||
}
|
||||
|
||||
while (TRUE) {
|
||||
do {
|
||||
*bufferId = TRKTestForPacket();
|
||||
if (*bufferId != -1)
|
||||
break;
|
||||
} while (!p3 || ++counter < 79999980);
|
||||
|
||||
if (*bufferId == -1)
|
||||
break;
|
||||
|
||||
badReply = 0;
|
||||
|
||||
buffer = TRKGetBuffer(*bufferId);
|
||||
TRKSetBufferPosition(buffer, 0);
|
||||
OutputData(&buffer->data[0], buffer->length);
|
||||
msgCmd = buffer->data[4];
|
||||
MWTRACE(1, "msg_command : 0x%02x hdr->cmdID 0x%02x\n", msgCmd, msgCmd);
|
||||
|
||||
if (msgCmd >= DSMSG_ReplyACK)
|
||||
break;
|
||||
|
||||
TRKProcessInput(*bufferId);
|
||||
*bufferId = -1;
|
||||
}
|
||||
|
||||
if (*bufferId != -1) {
|
||||
if (buffer->length < 0x40) {
|
||||
// OSReport("MetroTRK - bad reply size %ld\n", buffer->length);
|
||||
badReply = TRUE;
|
||||
}
|
||||
if (error == DS_NoError && !badReply) {
|
||||
msgReplyError = buffer->data[8];
|
||||
MWTRACE(1, "msg_error : 0x%02x\n", msgReplyError);
|
||||
}
|
||||
if (error == DS_NoError && !badReply) {
|
||||
if ((int)msgCmd != DSMSG_ReplyACK || msgReplyError != DSREPLY_NoError) {
|
||||
MWTRACE(8,
|
||||
"RequestSend : Bad ack or non ack received msg_command : 0x%02x "
|
||||
"msg_error 0x%02x\n",
|
||||
msgCmd, msgReplyError);
|
||||
badReply = TRUE;
|
||||
}
|
||||
}
|
||||
if (error != DS_NoError || badReply) {
|
||||
TRKReleaseBuffer(*bufferId);
|
||||
*bufferId = -1;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (*bufferId == -1) {
|
||||
error = DS_Error800;
|
||||
}
|
||||
|
||||
return error;
|
||||
}
|
||||
|
||||
/* 8036EF7C-8036F098 3698BC 011C+00 0/0 1/1 0/0 .text HandleOpenFileSupportRequest */
|
||||
DSError HandleOpenFileSupportRequest(const char* path, u8 replyError, u32* param_3,
|
||||
DSIOResult* ioResult) {
|
||||
DSError error;
|
||||
int bufferId2;
|
||||
int bufferId1;
|
||||
TRKBuffer* tempBuffer;
|
||||
TRKBuffer* buffer;
|
||||
CommandReply reply;
|
||||
|
||||
memset(&reply, 0, sizeof(CommandReply));
|
||||
*param_3 = 0;
|
||||
reply.commandID.b = DSMSG_OpenFile;
|
||||
reply._00 = strlen(path) + 0x40 + 1;
|
||||
reply.replyError.b = replyError;
|
||||
*(u16*)&reply._0C = strlen(path) + 1;
|
||||
TRKGetFreeBuffer(&bufferId1, &buffer);
|
||||
error = TRKAppendBuffer_ui8(buffer, (u8*)&reply, 0x40);
|
||||
|
||||
if (error == DS_NoError) {
|
||||
error = TRKAppendBuffer_ui8(buffer, (u8*)path, strlen(path) + 1);
|
||||
}
|
||||
|
||||
if (error == DS_NoError) {
|
||||
*ioResult = DS_IONoError;
|
||||
error = TRKRequestSend(buffer, &bufferId2, 7, 3, 0);
|
||||
|
||||
if (error == DS_NoError) {
|
||||
tempBuffer = TRKGetBuffer(bufferId2);
|
||||
}
|
||||
|
||||
*ioResult = *(u32*)(tempBuffer->data + 0x10);
|
||||
*param_3 = *(u32*)(tempBuffer->data + 0x8);
|
||||
TRKReleaseBuffer(bufferId2);
|
||||
}
|
||||
TRKReleaseBuffer(bufferId1);
|
||||
return error;
|
||||
}
|
||||
|
||||
/* 8036EE94-8036EF7C 3697D4 00E8+00 0/0 1/1 0/0 .text HandleCloseFileSupportRequest */
|
||||
DSError HandleCloseFileSupportRequest(int replyError, DSIOResult* ioResult) {
|
||||
DSError error;
|
||||
int replyBufferId;
|
||||
int bufferId;
|
||||
TRKBuffer* buffer1;
|
||||
TRKBuffer* buffer2;
|
||||
CommandReply reply;
|
||||
|
||||
memset(&reply, 0, sizeof(CommandReply));
|
||||
reply.commandID.b = DSMSG_CloseFile;
|
||||
reply._00 = 0x40;
|
||||
reply.replyError.r = replyError;
|
||||
error = TRKGetFreeBuffer(&bufferId, &buffer1);
|
||||
|
||||
if (error == DS_NoError) {
|
||||
error = TRKAppendBuffer_ui8(buffer1, (u8*)&reply, sizeof(CommandReply));
|
||||
}
|
||||
|
||||
if (error == DS_NoError) {
|
||||
*ioResult = DS_IONoError;
|
||||
error = TRKRequestSend(buffer1, &replyBufferId, 3, 3, 0);
|
||||
|
||||
if (error == DS_NoError) {
|
||||
buffer2 = TRKGetBuffer(replyBufferId);
|
||||
}
|
||||
|
||||
if (error == DS_NoError) {
|
||||
*ioResult = *(u32*)(buffer2->data + 0x10);
|
||||
}
|
||||
|
||||
TRKReleaseBuffer(replyBufferId);
|
||||
}
|
||||
|
||||
TRKReleaseBuffer(bufferId);
|
||||
return error;
|
||||
}
|
||||
|
||||
/* 8036ED84-8036EE94 3696C4 0110+00 0/0 1/1 0/0 .text HandlePositionFileSupportRequest */
|
||||
DSError HandlePositionFileSupportRequest(DSReplyError replyErr, u32* param_2, u8 param_3,
|
||||
DSIOResult* ioResult) {
|
||||
DSError error;
|
||||
int bufferId2;
|
||||
int bufferId1;
|
||||
TRKBuffer* buffer1;
|
||||
TRKBuffer* buffer2;
|
||||
CommandReply reply;
|
||||
|
||||
memset(&reply, 0, sizeof(CommandReply));
|
||||
reply.commandID.b = DSMSG_PositionFile;
|
||||
reply._00 = 0x40;
|
||||
reply.replyError.r = replyErr;
|
||||
reply._0C = *param_2;
|
||||
reply._10[0] = param_3;
|
||||
error = TRKGetFreeBuffer(&bufferId1, &buffer1);
|
||||
|
||||
if (error == DS_NoError) {
|
||||
error = TRKAppendBuffer_ui8(buffer1, (u8*)&reply, sizeof(CommandReply));
|
||||
}
|
||||
|
||||
if (error == DS_NoError) {
|
||||
*ioResult = DS_IONoError;
|
||||
*param_2 = -1;
|
||||
error = TRKRequestSend(buffer1, &bufferId2, 3, 3, 0);
|
||||
|
||||
if (error == DS_NoError) {
|
||||
buffer2 = TRKGetBuffer(bufferId2);
|
||||
|
||||
if (buffer2 != NULL) {
|
||||
*ioResult = *(u32*)(buffer2->data + 0x10);
|
||||
*param_2 = *(u32*)(buffer2->data + 0x18);
|
||||
}
|
||||
}
|
||||
|
||||
TRKReleaseBuffer(bufferId2);
|
||||
}
|
||||
|
||||
TRKReleaseBuffer(bufferId1);
|
||||
return error;
|
||||
}
|
||||
#pragma pop
|
||||
|
|
|
|||
|
|
@ -4,48 +4,49 @@
|
|||
*/
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/Os/dolphin/UDP_Stubs.h"
|
||||
#include "dolphin/os/OS.h"
|
||||
|
||||
/* 80372314-8037231C 36CC54 0008+00 0/0 1/1 0/0 .text udp_cc_post_stop */
|
||||
s32 udp_cc_post_stop(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* 8037231C-80372324 36CC5C 0008+00 0/0 1/1 0/0 .text udp_cc_pre_continue */
|
||||
s32 udp_cc_pre_continue(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* 80372324-8037232C 36CC64 0008+00 0/0 1/1 0/0 .text udp_cc_peek */
|
||||
u8 udp_cc_peek(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 8037232C-80372334 36CC6C 0008+00 0/0 1/1 0/0 .text udp_cc_write */
|
||||
u8 udp_cc_write(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 80372334-8037233C 36CC74 0008+00 0/0 1/1 0/0 .text udp_cc_read */
|
||||
u8 udp_cc_read(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 8037233C-80372344 36CC7C 0008+00 0/0 1/1 0/0 .text udp_cc_close */
|
||||
s32 udp_cc_close(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* 80372344-8037234C 36CC84 0008+00 0/0 1/1 0/0 .text udp_cc_open */
|
||||
s32 udp_cc_open(void) {
|
||||
/* 80372354-8037235C 36CC94 0008+00 0/0 1/1 0/0 .text udp_cc_initialize */
|
||||
__declspec(weak) int udp_cc_initialize(void* flagOut, OSInterruptHandler handler) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* 8037234C-80372354 36CC8C 0008+00 0/0 1/1 0/0 .text udp_cc_shutdown */
|
||||
s32 udp_cc_shutdown(void) {
|
||||
__declspec(weak) int udp_cc_shutdown(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* 80372354-8037235C 36CC94 0008+00 0/0 1/1 0/0 .text udp_cc_initialize */
|
||||
s32 udp_cc_initialize(void) {
|
||||
/* 80372344-8037234C 36CC84 0008+00 0/0 1/1 0/0 .text udp_cc_open */
|
||||
__declspec(weak) int udp_cc_open(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* 8037233C-80372344 36CC7C 0008+00 0/0 1/1 0/0 .text udp_cc_close */
|
||||
__declspec(weak) int udp_cc_close(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* 80372334-8037233C 36CC74 0008+00 0/0 1/1 0/0 .text udp_cc_read */
|
||||
__declspec(weak) int udp_cc_read(u8* dest, int size) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 8037232C-80372334 36CC6C 0008+00 0/0 1/1 0/0 .text udp_cc_write */
|
||||
__declspec(weak) int udp_cc_write(const u8* src, int size) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 80372324-8037232C 36CC64 0008+00 0/0 1/1 0/0 .text udp_cc_peek */
|
||||
__declspec(weak) int udp_cc_peek(void) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* 8037231C-80372324 36CC5C 0008+00 0/0 1/1 0/0 .text udp_cc_pre_continue */
|
||||
__declspec(weak) int udp_cc_pre_continue(void) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* 80372314-8037231C 36CC54 0008+00 0/0 1/1 0/0 .text udp_cc_post_stop */
|
||||
__declspec(weak) int udp_cc_post_stop(void) {
|
||||
return -1;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@
|
|||
#include "TRK_MINNOW_DOLPHIN/ppc/Generic/targimpl.h"
|
||||
|
||||
/* 8037214C-80372180 36CA8C 0034+00 0/0 2/2 0/0 .text TRKTargetContinue */
|
||||
s32 TRKTargetContinue(void) {
|
||||
DSError TRKTargetContinue(void) {
|
||||
TRKTargetSetStopped(0);
|
||||
UnreserveEXI2Port();
|
||||
TRKSwapAndGo();
|
||||
|
|
|
|||
|
|
@ -4,16 +4,15 @@
|
|||
*/
|
||||
|
||||
#include "TRK_MINNOW_DOLPHIN/Os/dolphin/target_options.h"
|
||||
#include "dol2asm.h"
|
||||
|
||||
SECTION_BSS static u8 useSerialIO;
|
||||
|
||||
/* 80372180-80372190 36CAC0 0010+00 0/0 2/2 0/0 .text GetUseSerialIO */
|
||||
u8 GetUseSerialIO(void) {
|
||||
return useSerialIO;
|
||||
}
|
||||
static u8 useSerialIO;
|
||||
|
||||
/* 80372190-8037219C 36CAD0 000C+00 0/0 1/1 0/0 .text SetUseSerialIO */
|
||||
void SetUseSerialIO(u8 serialIO) {
|
||||
useSerialIO = serialIO;
|
||||
}
|
||||
|
||||
/* 80372180-80372190 36CAC0 0010+00 0/0 2/2 0/0 .text GetUseSerialIO */
|
||||
u8 GetUseSerialIO(void) {
|
||||
return useSerialIO;
|
||||
}
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue