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c_lib OK

This commit is contained in:
lepelog 2021-11-25 23:11:51 +01:00
parent 475d94201c
commit 5bf31ecd8d
17 changed files with 203 additions and 1558 deletions
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24
asm/SSystem/SComponent/c_lib/cLib_addCalcAngleS2__FPssss.s
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@ -1,24 +0,0 @@
lbl_80270608:
/* 80270608 A8 E3 00 00 */ lha r7, 0(r3)
/* 8027060C 7C 07 20 50 */ subf r0, r7, r4
/* 80270610 7C 04 07 34 */ extsh r4, r0
/* 80270614 7C A0 07 34 */ extsh r0, r5
/* 80270618 7C 04 03 D6 */ divw r0, r4, r0
/* 8027061C 7C 04 07 34 */ extsh r4, r0
/* 80270620 7C C0 07 34 */ extsh r0, r6
/* 80270624 7C 04 00 00 */ cmpw r4, r0
/* 80270628 40 81 00 10 */ ble lbl_80270638
/* 8027062C 7C 07 32 14 */ add r0, r7, r6
/* 80270630 B0 03 00 00 */ sth r0, 0(r3)
/* 80270634 4E 80 00 20 */ blr
lbl_80270638:
/* 80270638 7C 00 00 D0 */ neg r0, r0
/* 8027063C 7C 04 00 00 */ cmpw r4, r0
/* 80270640 40 80 00 10 */ bge lbl_80270650
/* 80270644 7C 06 38 50 */ subf r0, r6, r7
/* 80270648 B0 03 00 00 */ sth r0, 0(r3)
/* 8027064C 4E 80 00 20 */ blr
lbl_80270650:
/* 80270650 7C 07 22 14 */ add r0, r7, r4
/* 80270654 B0 03 00 00 */ sth r0, 0(r3)
/* 80270658 4E 80 00 20 */ blr

57
asm/SSystem/SComponent/c_lib/cLib_addCalcAngleS__FPsssss.s
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@ -1,57 +0,0 @@
lbl_80270540:
/* 80270540 A9 03 00 00 */ lha r8, 0(r3)
/* 80270544 7C 89 07 34 */ extsh r9, r4
/* 80270548 7C 08 48 50 */ subf r0, r8, r9
/* 8027054C 7C 0A 07 34 */ extsh r10, r0
/* 80270550 7C 08 48 00 */ cmpw r8, r9
/* 80270554 41 82 00 A4 */ beq lbl_802705F8
/* 80270558 7C A0 07 34 */ extsh r0, r5
/* 8027055C 7C 0A 03 D6 */ divw r0, r10, r0
/* 80270560 7C 05 07 34 */ extsh r5, r0
/* 80270564 7C E0 07 34 */ extsh r0, r7
/* 80270568 7C 05 00 00 */ cmpw r5, r0
/* 8027056C 41 81 00 10 */ bgt lbl_8027057C
/* 80270570 7C 00 00 D0 */ neg r0, r0
/* 80270574 7C 05 00 00 */ cmpw r5, r0
/* 80270578 40 80 00 3C */ bge lbl_802705B4
lbl_8027057C:
/* 8027057C 7C C0 07 34 */ extsh r0, r6
/* 80270580 7C 05 00 00 */ cmpw r5, r0
/* 80270584 40 81 00 08 */ ble lbl_8027058C
/* 80270588 7C C5 33 78 */ mr r5, r6
lbl_8027058C:
/* 8027058C 7C A4 07 34 */ extsh r4, r5
/* 80270590 7C C0 07 34 */ extsh r0, r6
/* 80270594 7C 00 00 D0 */ neg r0, r0
/* 80270598 7C 04 00 00 */ cmpw r4, r0
/* 8027059C 40 80 00 08 */ bge lbl_802705A4
/* 802705A0 7C 05 07 34 */ extsh r5, r0
lbl_802705A4:
/* 802705A4 A8 03 00 00 */ lha r0, 0(r3)
/* 802705A8 7C 00 2A 14 */ add r0, r0, r5
/* 802705AC B0 03 00 00 */ sth r0, 0(r3)
/* 802705B0 48 00 00 48 */ b lbl_802705F8
lbl_802705B4:
/* 802705B4 7D 40 07 35 */ extsh. r0, r10
/* 802705B8 41 80 00 24 */ blt lbl_802705DC
/* 802705BC 7C 08 3A 14 */ add r0, r8, r7
/* 802705C0 B0 03 00 00 */ sth r0, 0(r3)
/* 802705C4 A8 03 00 00 */ lha r0, 0(r3)
/* 802705C8 7C 00 48 50 */ subf r0, r0, r9
/* 802705CC 7C 00 07 35 */ extsh. r0, r0
/* 802705D0 41 81 00 28 */ bgt lbl_802705F8
/* 802705D4 B0 83 00 00 */ sth r4, 0(r3)
/* 802705D8 48 00 00 20 */ b lbl_802705F8
lbl_802705DC:
/* 802705DC 7C 07 40 50 */ subf r0, r7, r8
/* 802705E0 B0 03 00 00 */ sth r0, 0(r3)
/* 802705E4 A8 03 00 00 */ lha r0, 0(r3)
/* 802705E8 7C 00 48 50 */ subf r0, r0, r9
/* 802705EC 7C 00 07 35 */ extsh. r0, r0
/* 802705F0 41 80 00 08 */ blt lbl_802705F8
/* 802705F4 B0 83 00 00 */ sth r4, 0(r3)
lbl_802705F8:
/* 802705F8 A8 03 00 00 */ lha r0, 0(r3)
/* 802705FC 7C 00 48 50 */ subf r0, r0, r9
/* 80270600 7C 03 07 34 */ extsh r3, r0
/* 80270604 4E 80 00 20 */ blr

130
asm/SSystem/SComponent/c_lib/cLib_addCalcPos2__FP4cXyzRC4cXyzff.s
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@ -1,130 +0,0 @@
lbl_80270178:
/* 80270178 94 21 FF 90 */ stwu r1, -0x70(r1)
/* 8027017C 7C 08 02 A6 */ mflr r0
/* 80270180 90 01 00 74 */ stw r0, 0x74(r1)
/* 80270184 DB E1 00 60 */ stfd f31, 0x60(r1)
/* 80270188 F3 E1 00 68 */ psq_st f31, 104(r1), 0, 0 /* qr0 */
/* 8027018C DB C1 00 50 */ stfd f30, 0x50(r1)
/* 80270190 F3 C1 00 58 */ psq_st f30, 88(r1), 0, 0 /* qr0 */
/* 80270194 93 E1 00 4C */ stw r31, 0x4c(r1)
/* 80270198 93 C1 00 48 */ stw r30, 0x48(r1)
/* 8027019C 7C 7E 1B 78 */ mr r30, r3
/* 802701A0 7C 9F 23 78 */ mr r31, r4
/* 802701A4 FF C0 08 90 */ fmr f30, f1
/* 802701A8 FF E0 10 90 */ fmr f31, f2
/* 802701AC 4B FF 6E C1 */ bl __ne__4cXyzCFRC3Vec
/* 802701B0 54 60 06 3F */ clrlwi. r0, r3, 0x18
/* 802701B4 41 82 01 74 */ beq lbl_80270328
/* 802701B8 38 61 00 24 */ addi r3, r1, 0x24
/* 802701BC 7F C4 F3 78 */ mr r4, r30
/* 802701C0 7F E5 FB 78 */ mr r5, r31
/* 802701C4 4B FF 69 71 */ bl __mi__4cXyzCFRC3Vec
/* 802701C8 38 61 00 18 */ addi r3, r1, 0x18
/* 802701CC 38 81 00 24 */ addi r4, r1, 0x24
/* 802701D0 FC 20 F0 90 */ fmr f1, f30
/* 802701D4 4B FF 69 B1 */ bl __ml__4cXyzCFf
/* 802701D8 C0 01 00 18 */ lfs f0, 0x18(r1)
/* 802701DC D0 01 00 30 */ stfs f0, 0x30(r1)
/* 802701E0 C0 01 00 1C */ lfs f0, 0x1c(r1)
/* 802701E4 D0 01 00 34 */ stfs f0, 0x34(r1)
/* 802701E8 C0 01 00 20 */ lfs f0, 0x20(r1)
/* 802701EC D0 01 00 38 */ stfs f0, 0x38(r1)
/* 802701F0 38 61 00 30 */ addi r3, r1, 0x30
/* 802701F4 48 0D 6F 45 */ bl PSVECSquareMag
/* 802701F8 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 802701FC FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270200 40 81 00 58 */ ble lbl_80270258
/* 80270204 FC 00 08 34 */ frsqrte f0, f1
/* 80270208 C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 8027020C FC 44 00 32 */ fmul f2, f4, f0
/* 80270210 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 80270214 FC 00 00 32 */ fmul f0, f0, f0
/* 80270218 FC 01 00 32 */ fmul f0, f1, f0
/* 8027021C FC 03 00 28 */ fsub f0, f3, f0
/* 80270220 FC 02 00 32 */ fmul f0, f2, f0
/* 80270224 FC 44 00 32 */ fmul f2, f4, f0
/* 80270228 FC 00 00 32 */ fmul f0, f0, f0
/* 8027022C FC 01 00 32 */ fmul f0, f1, f0
/* 80270230 FC 03 00 28 */ fsub f0, f3, f0
/* 80270234 FC 02 00 32 */ fmul f0, f2, f0
/* 80270238 FC 44 00 32 */ fmul f2, f4, f0
/* 8027023C FC 00 00 32 */ fmul f0, f0, f0
/* 80270240 FC 01 00 32 */ fmul f0, f1, f0
/* 80270244 FC 03 00 28 */ fsub f0, f3, f0
/* 80270248 FC 02 00 32 */ fmul f0, f2, f0
/* 8027024C FC 21 00 32 */ fmul f1, f1, f0
/* 80270250 FC 20 08 18 */ frsp f1, f1
/* 80270254 48 00 00 88 */ b lbl_802702DC
lbl_80270258:
/* 80270258 C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 8027025C FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270260 40 80 00 10 */ bge lbl_80270270
/* 80270264 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 80270268 C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
/* 8027026C 48 00 00 70 */ b lbl_802702DC
lbl_80270270:
/* 80270270 D0 21 00 08 */ stfs f1, 8(r1)
/* 80270274 80 81 00 08 */ lwz r4, 8(r1)
/* 80270278 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 8027027C 3C 00 7F 80 */ lis r0, 0x7f80
/* 80270280 7C 03 00 00 */ cmpw r3, r0
/* 80270284 41 82 00 14 */ beq lbl_80270298
/* 80270288 40 80 00 40 */ bge lbl_802702C8
/* 8027028C 2C 03 00 00 */ cmpwi r3, 0
/* 80270290 41 82 00 20 */ beq lbl_802702B0
/* 80270294 48 00 00 34 */ b lbl_802702C8
lbl_80270298:
/* 80270298 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8027029C 41 82 00 0C */ beq lbl_802702A8
/* 802702A0 38 00 00 01 */ li r0, 1
/* 802702A4 48 00 00 28 */ b lbl_802702CC
lbl_802702A8:
/* 802702A8 38 00 00 02 */ li r0, 2
/* 802702AC 48 00 00 20 */ b lbl_802702CC
lbl_802702B0:
/* 802702B0 54 80 02 7F */ clrlwi. r0, r4, 9
/* 802702B4 41 82 00 0C */ beq lbl_802702C0
/* 802702B8 38 00 00 05 */ li r0, 5
/* 802702BC 48 00 00 10 */ b lbl_802702CC
lbl_802702C0:
/* 802702C0 38 00 00 03 */ li r0, 3
/* 802702C4 48 00 00 08 */ b lbl_802702CC
lbl_802702C8:
/* 802702C8 38 00 00 04 */ li r0, 4
lbl_802702CC:
/* 802702CC 2C 00 00 01 */ cmpwi r0, 1
/* 802702D0 40 82 00 0C */ bne lbl_802702DC
/* 802702D4 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 802702D8 C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
lbl_802702DC:
/* 802702DC FC 01 F8 40 */ fcmpo cr0, f1, f31
/* 802702E0 40 81 00 38 */ ble lbl_80270318
/* 802702E4 38 61 00 0C */ addi r3, r1, 0xc
/* 802702E8 38 81 00 30 */ addi r4, r1, 0x30
/* 802702EC 4B FF 6A 45 */ bl normZP__4cXyzCFv
/* 802702F0 C0 01 00 0C */ lfs f0, 0xc(r1)
/* 802702F4 D0 01 00 30 */ stfs f0, 0x30(r1)
/* 802702F8 C0 01 00 10 */ lfs f0, 0x10(r1)
/* 802702FC D0 01 00 34 */ stfs f0, 0x34(r1)
/* 80270300 C0 01 00 14 */ lfs f0, 0x14(r1)
/* 80270304 D0 01 00 38 */ stfs f0, 0x38(r1)
/* 80270308 38 61 00 30 */ addi r3, r1, 0x30
/* 8027030C 7C 64 1B 78 */ mr r4, r3
/* 80270310 FC 20 F8 90 */ fmr f1, f31
/* 80270314 48 0D 6D C5 */ bl PSVECScale
lbl_80270318:
/* 80270318 7F C3 F3 78 */ mr r3, r30
/* 8027031C 38 81 00 30 */ addi r4, r1, 0x30
/* 80270320 7F C5 F3 78 */ mr r5, r30
/* 80270324 48 0D 6D 91 */ bl PSVECSubtract
lbl_80270328:
/* 80270328 E3 E1 00 68 */ psq_l f31, 104(r1), 0, 0 /* qr0 */
/* 8027032C CB E1 00 60 */ lfd f31, 0x60(r1)
/* 80270330 E3 C1 00 58 */ psq_l f30, 88(r1), 0, 0 /* qr0 */
/* 80270334 CB C1 00 50 */ lfd f30, 0x50(r1)
/* 80270338 83 E1 00 4C */ lwz r31, 0x4c(r1)
/* 8027033C 83 C1 00 48 */ lwz r30, 0x48(r1)
/* 80270340 80 01 00 74 */ lwz r0, 0x74(r1)
/* 80270344 7C 08 03 A6 */ mtlr r0
/* 80270348 38 21 00 70 */ addi r1, r1, 0x70
/* 8027034C 4E 80 00 20 */ blr

137
asm/SSystem/SComponent/c_lib/cLib_addCalcPosXZ2__FP4cXyzRC4cXyzff.s
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lbl_80270350:
/* 80270350 94 21 FF 90 */ stwu r1, -0x70(r1)
/* 80270354 7C 08 02 A6 */ mflr r0
/* 80270358 90 01 00 74 */ stw r0, 0x74(r1)
/* 8027035C DB E1 00 60 */ stfd f31, 0x60(r1)
/* 80270360 F3 E1 00 68 */ psq_st f31, 104(r1), 0, 0 /* qr0 */
/* 80270364 DB C1 00 50 */ stfd f30, 0x50(r1)
/* 80270368 F3 C1 00 58 */ psq_st f30, 88(r1), 0, 0 /* qr0 */
/* 8027036C 93 E1 00 4C */ stw r31, 0x4c(r1)
/* 80270370 7C 7F 1B 78 */ mr r31, r3
/* 80270374 7C 85 23 78 */ mr r5, r4
/* 80270378 FF C0 08 90 */ fmr f30, f1
/* 8027037C FF E0 10 90 */ fmr f31, f2
/* 80270380 C0 23 00 00 */ lfs f1, 0(r3)
/* 80270384 C0 04 00 00 */ lfs f0, 0(r4)
/* 80270388 FC 01 00 00 */ fcmpu cr0, f1, f0
/* 8027038C 40 82 00 14 */ bne lbl_802703A0
/* 80270390 C0 3F 00 08 */ lfs f1, 8(r31)
/* 80270394 C0 05 00 08 */ lfs f0, 8(r5)
/* 80270398 FC 01 00 00 */ fcmpu cr0, f1, f0
/* 8027039C 41 82 01 80 */ beq lbl_8027051C
lbl_802703A0:
/* 802703A0 38 61 00 24 */ addi r3, r1, 0x24
/* 802703A4 7F E4 FB 78 */ mr r4, r31
/* 802703A8 4B FF 67 8D */ bl __mi__4cXyzCFRC3Vec
/* 802703AC 38 61 00 18 */ addi r3, r1, 0x18
/* 802703B0 38 81 00 24 */ addi r4, r1, 0x24
/* 802703B4 FC 20 F0 90 */ fmr f1, f30
/* 802703B8 4B FF 67 CD */ bl __ml__4cXyzCFf
/* 802703BC C0 41 00 18 */ lfs f2, 0x18(r1)
/* 802703C0 D0 41 00 30 */ stfs f2, 0x30(r1)
/* 802703C4 C0 01 00 1C */ lfs f0, 0x1c(r1)
/* 802703C8 D0 01 00 34 */ stfs f0, 0x34(r1)
/* 802703CC C0 21 00 20 */ lfs f1, 0x20(r1)
/* 802703D0 D0 21 00 38 */ stfs f1, 0x38(r1)
/* 802703D4 D0 41 00 0C */ stfs f2, 0xc(r1)
/* 802703D8 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 802703DC D0 01 00 10 */ stfs f0, 0x10(r1)
/* 802703E0 D0 21 00 14 */ stfs f1, 0x14(r1)
/* 802703E4 38 61 00 0C */ addi r3, r1, 0xc
/* 802703E8 48 0D 6D 51 */ bl PSVECSquareMag
/* 802703EC C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 802703F0 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 802703F4 40 81 00 58 */ ble lbl_8027044C
/* 802703F8 FC 00 08 34 */ frsqrte f0, f1
/* 802703FC C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 80270400 FC 44 00 32 */ fmul f2, f4, f0
/* 80270404 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 80270408 FC 00 00 32 */ fmul f0, f0, f0
/* 8027040C FC 01 00 32 */ fmul f0, f1, f0
/* 80270410 FC 03 00 28 */ fsub f0, f3, f0
/* 80270414 FC 02 00 32 */ fmul f0, f2, f0
/* 80270418 FC 44 00 32 */ fmul f2, f4, f0
/* 8027041C FC 00 00 32 */ fmul f0, f0, f0
/* 80270420 FC 01 00 32 */ fmul f0, f1, f0
/* 80270424 FC 03 00 28 */ fsub f0, f3, f0
/* 80270428 FC 02 00 32 */ fmul f0, f2, f0
/* 8027042C FC 44 00 32 */ fmul f2, f4, f0
/* 80270430 FC 00 00 32 */ fmul f0, f0, f0
/* 80270434 FC 01 00 32 */ fmul f0, f1, f0
/* 80270438 FC 03 00 28 */ fsub f0, f3, f0
/* 8027043C FC 02 00 32 */ fmul f0, f2, f0
/* 80270440 FC 21 00 32 */ fmul f1, f1, f0
/* 80270444 FC 20 08 18 */ frsp f1, f1
/* 80270448 48 00 00 88 */ b lbl_802704D0
lbl_8027044C:
/* 8027044C C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 80270450 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270454 40 80 00 10 */ bge lbl_80270464
/* 80270458 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 8027045C C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
/* 80270460 48 00 00 70 */ b lbl_802704D0
lbl_80270464:
/* 80270464 D0 21 00 08 */ stfs f1, 8(r1)
/* 80270468 80 81 00 08 */ lwz r4, 8(r1)
/* 8027046C 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 80270470 3C 00 7F 80 */ lis r0, 0x7f80
/* 80270474 7C 03 00 00 */ cmpw r3, r0
/* 80270478 41 82 00 14 */ beq lbl_8027048C
/* 8027047C 40 80 00 40 */ bge lbl_802704BC
/* 80270480 2C 03 00 00 */ cmpwi r3, 0
/* 80270484 41 82 00 20 */ beq lbl_802704A4
/* 80270488 48 00 00 34 */ b lbl_802704BC
lbl_8027048C:
/* 8027048C 54 80 02 7F */ clrlwi. r0, r4, 9
/* 80270490 41 82 00 0C */ beq lbl_8027049C
/* 80270494 38 00 00 01 */ li r0, 1
/* 80270498 48 00 00 28 */ b lbl_802704C0
lbl_8027049C:
/* 8027049C 38 00 00 02 */ li r0, 2
/* 802704A0 48 00 00 20 */ b lbl_802704C0
lbl_802704A4:
/* 802704A4 54 80 02 7F */ clrlwi. r0, r4, 9
/* 802704A8 41 82 00 0C */ beq lbl_802704B4
/* 802704AC 38 00 00 05 */ li r0, 5
/* 802704B0 48 00 00 10 */ b lbl_802704C0
lbl_802704B4:
/* 802704B4 38 00 00 03 */ li r0, 3
/* 802704B8 48 00 00 08 */ b lbl_802704C0
lbl_802704BC:
/* 802704BC 38 00 00 04 */ li r0, 4
lbl_802704C0:
/* 802704C0 2C 00 00 01 */ cmpwi r0, 1
/* 802704C4 40 82 00 0C */ bne lbl_802704D0
/* 802704C8 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 802704CC C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
lbl_802704D0:
/* 802704D0 FC 00 0A 10 */ fabs f0, f1
/* 802704D4 FC 40 00 18 */ frsp f2, f0
/* 802704D8 C0 02 B8 00 */ lfs f0, lit_2382(r2)
/* 802704DC FC 02 00 40 */ fcmpo cr0, f2, f0
/* 802704E0 41 80 00 3C */ blt lbl_8027051C
/* 802704E4 FC 01 F8 40 */ fcmpo cr0, f1, f31
/* 802704E8 40 81 00 14 */ ble lbl_802704FC
/* 802704EC 38 61 00 30 */ addi r3, r1, 0x30
/* 802704F0 7C 64 1B 78 */ mr r4, r3
/* 802704F4 EC 3F 08 24 */ fdivs f1, f31, f1
/* 802704F8 48 0D 6B E1 */ bl PSVECScale
lbl_802704FC:
/* 802704FC C0 3F 00 00 */ lfs f1, 0(r31)
/* 80270500 C0 01 00 30 */ lfs f0, 0x30(r1)
/* 80270504 EC 01 00 28 */ fsubs f0, f1, f0
/* 80270508 D0 1F 00 00 */ stfs f0, 0(r31)
/* 8027050C C0 3F 00 08 */ lfs f1, 8(r31)
/* 80270510 C0 01 00 38 */ lfs f0, 0x38(r1)
/* 80270514 EC 01 00 28 */ fsubs f0, f1, f0
/* 80270518 D0 1F 00 08 */ stfs f0, 8(r31)
lbl_8027051C:
/* 8027051C E3 E1 00 68 */ psq_l f31, 104(r1), 0, 0 /* qr0 */
/* 80270520 CB E1 00 60 */ lfd f31, 0x60(r1)
/* 80270524 E3 C1 00 58 */ psq_l f30, 88(r1), 0, 0 /* qr0 */
/* 80270528 CB C1 00 50 */ lfd f30, 0x50(r1)
/* 8027052C 83 E1 00 4C */ lwz r31, 0x4c(r1)
/* 80270530 80 01 00 74 */ lwz r0, 0x74(r1)
/* 80270534 7C 08 03 A6 */ mtlr r0
/* 80270538 38 21 00 70 */ addi r1, r1, 0x70
/* 8027053C 4E 80 00 20 */ blr

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asm/SSystem/SComponent/c_lib/cLib_addCalcPosXZ__FP4cXyzRC4cXyzfff.s
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lbl_8026FDF4:
/* 8026FDF4 94 21 FF 60 */ stwu r1, -0xa0(r1)
/* 8026FDF8 7C 08 02 A6 */ mflr r0
/* 8026FDFC 90 01 00 A4 */ stw r0, 0xa4(r1)
/* 8026FE00 DB E1 00 90 */ stfd f31, 0x90(r1)
/* 8026FE04 F3 E1 00 98 */ psq_st f31, 152(r1), 0, 0 /* qr0 */
/* 8026FE08 DB C1 00 80 */ stfd f30, 0x80(r1)
/* 8026FE0C F3 C1 00 88 */ psq_st f30, 136(r1), 0, 0 /* qr0 */
/* 8026FE10 DB A1 00 70 */ stfd f29, 0x70(r1)
/* 8026FE14 F3 A1 00 78 */ psq_st f29, 120(r1), 0, 0 /* qr0 */
/* 8026FE18 DB 81 00 60 */ stfd f28, 0x60(r1)
/* 8026FE1C F3 81 00 68 */ psq_st f28, 104(r1), 0, 0 /* qr0 */
/* 8026FE20 93 E1 00 5C */ stw r31, 0x5c(r1)
/* 8026FE24 93 C1 00 58 */ stw r30, 0x58(r1)
/* 8026FE28 7C 7E 1B 78 */ mr r30, r3
/* 8026FE2C 7C 9F 23 78 */ mr r31, r4
/* 8026FE30 FF A0 08 90 */ fmr f29, f1
/* 8026FE34 FF C0 10 90 */ fmr f30, f2
/* 8026FE38 FF E0 18 90 */ fmr f31, f3
/* 8026FE3C C0 23 00 00 */ lfs f1, 0(r3)
/* 8026FE40 C0 04 00 00 */ lfs f0, 0(r4)
/* 8026FE44 FC 01 00 00 */ fcmpu cr0, f1, f0
/* 8026FE48 40 82 00 14 */ bne lbl_8026FE5C
/* 8026FE4C C0 3E 00 08 */ lfs f1, 8(r30)
/* 8026FE50 C0 1F 00 08 */ lfs f0, 8(r31)
/* 8026FE54 FC 01 00 00 */ fcmpu cr0, f1, f0
/* 8026FE58 41 82 01 D4 */ beq lbl_8027002C
lbl_8026FE5C:
/* 8026FE5C 38 61 00 34 */ addi r3, r1, 0x34
/* 8026FE60 7F C4 F3 78 */ mr r4, r30
/* 8026FE64 7F E5 FB 78 */ mr r5, r31
/* 8026FE68 4B FF 6C CD */ bl __mi__4cXyzCFRC3Vec
/* 8026FE6C C0 41 00 34 */ lfs f2, 0x34(r1)
/* 8026FE70 D0 41 00 40 */ stfs f2, 0x40(r1)
/* 8026FE74 C0 01 00 38 */ lfs f0, 0x38(r1)
/* 8026FE78 D0 01 00 44 */ stfs f0, 0x44(r1)
/* 8026FE7C C0 21 00 3C */ lfs f1, 0x3c(r1)
/* 8026FE80 D0 21 00 48 */ stfs f1, 0x48(r1)
/* 8026FE84 D0 41 00 1C */ stfs f2, 0x1c(r1)
/* 8026FE88 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 8026FE8C D0 01 00 20 */ stfs f0, 0x20(r1)
/* 8026FE90 D0 21 00 24 */ stfs f1, 0x24(r1)
/* 8026FE94 38 61 00 1C */ addi r3, r1, 0x1c
/* 8026FE98 48 0D 72 A1 */ bl PSVECSquareMag
/* 8026FE9C C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 8026FEA0 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8026FEA4 40 81 00 58 */ ble lbl_8026FEFC
/* 8026FEA8 FC 00 08 34 */ frsqrte f0, f1
/* 8026FEAC C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 8026FEB0 FC 44 00 32 */ fmul f2, f4, f0
/* 8026FEB4 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 8026FEB8 FC 00 00 32 */ fmul f0, f0, f0
/* 8026FEBC FC 01 00 32 */ fmul f0, f1, f0
/* 8026FEC0 FC 03 00 28 */ fsub f0, f3, f0
/* 8026FEC4 FC 02 00 32 */ fmul f0, f2, f0
/* 8026FEC8 FC 44 00 32 */ fmul f2, f4, f0
/* 8026FECC FC 00 00 32 */ fmul f0, f0, f0
/* 8026FED0 FC 01 00 32 */ fmul f0, f1, f0
/* 8026FED4 FC 03 00 28 */ fsub f0, f3, f0
/* 8026FED8 FC 02 00 32 */ fmul f0, f2, f0
/* 8026FEDC FC 44 00 32 */ fmul f2, f4, f0
/* 8026FEE0 FC 00 00 32 */ fmul f0, f0, f0
/* 8026FEE4 FC 01 00 32 */ fmul f0, f1, f0
/* 8026FEE8 FC 03 00 28 */ fsub f0, f3, f0
/* 8026FEEC FC 02 00 32 */ fmul f0, f2, f0
/* 8026FEF0 FC 21 00 32 */ fmul f1, f1, f0
/* 8026FEF4 FC 20 08 18 */ frsp f1, f1
/* 8026FEF8 48 00 00 88 */ b lbl_8026FF80
lbl_8026FEFC:
/* 8026FEFC C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 8026FF00 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8026FF04 40 80 00 10 */ bge lbl_8026FF14
/* 8026FF08 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 8026FF0C C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
/* 8026FF10 48 00 00 70 */ b lbl_8026FF80
lbl_8026FF14:
/* 8026FF14 D0 21 00 0C */ stfs f1, 0xc(r1)
/* 8026FF18 80 81 00 0C */ lwz r4, 0xc(r1)
/* 8026FF1C 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 8026FF20 3C 00 7F 80 */ lis r0, 0x7f80
/* 8026FF24 7C 03 00 00 */ cmpw r3, r0
/* 8026FF28 41 82 00 14 */ beq lbl_8026FF3C
/* 8026FF2C 40 80 00 40 */ bge lbl_8026FF6C
/* 8026FF30 2C 03 00 00 */ cmpwi r3, 0
/* 8026FF34 41 82 00 20 */ beq lbl_8026FF54
/* 8026FF38 48 00 00 34 */ b lbl_8026FF6C
lbl_8026FF3C:
/* 8026FF3C 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8026FF40 41 82 00 0C */ beq lbl_8026FF4C
/* 8026FF44 38 00 00 01 */ li r0, 1
/* 8026FF48 48 00 00 28 */ b lbl_8026FF70
lbl_8026FF4C:
/* 8026FF4C 38 00 00 02 */ li r0, 2
/* 8026FF50 48 00 00 20 */ b lbl_8026FF70
lbl_8026FF54:
/* 8026FF54 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8026FF58 41 82 00 0C */ beq lbl_8026FF64
/* 8026FF5C 38 00 00 05 */ li r0, 5
/* 8026FF60 48 00 00 10 */ b lbl_8026FF70
lbl_8026FF64:
/* 8026FF64 38 00 00 03 */ li r0, 3
/* 8026FF68 48 00 00 08 */ b lbl_8026FF70
lbl_8026FF6C:
/* 8026FF6C 38 00 00 04 */ li r0, 4
lbl_8026FF70:
/* 8026FF70 2C 00 00 01 */ cmpwi r0, 1
/* 8026FF74 40 82 00 0C */ bne lbl_8026FF80
/* 8026FF78 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 8026FF7C C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
lbl_8026FF80:
/* 8026FF80 FC 01 F8 40 */ fcmpo cr0, f1, f31
/* 8026FF84 40 80 00 18 */ bge lbl_8026FF9C
/* 8026FF88 C0 1F 00 00 */ lfs f0, 0(r31)
/* 8026FF8C D0 1E 00 00 */ stfs f0, 0(r30)
/* 8026FF90 C0 1F 00 08 */ lfs f0, 8(r31)
/* 8026FF94 D0 1E 00 08 */ stfs f0, 8(r30)
/* 8026FF98 48 00 00 94 */ b lbl_8027002C
lbl_8026FF9C:
/* 8026FF9C EF 81 07 72 */ fmuls f28, f1, f29
/* 8026FFA0 38 61 00 40 */ addi r3, r1, 0x40
/* 8026FFA4 7C 64 1B 78 */ mr r4, r3
/* 8026FFA8 FC 20 E8 90 */ fmr f1, f29
/* 8026FFAC 48 0D 71 2D */ bl PSVECScale
/* 8026FFB0 FC 00 E2 10 */ fabs f0, f28
/* 8026FFB4 FC 20 00 18 */ frsp f1, f0
/* 8026FFB8 C0 02 B8 00 */ lfs f0, lit_2382(r2)
/* 8026FFBC FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8026FFC0 41 80 00 5C */ blt lbl_8027001C
/* 8026FFC4 FC 1C F0 40 */ fcmpo cr0, f28, f30
/* 8026FFC8 40 81 00 18 */ ble lbl_8026FFE0
/* 8026FFCC 38 61 00 40 */ addi r3, r1, 0x40
/* 8026FFD0 7C 64 1B 78 */ mr r4, r3
/* 8026FFD4 EC 3E E0 24 */ fdivs f1, f30, f28
/* 8026FFD8 48 0D 71 01 */ bl PSVECScale
/* 8026FFDC 48 00 00 1C */ b lbl_8026FFF8
lbl_8026FFE0:
/* 8026FFE0 FC 1C F8 40 */ fcmpo cr0, f28, f31
/* 8026FFE4 40 80 00 14 */ bge lbl_8026FFF8
/* 8026FFE8 38 61 00 40 */ addi r3, r1, 0x40
/* 8026FFEC 7C 64 1B 78 */ mr r4, r3
/* 8026FFF0 EC 3F E0 24 */ fdivs f1, f31, f28
/* 8026FFF4 48 0D 70 E5 */ bl PSVECScale
lbl_8026FFF8:
/* 8026FFF8 C0 3E 00 00 */ lfs f1, 0(r30)
/* 8026FFFC C0 01 00 40 */ lfs f0, 0x40(r1)
/* 80270000 EC 01 00 28 */ fsubs f0, f1, f0
/* 80270004 D0 1E 00 00 */ stfs f0, 0(r30)
/* 80270008 C0 3E 00 08 */ lfs f1, 8(r30)
/* 8027000C C0 01 00 48 */ lfs f0, 0x48(r1)
/* 80270010 EC 01 00 28 */ fsubs f0, f1, f0
/* 80270014 D0 1E 00 08 */ stfs f0, 8(r30)
/* 80270018 48 00 00 14 */ b lbl_8027002C
lbl_8027001C:
/* 8027001C C0 1F 00 00 */ lfs f0, 0(r31)
/* 80270020 D0 1E 00 00 */ stfs f0, 0(r30)
/* 80270024 C0 1F 00 08 */ lfs f0, 8(r31)
/* 80270028 D0 1E 00 08 */ stfs f0, 8(r30)
lbl_8027002C:
/* 8027002C 38 61 00 28 */ addi r3, r1, 0x28
/* 80270030 7F C4 F3 78 */ mr r4, r30
/* 80270034 7F E5 FB 78 */ mr r5, r31
/* 80270038 4B FF 6A FD */ bl __mi__4cXyzCFRC3Vec
/* 8027003C C0 01 00 28 */ lfs f0, 0x28(r1)
/* 80270040 D0 01 00 10 */ stfs f0, 0x10(r1)
/* 80270044 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 80270048 D0 01 00 14 */ stfs f0, 0x14(r1)
/* 8027004C C0 01 00 30 */ lfs f0, 0x30(r1)
/* 80270050 D0 01 00 18 */ stfs f0, 0x18(r1)
/* 80270054 38 61 00 10 */ addi r3, r1, 0x10
/* 80270058 48 0D 70 E1 */ bl PSVECSquareMag
/* 8027005C C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 80270060 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270064 40 81 00 58 */ ble lbl_802700BC
/* 80270068 FC 00 08 34 */ frsqrte f0, f1
/* 8027006C C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 80270070 FC 44 00 32 */ fmul f2, f4, f0
/* 80270074 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 80270078 FC 00 00 32 */ fmul f0, f0, f0
/* 8027007C FC 01 00 32 */ fmul f0, f1, f0
/* 80270080 FC 03 00 28 */ fsub f0, f3, f0
/* 80270084 FC 02 00 32 */ fmul f0, f2, f0
/* 80270088 FC 44 00 32 */ fmul f2, f4, f0
/* 8027008C FC 00 00 32 */ fmul f0, f0, f0
/* 80270090 FC 01 00 32 */ fmul f0, f1, f0
/* 80270094 FC 03 00 28 */ fsub f0, f3, f0
/* 80270098 FC 02 00 32 */ fmul f0, f2, f0
/* 8027009C FC 44 00 32 */ fmul f2, f4, f0
/* 802700A0 FC 00 00 32 */ fmul f0, f0, f0
/* 802700A4 FC 01 00 32 */ fmul f0, f1, f0
/* 802700A8 FC 03 00 28 */ fsub f0, f3, f0
/* 802700AC FC 02 00 32 */ fmul f0, f2, f0
/* 802700B0 FC 21 00 32 */ fmul f1, f1, f0
/* 802700B4 FC 20 08 18 */ frsp f1, f1
/* 802700B8 48 00 00 88 */ b lbl_80270140
lbl_802700BC:
/* 802700BC C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 802700C0 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 802700C4 40 80 00 10 */ bge lbl_802700D4
/* 802700C8 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 802700CC C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
/* 802700D0 48 00 00 70 */ b lbl_80270140
lbl_802700D4:
/* 802700D4 D0 21 00 08 */ stfs f1, 8(r1)
/* 802700D8 80 81 00 08 */ lwz r4, 8(r1)
/* 802700DC 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 802700E0 3C 00 7F 80 */ lis r0, 0x7f80
/* 802700E4 7C 03 00 00 */ cmpw r3, r0
/* 802700E8 41 82 00 14 */ beq lbl_802700FC
/* 802700EC 40 80 00 40 */ bge lbl_8027012C
/* 802700F0 2C 03 00 00 */ cmpwi r3, 0
/* 802700F4 41 82 00 20 */ beq lbl_80270114
/* 802700F8 48 00 00 34 */ b lbl_8027012C
lbl_802700FC:
/* 802700FC 54 80 02 7F */ clrlwi. r0, r4, 9
/* 80270100 41 82 00 0C */ beq lbl_8027010C
/* 80270104 38 00 00 01 */ li r0, 1
/* 80270108 48 00 00 28 */ b lbl_80270130
lbl_8027010C:
/* 8027010C 38 00 00 02 */ li r0, 2
/* 80270110 48 00 00 20 */ b lbl_80270130
lbl_80270114:
/* 80270114 54 80 02 7F */ clrlwi. r0, r4, 9
/* 80270118 41 82 00 0C */ beq lbl_80270124
/* 8027011C 38 00 00 05 */ li r0, 5
/* 80270120 48 00 00 10 */ b lbl_80270130
lbl_80270124:
/* 80270124 38 00 00 03 */ li r0, 3
/* 80270128 48 00 00 08 */ b lbl_80270130
lbl_8027012C:
/* 8027012C 38 00 00 04 */ li r0, 4
lbl_80270130:
/* 80270130 2C 00 00 01 */ cmpwi r0, 1
/* 80270134 40 82 00 0C */ bne lbl_80270140
/* 80270138 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 8027013C C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
lbl_80270140:
/* 80270140 E3 E1 00 98 */ psq_l f31, 152(r1), 0, 0 /* qr0 */
/* 80270144 CB E1 00 90 */ lfd f31, 0x90(r1)
/* 80270148 E3 C1 00 88 */ psq_l f30, 136(r1), 0, 0 /* qr0 */
/* 8027014C CB C1 00 80 */ lfd f30, 0x80(r1)
/* 80270150 E3 A1 00 78 */ psq_l f29, 120(r1), 0, 0 /* qr0 */
/* 80270154 CB A1 00 70 */ lfd f29, 0x70(r1)
/* 80270158 E3 81 00 68 */ psq_l f28, 104(r1), 0, 0 /* qr0 */
/* 8027015C CB 81 00 60 */ lfd f28, 0x60(r1)
/* 80270160 83 E1 00 5C */ lwz r31, 0x5c(r1)
/* 80270164 83 C1 00 58 */ lwz r30, 0x58(r1)
/* 80270168 80 01 00 A4 */ lwz r0, 0xa4(r1)
/* 8027016C 7C 08 03 A6 */ mtlr r0
/* 80270170 38 21 00 A0 */ addi r1, r1, 0xa0
/* 80270174 4E 80 00 20 */ blr

231
asm/SSystem/SComponent/c_lib/cLib_addCalcPos__FP4cXyzRC4cXyzfff.s
View File

@ -1,231 +0,0 @@
lbl_8026FAB8:
/* 8026FAB8 94 21 FF 90 */ stwu r1, -0x70(r1)
/* 8026FABC 7C 08 02 A6 */ mflr r0
/* 8026FAC0 90 01 00 74 */ stw r0, 0x74(r1)
/* 8026FAC4 DB E1 00 60 */ stfd f31, 0x60(r1)
/* 8026FAC8 F3 E1 00 68 */ psq_st f31, 104(r1), 0, 0 /* qr0 */
/* 8026FACC DB C1 00 50 */ stfd f30, 0x50(r1)
/* 8026FAD0 F3 C1 00 58 */ psq_st f30, 88(r1), 0, 0 /* qr0 */
/* 8026FAD4 DB A1 00 40 */ stfd f29, 0x40(r1)
/* 8026FAD8 F3 A1 00 48 */ psq_st f29, 72(r1), 0, 0 /* qr0 */
/* 8026FADC DB 81 00 30 */ stfd f28, 0x30(r1)
/* 8026FAE0 F3 81 00 38 */ psq_st f28, 56(r1), 0, 0 /* qr0 */
/* 8026FAE4 93 E1 00 2C */ stw r31, 0x2c(r1)
/* 8026FAE8 93 C1 00 28 */ stw r30, 0x28(r1)
/* 8026FAEC 7C 7E 1B 78 */ mr r30, r3
/* 8026FAF0 7C 9F 23 78 */ mr r31, r4
/* 8026FAF4 FF A0 08 90 */ fmr f29, f1
/* 8026FAF8 FF C0 10 90 */ fmr f30, f2
/* 8026FAFC FF E0 18 90 */ fmr f31, f3
/* 8026FB00 4B FF 75 6D */ bl __ne__4cXyzCFRC3Vec
/* 8026FB04 54 60 06 3F */ clrlwi. r0, r3, 0x18
/* 8026FB08 41 82 01 C4 */ beq lbl_8026FCCC
/* 8026FB0C 38 61 00 10 */ addi r3, r1, 0x10
/* 8026FB10 7F C4 F3 78 */ mr r4, r30
/* 8026FB14 7F E5 FB 78 */ mr r5, r31
/* 8026FB18 4B FF 70 1D */ bl __mi__4cXyzCFRC3Vec
/* 8026FB1C C0 01 00 10 */ lfs f0, 0x10(r1)
/* 8026FB20 D0 01 00 1C */ stfs f0, 0x1c(r1)
/* 8026FB24 C0 01 00 14 */ lfs f0, 0x14(r1)
/* 8026FB28 D0 01 00 20 */ stfs f0, 0x20(r1)
/* 8026FB2C C0 01 00 18 */ lfs f0, 0x18(r1)
/* 8026FB30 D0 01 00 24 */ stfs f0, 0x24(r1)
/* 8026FB34 38 61 00 1C */ addi r3, r1, 0x1c
/* 8026FB38 48 0D 76 01 */ bl PSVECSquareMag
/* 8026FB3C C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 8026FB40 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8026FB44 40 81 00 58 */ ble lbl_8026FB9C
/* 8026FB48 FC 00 08 34 */ frsqrte f0, f1
/* 8026FB4C C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 8026FB50 FC 44 00 32 */ fmul f2, f4, f0
/* 8026FB54 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 8026FB58 FC 00 00 32 */ fmul f0, f0, f0
/* 8026FB5C FC 01 00 32 */ fmul f0, f1, f0
/* 8026FB60 FC 03 00 28 */ fsub f0, f3, f0
/* 8026FB64 FC 02 00 32 */ fmul f0, f2, f0
/* 8026FB68 FC 44 00 32 */ fmul f2, f4, f0
/* 8026FB6C FC 00 00 32 */ fmul f0, f0, f0
/* 8026FB70 FC 01 00 32 */ fmul f0, f1, f0
/* 8026FB74 FC 03 00 28 */ fsub f0, f3, f0
/* 8026FB78 FC 02 00 32 */ fmul f0, f2, f0
/* 8026FB7C FC 44 00 32 */ fmul f2, f4, f0
/* 8026FB80 FC 00 00 32 */ fmul f0, f0, f0
/* 8026FB84 FC 01 00 32 */ fmul f0, f1, f0
/* 8026FB88 FC 03 00 28 */ fsub f0, f3, f0
/* 8026FB8C FC 02 00 32 */ fmul f0, f2, f0
/* 8026FB90 FC 21 00 32 */ fmul f1, f1, f0
/* 8026FB94 FC 20 08 18 */ frsp f1, f1
/* 8026FB98 48 00 00 88 */ b lbl_8026FC20
lbl_8026FB9C:
/* 8026FB9C C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 8026FBA0 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8026FBA4 40 80 00 10 */ bge lbl_8026FBB4
/* 8026FBA8 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 8026FBAC C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
/* 8026FBB0 48 00 00 70 */ b lbl_8026FC20
lbl_8026FBB4:
/* 8026FBB4 D0 21 00 0C */ stfs f1, 0xc(r1)
/* 8026FBB8 80 81 00 0C */ lwz r4, 0xc(r1)
/* 8026FBBC 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 8026FBC0 3C 00 7F 80 */ lis r0, 0x7f80
/* 8026FBC4 7C 03 00 00 */ cmpw r3, r0
/* 8026FBC8 41 82 00 14 */ beq lbl_8026FBDC
/* 8026FBCC 40 80 00 40 */ bge lbl_8026FC0C
/* 8026FBD0 2C 03 00 00 */ cmpwi r3, 0
/* 8026FBD4 41 82 00 20 */ beq lbl_8026FBF4
/* 8026FBD8 48 00 00 34 */ b lbl_8026FC0C
lbl_8026FBDC:
/* 8026FBDC 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8026FBE0 41 82 00 0C */ beq lbl_8026FBEC
/* 8026FBE4 38 00 00 01 */ li r0, 1
/* 8026FBE8 48 00 00 28 */ b lbl_8026FC10
lbl_8026FBEC:
/* 8026FBEC 38 00 00 02 */ li r0, 2
/* 8026FBF0 48 00 00 20 */ b lbl_8026FC10
lbl_8026FBF4:
/* 8026FBF4 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8026FBF8 41 82 00 0C */ beq lbl_8026FC04
/* 8026FBFC 38 00 00 05 */ li r0, 5
/* 8026FC00 48 00 00 10 */ b lbl_8026FC10
lbl_8026FC04:
/* 8026FC04 38 00 00 03 */ li r0, 3
/* 8026FC08 48 00 00 08 */ b lbl_8026FC10
lbl_8026FC0C:
/* 8026FC0C 38 00 00 04 */ li r0, 4
lbl_8026FC10:
/* 8026FC10 2C 00 00 01 */ cmpwi r0, 1
/* 8026FC14 40 82 00 0C */ bne lbl_8026FC20
/* 8026FC18 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 8026FC1C C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
lbl_8026FC20:
/* 8026FC20 FC 01 F8 40 */ fcmpo cr0, f1, f31
/* 8026FC24 40 80 00 20 */ bge lbl_8026FC44
/* 8026FC28 C0 1F 00 00 */ lfs f0, 0(r31)
/* 8026FC2C D0 1E 00 00 */ stfs f0, 0(r30)
/* 8026FC30 C0 1F 00 04 */ lfs f0, 4(r31)
/* 8026FC34 D0 1E 00 04 */ stfs f0, 4(r30)
/* 8026FC38 C0 1F 00 08 */ lfs f0, 8(r31)
/* 8026FC3C D0 1E 00 08 */ stfs f0, 8(r30)
/* 8026FC40 48 00 00 8C */ b lbl_8026FCCC
lbl_8026FC44:
/* 8026FC44 EF 81 07 72 */ fmuls f28, f1, f29
/* 8026FC48 38 61 00 1C */ addi r3, r1, 0x1c
/* 8026FC4C 7C 64 1B 78 */ mr r4, r3
/* 8026FC50 FC 20 E8 90 */ fmr f1, f29
/* 8026FC54 48 0D 74 85 */ bl PSVECScale
/* 8026FC58 FC 00 E2 10 */ fabs f0, f28
/* 8026FC5C FC 20 00 18 */ frsp f1, f0
/* 8026FC60 C0 02 B8 00 */ lfs f0, lit_2382(r2)
/* 8026FC64 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8026FC68 41 80 00 4C */ blt lbl_8026FCB4
/* 8026FC6C FC 1C F0 40 */ fcmpo cr0, f28, f30
/* 8026FC70 40 81 00 18 */ ble lbl_8026FC88
/* 8026FC74 38 61 00 1C */ addi r3, r1, 0x1c
/* 8026FC78 7C 64 1B 78 */ mr r4, r3
/* 8026FC7C EC 3E E0 24 */ fdivs f1, f30, f28
/* 8026FC80 48 0D 74 59 */ bl PSVECScale
/* 8026FC84 48 00 00 1C */ b lbl_8026FCA0
lbl_8026FC88:
/* 8026FC88 FC 1C F8 40 */ fcmpo cr0, f28, f31
/* 8026FC8C 40 80 00 14 */ bge lbl_8026FCA0
/* 8026FC90 38 61 00 1C */ addi r3, r1, 0x1c
/* 8026FC94 7C 64 1B 78 */ mr r4, r3
/* 8026FC98 EC 3F E0 24 */ fdivs f1, f31, f28
/* 8026FC9C 48 0D 74 3D */ bl PSVECScale
lbl_8026FCA0:
/* 8026FCA0 7F C3 F3 78 */ mr r3, r30
/* 8026FCA4 38 81 00 1C */ addi r4, r1, 0x1c
/* 8026FCA8 7F C5 F3 78 */ mr r5, r30
/* 8026FCAC 48 0D 74 09 */ bl PSVECSubtract
/* 8026FCB0 48 00 00 1C */ b lbl_8026FCCC
lbl_8026FCB4:
/* 8026FCB4 C0 1F 00 00 */ lfs f0, 0(r31)
/* 8026FCB8 D0 1E 00 00 */ stfs f0, 0(r30)
/* 8026FCBC C0 1F 00 04 */ lfs f0, 4(r31)
/* 8026FCC0 D0 1E 00 04 */ stfs f0, 4(r30)
/* 8026FCC4 C0 1F 00 08 */ lfs f0, 8(r31)
/* 8026FCC8 D0 1E 00 08 */ stfs f0, 8(r30)
lbl_8026FCCC:
/* 8026FCCC 7F C3 F3 78 */ mr r3, r30
/* 8026FCD0 7F E4 FB 78 */ mr r4, r31
/* 8026FCD4 48 0D 76 C9 */ bl PSVECSquareDistance
/* 8026FCD8 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 8026FCDC FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8026FCE0 40 81 00 58 */ ble lbl_8026FD38
/* 8026FCE4 FC 00 08 34 */ frsqrte f0, f1
/* 8026FCE8 C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 8026FCEC FC 44 00 32 */ fmul f2, f4, f0
/* 8026FCF0 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 8026FCF4 FC 00 00 32 */ fmul f0, f0, f0
/* 8026FCF8 FC 01 00 32 */ fmul f0, f1, f0
/* 8026FCFC FC 03 00 28 */ fsub f0, f3, f0
/* 8026FD00 FC 02 00 32 */ fmul f0, f2, f0
/* 8026FD04 FC 44 00 32 */ fmul f2, f4, f0
/* 8026FD08 FC 00 00 32 */ fmul f0, f0, f0
/* 8026FD0C FC 01 00 32 */ fmul f0, f1, f0
/* 8026FD10 FC 03 00 28 */ fsub f0, f3, f0
/* 8026FD14 FC 02 00 32 */ fmul f0, f2, f0
/* 8026FD18 FC 44 00 32 */ fmul f2, f4, f0
/* 8026FD1C FC 00 00 32 */ fmul f0, f0, f0
/* 8026FD20 FC 01 00 32 */ fmul f0, f1, f0
/* 8026FD24 FC 03 00 28 */ fsub f0, f3, f0
/* 8026FD28 FC 02 00 32 */ fmul f0, f2, f0
/* 8026FD2C FC 21 00 32 */ fmul f1, f1, f0
/* 8026FD30 FC 20 08 18 */ frsp f1, f1
/* 8026FD34 48 00 00 88 */ b lbl_8026FDBC
lbl_8026FD38:
/* 8026FD38 C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 8026FD3C FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8026FD40 40 80 00 10 */ bge lbl_8026FD50
/* 8026FD44 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 8026FD48 C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
/* 8026FD4C 48 00 00 70 */ b lbl_8026FDBC
lbl_8026FD50:
/* 8026FD50 D0 21 00 08 */ stfs f1, 8(r1)
/* 8026FD54 80 81 00 08 */ lwz r4, 8(r1)
/* 8026FD58 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 8026FD5C 3C 00 7F 80 */ lis r0, 0x7f80
/* 8026FD60 7C 03 00 00 */ cmpw r3, r0
/* 8026FD64 41 82 00 14 */ beq lbl_8026FD78
/* 8026FD68 40 80 00 40 */ bge lbl_8026FDA8
/* 8026FD6C 2C 03 00 00 */ cmpwi r3, 0
/* 8026FD70 41 82 00 20 */ beq lbl_8026FD90
/* 8026FD74 48 00 00 34 */ b lbl_8026FDA8
lbl_8026FD78:
/* 8026FD78 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8026FD7C 41 82 00 0C */ beq lbl_8026FD88
/* 8026FD80 38 00 00 01 */ li r0, 1
/* 8026FD84 48 00 00 28 */ b lbl_8026FDAC
lbl_8026FD88:
/* 8026FD88 38 00 00 02 */ li r0, 2
/* 8026FD8C 48 00 00 20 */ b lbl_8026FDAC
lbl_8026FD90:
/* 8026FD90 54 80 02 7F */ clrlwi. r0, r4, 9
/* 8026FD94 41 82 00 0C */ beq lbl_8026FDA0
/* 8026FD98 38 00 00 05 */ li r0, 5
/* 8026FD9C 48 00 00 10 */ b lbl_8026FDAC
lbl_8026FDA0:
/* 8026FDA0 38 00 00 03 */ li r0, 3
/* 8026FDA4 48 00 00 08 */ b lbl_8026FDAC
lbl_8026FDA8:
/* 8026FDA8 38 00 00 04 */ li r0, 4
lbl_8026FDAC:
/* 8026FDAC 2C 00 00 01 */ cmpwi r0, 1
/* 8026FDB0 40 82 00 0C */ bne lbl_8026FDBC
/* 8026FDB4 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 8026FDB8 C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
lbl_8026FDBC:
/* 8026FDBC E3 E1 00 68 */ psq_l f31, 104(r1), 0, 0 /* qr0 */
/* 8026FDC0 CB E1 00 60 */ lfd f31, 0x60(r1)
/* 8026FDC4 E3 C1 00 58 */ psq_l f30, 88(r1), 0, 0 /* qr0 */
/* 8026FDC8 CB C1 00 50 */ lfd f30, 0x50(r1)
/* 8026FDCC E3 A1 00 48 */ psq_l f29, 72(r1), 0, 0 /* qr0 */
/* 8026FDD0 CB A1 00 40 */ lfd f29, 0x40(r1)
/* 8026FDD4 E3 81 00 38 */ psq_l f28, 56(r1), 0, 0 /* qr0 */
/* 8026FDD8 CB 81 00 30 */ lfd f28, 0x30(r1)
/* 8026FDDC 83 E1 00 2C */ lwz r31, 0x2c(r1)
/* 8026FDE0 83 C1 00 28 */ lwz r30, 0x28(r1)
/* 8026FDE4 80 01 00 74 */ lwz r0, 0x74(r1)
/* 8026FDE8 7C 08 03 A6 */ mtlr r0
/* 8026FDEC 38 21 00 70 */ addi r1, r1, 0x70
/* 8026FDF0 4E 80 00 20 */ blr

33
asm/SSystem/SComponent/c_lib/cLib_chaseAngleS__FPsss.s
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lbl_80270B90:
/* 80270B90 7C A0 07 35 */ extsh. r0, r5
/* 80270B94 41 82 00 50 */ beq lbl_80270BE4
/* 80270B98 7C 86 07 34 */ extsh r6, r4
/* 80270B9C A8 03 00 00 */ lha r0, 0(r3)
/* 80270BA0 7C 06 00 50 */ subf r0, r6, r0
/* 80270BA4 7C 00 07 35 */ extsh. r0, r0
/* 80270BA8 40 81 00 0C */ ble lbl_80270BB4
/* 80270BAC 7C 05 00 D0 */ neg r0, r5
/* 80270BB0 7C 05 07 34 */ extsh r5, r0
lbl_80270BB4:
/* 80270BB4 A8 03 00 00 */ lha r0, 0(r3)
/* 80270BB8 7C 00 2A 14 */ add r0, r0, r5
/* 80270BBC B0 03 00 00 */ sth r0, 0(r3)
/* 80270BC0 7C A5 07 34 */ extsh r5, r5
/* 80270BC4 A8 03 00 00 */ lha r0, 0(r3)
/* 80270BC8 7C 06 00 50 */ subf r0, r6, r0
/* 80270BCC 7C 00 07 34 */ extsh r0, r0
/* 80270BD0 7C 05 01 D7 */ mullw. r0, r5, r0
/* 80270BD4 41 80 00 28 */ blt lbl_80270BFC
/* 80270BD8 B0 83 00 00 */ sth r4, 0(r3)
/* 80270BDC 38 60 00 01 */ li r3, 1
/* 80270BE0 4E 80 00 20 */ blr
lbl_80270BE4:
/* 80270BE4 A8 63 00 00 */ lha r3, 0(r3)
/* 80270BE8 7C 80 07 34 */ extsh r0, r4
/* 80270BEC 7C 03 00 00 */ cmpw r3, r0
/* 80270BF0 40 82 00 0C */ bne lbl_80270BFC
/* 80270BF4 38 60 00 01 */ li r3, 1
/* 80270BF8 4E 80 00 20 */ blr
lbl_80270BFC:
/* 80270BFC 38 60 00 00 */ li r3, 0
/* 80270C00 4E 80 00 20 */ blr

31
asm/SSystem/SComponent/c_lib/cLib_chaseF__FPfff.s
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lbl_80270740:
/* 80270740 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 80270744 FC 02 00 00 */ fcmpu cr0, f2, f0
/* 80270748 41 82 00 48 */ beq lbl_80270790
/* 8027074C C0 03 00 00 */ lfs f0, 0(r3)
/* 80270750 FC 00 08 40 */ fcmpo cr0, f0, f1
/* 80270754 40 81 00 08 */ ble lbl_8027075C
/* 80270758 FC 40 10 50 */ fneg f2, f2
lbl_8027075C:
/* 8027075C C0 03 00 00 */ lfs f0, 0(r3)
/* 80270760 EC 00 10 2A */ fadds f0, f0, f2
/* 80270764 D0 03 00 00 */ stfs f0, 0(r3)
/* 80270768 C0 03 00 00 */ lfs f0, 0(r3)
/* 8027076C EC 00 08 28 */ fsubs f0, f0, f1
/* 80270770 EC 42 00 32 */ fmuls f2, f2, f0
/* 80270774 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 80270778 FC 02 00 40 */ fcmpo cr0, f2, f0
/* 8027077C 4C 41 13 82 */ cror 2, 1, 2
/* 80270780 40 82 00 24 */ bne lbl_802707A4
/* 80270784 D0 23 00 00 */ stfs f1, 0(r3)
/* 80270788 38 60 00 01 */ li r3, 1
/* 8027078C 4E 80 00 20 */ blr
lbl_80270790:
/* 80270790 C0 03 00 00 */ lfs f0, 0(r3)
/* 80270794 FC 00 08 00 */ fcmpu cr0, f0, f1
/* 80270798 40 82 00 0C */ bne lbl_802707A4
/* 8027079C 38 60 00 01 */ li r3, 1
/* 802707A0 4E 80 00 20 */ blr
lbl_802707A4:
/* 802707A4 38 60 00 00 */ li r3, 0
/* 802707A8 4E 80 00 20 */ blr

143
asm/SSystem/SComponent/c_lib/cLib_chasePosXZ__FP4cXyzRC4cXyzf.s
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lbl_80270990:
/* 80270990 94 21 FF A0 */ stwu r1, -0x60(r1)
/* 80270994 7C 08 02 A6 */ mflr r0
/* 80270998 90 01 00 64 */ stw r0, 0x64(r1)
/* 8027099C DB E1 00 50 */ stfd f31, 0x50(r1)
/* 802709A0 F3 E1 00 58 */ psq_st f31, 88(r1), 0, 0 /* qr0 */
/* 802709A4 93 E1 00 4C */ stw r31, 0x4c(r1)
/* 802709A8 93 C1 00 48 */ stw r30, 0x48(r1)
/* 802709AC 7C 7E 1B 78 */ mr r30, r3
/* 802709B0 7C 9F 23 78 */ mr r31, r4
/* 802709B4 FF E0 08 90 */ fmr f31, f1
/* 802709B8 38 61 00 24 */ addi r3, r1, 0x24
/* 802709BC 7F C4 F3 78 */ mr r4, r30
/* 802709C0 7F E5 FB 78 */ mr r5, r31
/* 802709C4 4B FF 61 71 */ bl __mi__4cXyzCFRC3Vec
/* 802709C8 C0 41 00 24 */ lfs f2, 0x24(r1)
/* 802709CC D0 41 00 30 */ stfs f2, 0x30(r1)
/* 802709D0 C0 01 00 28 */ lfs f0, 0x28(r1)
/* 802709D4 D0 01 00 34 */ stfs f0, 0x34(r1)
/* 802709D8 C0 21 00 2C */ lfs f1, 0x2c(r1)
/* 802709DC D0 21 00 38 */ stfs f1, 0x38(r1)
/* 802709E0 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 802709E4 D0 01 00 34 */ stfs f0, 0x34(r1)
/* 802709E8 D0 41 00 0C */ stfs f2, 0xc(r1)
/* 802709EC D0 01 00 10 */ stfs f0, 0x10(r1)
/* 802709F0 D0 21 00 14 */ stfs f1, 0x14(r1)
/* 802709F4 38 61 00 0C */ addi r3, r1, 0xc
/* 802709F8 48 0D 67 41 */ bl PSVECSquareMag
/* 802709FC C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 80270A00 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270A04 40 81 00 58 */ ble lbl_80270A5C
/* 80270A08 FC 00 08 34 */ frsqrte f0, f1
/* 80270A0C C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 80270A10 FC 44 00 32 */ fmul f2, f4, f0
/* 80270A14 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 80270A18 FC 00 00 32 */ fmul f0, f0, f0
/* 80270A1C FC 01 00 32 */ fmul f0, f1, f0
/* 80270A20 FC 03 00 28 */ fsub f0, f3, f0
/* 80270A24 FC 02 00 32 */ fmul f0, f2, f0
/* 80270A28 FC 44 00 32 */ fmul f2, f4, f0
/* 80270A2C FC 00 00 32 */ fmul f0, f0, f0
/* 80270A30 FC 01 00 32 */ fmul f0, f1, f0
/* 80270A34 FC 03 00 28 */ fsub f0, f3, f0
/* 80270A38 FC 02 00 32 */ fmul f0, f2, f0
/* 80270A3C FC 44 00 32 */ fmul f2, f4, f0
/* 80270A40 FC 00 00 32 */ fmul f0, f0, f0
/* 80270A44 FC 01 00 32 */ fmul f0, f1, f0
/* 80270A48 FC 03 00 28 */ fsub f0, f3, f0
/* 80270A4C FC 02 00 32 */ fmul f0, f2, f0
/* 80270A50 FC 21 00 32 */ fmul f1, f1, f0
/* 80270A54 FC 20 08 18 */ frsp f1, f1
/* 80270A58 48 00 00 88 */ b lbl_80270AE0
lbl_80270A5C:
/* 80270A5C C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 80270A60 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270A64 40 80 00 10 */ bge lbl_80270A74
/* 80270A68 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 80270A6C C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
/* 80270A70 48 00 00 70 */ b lbl_80270AE0
lbl_80270A74:
/* 80270A74 D0 21 00 08 */ stfs f1, 8(r1)
/* 80270A78 80 81 00 08 */ lwz r4, 8(r1)
/* 80270A7C 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 80270A80 3C 00 7F 80 */ lis r0, 0x7f80
/* 80270A84 7C 03 00 00 */ cmpw r3, r0
/* 80270A88 41 82 00 14 */ beq lbl_80270A9C
/* 80270A8C 40 80 00 40 */ bge lbl_80270ACC
/* 80270A90 2C 03 00 00 */ cmpwi r3, 0
/* 80270A94 41 82 00 20 */ beq lbl_80270AB4
/* 80270A98 48 00 00 34 */ b lbl_80270ACC
lbl_80270A9C:
/* 80270A9C 54 80 02 7F */ clrlwi. r0, r4, 9
/* 80270AA0 41 82 00 0C */ beq lbl_80270AAC
/* 80270AA4 38 00 00 01 */ li r0, 1
/* 80270AA8 48 00 00 28 */ b lbl_80270AD0
lbl_80270AAC:
/* 80270AAC 38 00 00 02 */ li r0, 2
/* 80270AB0 48 00 00 20 */ b lbl_80270AD0
lbl_80270AB4:
/* 80270AB4 54 80 02 7F */ clrlwi. r0, r4, 9
/* 80270AB8 41 82 00 0C */ beq lbl_80270AC4
/* 80270ABC 38 00 00 05 */ li r0, 5
/* 80270AC0 48 00 00 10 */ b lbl_80270AD0
lbl_80270AC4:
/* 80270AC4 38 00 00 03 */ li r0, 3
/* 80270AC8 48 00 00 08 */ b lbl_80270AD0
lbl_80270ACC:
/* 80270ACC 38 00 00 04 */ li r0, 4
lbl_80270AD0:
/* 80270AD0 2C 00 00 01 */ cmpwi r0, 1
/* 80270AD4 40 82 00 0C */ bne lbl_80270AE0
/* 80270AD8 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 80270ADC C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
lbl_80270AE0:
/* 80270AE0 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 80270AE4 FC 1F 00 00 */ fcmpu cr0, f31, f0
/* 80270AE8 41 82 00 68 */ beq lbl_80270B50
/* 80270AEC FC 00 0A 10 */ fabs f0, f1
/* 80270AF0 FC 40 00 18 */ frsp f2, f0
/* 80270AF4 C0 02 B8 00 */ lfs f0, lit_2382(r2)
/* 80270AF8 FC 02 00 40 */ fcmpo cr0, f2, f0
/* 80270AFC 41 80 00 10 */ blt lbl_80270B0C
/* 80270B00 FC 01 F8 40 */ fcmpo cr0, f1, f31
/* 80270B04 4C 40 13 82 */ cror 2, 0, 2
/* 80270B08 40 82 00 24 */ bne lbl_80270B2C
lbl_80270B0C:
/* 80270B0C C0 1F 00 00 */ lfs f0, 0(r31)
/* 80270B10 D0 1E 00 00 */ stfs f0, 0(r30)
/* 80270B14 C0 1F 00 04 */ lfs f0, 4(r31)
/* 80270B18 D0 1E 00 04 */ stfs f0, 4(r30)
/* 80270B1C C0 1F 00 08 */ lfs f0, 8(r31)
/* 80270B20 D0 1E 00 08 */ stfs f0, 8(r30)
/* 80270B24 38 60 00 01 */ li r3, 1
/* 80270B28 48 00 00 48 */ b lbl_80270B70
lbl_80270B2C:
/* 80270B2C 38 61 00 18 */ addi r3, r1, 0x18
/* 80270B30 38 81 00 30 */ addi r4, r1, 0x30
/* 80270B34 EC 3F 08 24 */ fdivs f1, f31, f1
/* 80270B38 4B FF 60 4D */ bl __ml__4cXyzCFf
/* 80270B3C 7F C3 F3 78 */ mr r3, r30
/* 80270B40 38 81 00 18 */ addi r4, r1, 0x18
/* 80270B44 7F C5 F3 78 */ mr r5, r30
/* 80270B48 48 0D 65 6D */ bl PSVECSubtract
/* 80270B4C 48 00 00 20 */ b lbl_80270B6C
lbl_80270B50:
/* 80270B50 FC 00 0A 10 */ fabs f0, f1
/* 80270B54 FC 20 00 18 */ frsp f1, f0
/* 80270B58 C0 02 B8 00 */ lfs f0, lit_2382(r2)
/* 80270B5C FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270B60 40 80 00 0C */ bge lbl_80270B6C
/* 80270B64 38 60 00 01 */ li r3, 1
/* 80270B68 48 00 00 08 */ b lbl_80270B70
lbl_80270B6C:
/* 80270B6C 38 60 00 00 */ li r3, 0
lbl_80270B70:
/* 80270B70 E3 E1 00 58 */ psq_l f31, 88(r1), 0, 0 /* qr0 */
/* 80270B74 CB E1 00 50 */ lfd f31, 0x50(r1)
/* 80270B78 83 E1 00 4C */ lwz r31, 0x4c(r1)
/* 80270B7C 83 C1 00 48 */ lwz r30, 0x48(r1)
/* 80270B80 80 01 00 64 */ lwz r0, 0x64(r1)
/* 80270B84 7C 08 03 A6 */ mtlr r0
/* 80270B88 38 21 00 60 */ addi r1, r1, 0x60
/* 80270B8C 4E 80 00 20 */ blr

136
asm/SSystem/SComponent/c_lib/cLib_chasePos__FP4cXyzRC4cXyzf.s
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lbl_802707AC:
/* 802707AC 94 21 FF B0 */ stwu r1, -0x50(r1)
/* 802707B0 7C 08 02 A6 */ mflr r0
/* 802707B4 90 01 00 54 */ stw r0, 0x54(r1)
/* 802707B8 DB E1 00 40 */ stfd f31, 0x40(r1)
/* 802707BC F3 E1 00 48 */ psq_st f31, 72(r1), 0, 0 /* qr0 */
/* 802707C0 93 E1 00 3C */ stw r31, 0x3c(r1)
/* 802707C4 93 C1 00 38 */ stw r30, 0x38(r1)
/* 802707C8 7C 7E 1B 78 */ mr r30, r3
/* 802707CC 7C 9F 23 78 */ mr r31, r4
/* 802707D0 FF E0 08 90 */ fmr f31, f1
/* 802707D4 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 802707D8 FC 1F 00 00 */ fcmpu cr0, f31, f0
/* 802707DC 41 82 01 7C */ beq lbl_80270958
/* 802707E0 38 61 00 18 */ addi r3, r1, 0x18
/* 802707E4 7F C4 F3 78 */ mr r4, r30
/* 802707E8 7F E5 FB 78 */ mr r5, r31
/* 802707EC 4B FF 63 49 */ bl __mi__4cXyzCFRC3Vec
/* 802707F0 C0 01 00 18 */ lfs f0, 0x18(r1)
/* 802707F4 D0 01 00 24 */ stfs f0, 0x24(r1)
/* 802707F8 C0 01 00 1C */ lfs f0, 0x1c(r1)
/* 802707FC D0 01 00 28 */ stfs f0, 0x28(r1)
/* 80270800 C0 01 00 20 */ lfs f0, 0x20(r1)
/* 80270804 D0 01 00 2C */ stfs f0, 0x2c(r1)
/* 80270808 38 61 00 24 */ addi r3, r1, 0x24
/* 8027080C 48 0D 69 2D */ bl PSVECSquareMag
/* 80270810 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 80270814 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270818 40 81 00 58 */ ble lbl_80270870
/* 8027081C FC 00 08 34 */ frsqrte f0, f1
/* 80270820 C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 80270824 FC 44 00 32 */ fmul f2, f4, f0
/* 80270828 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 8027082C FC 00 00 32 */ fmul f0, f0, f0
/* 80270830 FC 01 00 32 */ fmul f0, f1, f0
/* 80270834 FC 03 00 28 */ fsub f0, f3, f0
/* 80270838 FC 02 00 32 */ fmul f0, f2, f0
/* 8027083C FC 44 00 32 */ fmul f2, f4, f0
/* 80270840 FC 00 00 32 */ fmul f0, f0, f0
/* 80270844 FC 01 00 32 */ fmul f0, f1, f0
/* 80270848 FC 03 00 28 */ fsub f0, f3, f0
/* 8027084C FC 02 00 32 */ fmul f0, f2, f0
/* 80270850 FC 44 00 32 */ fmul f2, f4, f0
/* 80270854 FC 00 00 32 */ fmul f0, f0, f0
/* 80270858 FC 01 00 32 */ fmul f0, f1, f0
/* 8027085C FC 03 00 28 */ fsub f0, f3, f0
/* 80270860 FC 02 00 32 */ fmul f0, f2, f0
/* 80270864 FC 21 00 32 */ fmul f1, f1, f0
/* 80270868 FC 20 08 18 */ frsp f1, f1
/* 8027086C 48 00 00 88 */ b lbl_802708F4
lbl_80270870:
/* 80270870 C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 80270874 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270878 40 80 00 10 */ bge lbl_80270888
/* 8027087C 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 80270880 C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
/* 80270884 48 00 00 70 */ b lbl_802708F4
lbl_80270888:
/* 80270888 D0 21 00 08 */ stfs f1, 8(r1)
/* 8027088C 80 81 00 08 */ lwz r4, 8(r1)
/* 80270890 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 80270894 3C 00 7F 80 */ lis r0, 0x7f80
/* 80270898 7C 03 00 00 */ cmpw r3, r0
/* 8027089C 41 82 00 14 */ beq lbl_802708B0
/* 802708A0 40 80 00 40 */ bge lbl_802708E0
/* 802708A4 2C 03 00 00 */ cmpwi r3, 0
/* 802708A8 41 82 00 20 */ beq lbl_802708C8
/* 802708AC 48 00 00 34 */ b lbl_802708E0
lbl_802708B0:
/* 802708B0 54 80 02 7F */ clrlwi. r0, r4, 9
/* 802708B4 41 82 00 0C */ beq lbl_802708C0
/* 802708B8 38 00 00 01 */ li r0, 1
/* 802708BC 48 00 00 28 */ b lbl_802708E4
lbl_802708C0:
/* 802708C0 38 00 00 02 */ li r0, 2
/* 802708C4 48 00 00 20 */ b lbl_802708E4
lbl_802708C8:
/* 802708C8 54 80 02 7F */ clrlwi. r0, r4, 9
/* 802708CC 41 82 00 0C */ beq lbl_802708D8
/* 802708D0 38 00 00 05 */ li r0, 5
/* 802708D4 48 00 00 10 */ b lbl_802708E4
lbl_802708D8:
/* 802708D8 38 00 00 03 */ li r0, 3
/* 802708DC 48 00 00 08 */ b lbl_802708E4
lbl_802708E0:
/* 802708E0 38 00 00 04 */ li r0, 4
lbl_802708E4:
/* 802708E4 2C 00 00 01 */ cmpwi r0, 1
/* 802708E8 40 82 00 0C */ bne lbl_802708F4
/* 802708EC 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 802708F0 C0 23 0A E0 */ lfs f1, __float_nan@l(r3) /* 0x80450AE0@l */
lbl_802708F4:
/* 802708F4 FC 00 0A 10 */ fabs f0, f1
/* 802708F8 FC 40 00 18 */ frsp f2, f0
/* 802708FC C0 02 B8 00 */ lfs f0, lit_2382(r2)
/* 80270900 FC 02 00 40 */ fcmpo cr0, f2, f0
/* 80270904 41 80 00 10 */ blt lbl_80270914
/* 80270908 FC 01 F8 40 */ fcmpo cr0, f1, f31
/* 8027090C 4C 40 13 82 */ cror 2, 0, 2
/* 80270910 40 82 00 24 */ bne lbl_80270934
lbl_80270914:
/* 80270914 C0 1F 00 00 */ lfs f0, 0(r31)
/* 80270918 D0 1E 00 00 */ stfs f0, 0(r30)
/* 8027091C C0 1F 00 04 */ lfs f0, 4(r31)
/* 80270920 D0 1E 00 04 */ stfs f0, 4(r30)
/* 80270924 C0 1F 00 08 */ lfs f0, 8(r31)
/* 80270928 D0 1E 00 08 */ stfs f0, 8(r30)
/* 8027092C 38 60 00 01 */ li r3, 1
/* 80270930 48 00 00 40 */ b lbl_80270970
lbl_80270934:
/* 80270934 38 61 00 0C */ addi r3, r1, 0xc
/* 80270938 38 81 00 24 */ addi r4, r1, 0x24
/* 8027093C EC 3F 08 24 */ fdivs f1, f31, f1
/* 80270940 4B FF 62 45 */ bl __ml__4cXyzCFf
/* 80270944 7F C3 F3 78 */ mr r3, r30
/* 80270948 38 81 00 0C */ addi r4, r1, 0xc
/* 8027094C 7F C5 F3 78 */ mr r5, r30
/* 80270950 48 0D 67 65 */ bl PSVECSubtract
/* 80270954 48 00 00 18 */ b lbl_8027096C
lbl_80270958:
/* 80270958 4B FF 66 D5 */ bl __eq__4cXyzCFRC3Vec
/* 8027095C 54 60 06 3F */ clrlwi. r0, r3, 0x18
/* 80270960 41 82 00 0C */ beq lbl_8027096C
/* 80270964 38 60 00 01 */ li r3, 1
/* 80270968 48 00 00 08 */ b lbl_80270970
lbl_8027096C:
/* 8027096C 38 60 00 00 */ li r3, 0
lbl_80270970:
/* 80270970 E3 E1 00 48 */ psq_l f31, 72(r1), 0, 0 /* qr0 */
/* 80270974 CB E1 00 40 */ lfd f31, 0x40(r1)
/* 80270978 83 E1 00 3C */ lwz r31, 0x3c(r1)
/* 8027097C 83 C1 00 38 */ lwz r30, 0x38(r1)
/* 80270980 80 01 00 54 */ lwz r0, 0x54(r1)
/* 80270984 7C 08 03 A6 */ mtlr r0
/* 80270988 38 21 00 50 */ addi r1, r1, 0x50
/* 8027098C 4E 80 00 20 */ blr

32
asm/SSystem/SComponent/c_lib/cLib_chaseS__FPsss.s
View File

@ -1,32 +0,0 @@
lbl_802706D0:
/* 802706D0 7C A0 07 35 */ extsh. r0, r5
/* 802706D4 41 82 00 4C */ beq lbl_80270720
/* 802706D8 A8 C3 00 00 */ lha r6, 0(r3)
/* 802706DC 7C 80 07 34 */ extsh r0, r4
/* 802706E0 7C 06 00 00 */ cmpw r6, r0
/* 802706E4 40 81 00 0C */ ble lbl_802706F0
/* 802706E8 7C 05 00 D0 */ neg r0, r5
/* 802706EC 7C 05 07 34 */ extsh r5, r0
lbl_802706F0:
/* 802706F0 A8 03 00 00 */ lha r0, 0(r3)
/* 802706F4 7C 00 2A 14 */ add r0, r0, r5
/* 802706F8 B0 03 00 00 */ sth r0, 0(r3)
/* 802706FC 7C A6 07 34 */ extsh r6, r5
/* 80270700 7C 85 07 34 */ extsh r5, r4
/* 80270704 A8 03 00 00 */ lha r0, 0(r3)
/* 80270708 7C 05 00 50 */ subf r0, r5, r0
/* 8027070C 7C 06 01 D7 */ mullw. r0, r6, r0
/* 80270710 41 80 00 28 */ blt lbl_80270738
/* 80270714 B0 83 00 00 */ sth r4, 0(r3)
/* 80270718 38 60 00 01 */ li r3, 1
/* 8027071C 4E 80 00 20 */ blr
lbl_80270720:
/* 80270720 A8 63 00 00 */ lha r3, 0(r3)
/* 80270724 7C 80 07 34 */ extsh r0, r4
/* 80270728 7C 03 00 00 */ cmpw r3, r0
/* 8027072C 40 82 00 0C */ bne lbl_80270738
/* 80270730 38 60 00 01 */ li r3, 1
/* 80270734 4E 80 00 20 */ blr
lbl_80270738:
/* 80270738 38 60 00 00 */ li r3, 0
/* 8027073C 4E 80 00 20 */ blr

34
asm/SSystem/SComponent/c_lib/cLib_chaseUC__FPUcUcUc.s
View File

@ -1,34 +0,0 @@
lbl_8027065C:
/* 8027065C 54 A5 06 3F */ clrlwi. r5, r5, 0x18
/* 80270660 41 82 00 50 */ beq lbl_802706B0
/* 80270664 88 E3 00 00 */ lbz r7, 0(r3)
/* 80270668 54 88 06 3E */ clrlwi r8, r4, 0x18
/* 8027066C 7C E0 07 34 */ extsh r0, r7
/* 80270670 7C 00 40 00 */ cmpw r0, r8
/* 80270674 40 81 00 0C */ ble lbl_80270680
/* 80270678 7C 05 00 D0 */ neg r0, r5
/* 8027067C 7C 05 07 34 */ extsh r5, r0
lbl_80270680:
/* 80270680 7C E7 2A 14 */ add r7, r7, r5
/* 80270684 7C A6 07 34 */ extsh r6, r5
/* 80270688 7D 05 07 34 */ extsh r5, r8
/* 8027068C 7C E0 07 34 */ extsh r0, r7
/* 80270690 7C 05 00 50 */ subf r0, r5, r0
/* 80270694 7C 06 01 D7 */ mullw. r0, r6, r0
/* 80270698 41 80 00 10 */ blt lbl_802706A8
/* 8027069C 98 83 00 00 */ stb r4, 0(r3)
/* 802706A0 38 60 00 01 */ li r3, 1
/* 802706A4 4E 80 00 20 */ blr
lbl_802706A8:
/* 802706A8 98 E3 00 00 */ stb r7, 0(r3)
/* 802706AC 48 00 00 1C */ b lbl_802706C8
lbl_802706B0:
/* 802706B0 88 63 00 00 */ lbz r3, 0(r3)
/* 802706B4 54 80 06 3E */ clrlwi r0, r4, 0x18
/* 802706B8 7C 03 00 40 */ cmplw r3, r0
/* 802706BC 40 82 00 0C */ bne lbl_802706C8
/* 802706C0 38 60 00 01 */ li r3, 1
/* 802706C4 4E 80 00 20 */ blr
lbl_802706C8:
/* 802706C8 38 60 00 00 */ li r3, 0
/* 802706CC 4E 80 00 20 */ blr

26
asm/SSystem/SComponent/c_lib/cLib_offsetPos__FP4cXyzPC4cXyzsPC4cXyz.s
View File

@ -1,26 +0,0 @@
lbl_80270DC0:
/* 80270DC0 3C E0 80 44 */ lis r7, sincosTable___5JMath@ha /* 0x80439A20@ha */
/* 80270DC4 38 E7 9A 20 */ addi r7, r7, sincosTable___5JMath@l /* 0x80439A20@l */
/* 80270DC8 54 A0 04 38 */ rlwinm r0, r5, 0, 0x10, 0x1c
/* 80270DCC 7C A7 02 14 */ add r5, r7, r0
/* 80270DD0 C0 A5 00 04 */ lfs f5, 4(r5)
/* 80270DD4 7C C7 04 2E */ lfsx f6, r7, r0
/* 80270DD8 C0 44 00 00 */ lfs f2, 0(r4)
/* 80270DDC C0 86 00 00 */ lfs f4, 0(r6)
/* 80270DE0 EC 24 01 72 */ fmuls f1, f4, f5
/* 80270DE4 C0 66 00 08 */ lfs f3, 8(r6)
/* 80270DE8 EC 03 01 B2 */ fmuls f0, f3, f6
/* 80270DEC EC 01 00 2A */ fadds f0, f1, f0
/* 80270DF0 EC 02 00 2A */ fadds f0, f2, f0
/* 80270DF4 D0 03 00 00 */ stfs f0, 0(r3)
/* 80270DF8 C0 24 00 04 */ lfs f1, 4(r4)
/* 80270DFC C0 06 00 04 */ lfs f0, 4(r6)
/* 80270E00 EC 01 00 2A */ fadds f0, f1, f0
/* 80270E04 D0 03 00 04 */ stfs f0, 4(r3)
/* 80270E08 C0 44 00 08 */ lfs f2, 8(r4)
/* 80270E0C EC 23 01 72 */ fmuls f1, f3, f5
/* 80270E10 EC 04 01 B2 */ fmuls f0, f4, f6
/* 80270E14 EC 01 00 28 */ fsubs f0, f1, f0
/* 80270E18 EC 02 00 2A */ fadds f0, f2, f0
/* 80270E1C D0 03 00 08 */ stfs f0, 8(r3)
/* 80270E20 4E 80 00 20 */ blr

94
asm/SSystem/SComponent/c_lib/cLib_targetAngleX__FPC4cXyzPC4cXyz.s
View File

@ -1,94 +0,0 @@
lbl_80270C74:
/* 80270C74 94 21 FF D0 */ stwu r1, -0x30(r1)
/* 80270C78 7C 08 02 A6 */ mflr r0
/* 80270C7C 90 01 00 34 */ stw r0, 0x34(r1)
/* 80270C80 7C 65 1B 78 */ mr r5, r3
/* 80270C84 38 61 00 18 */ addi r3, r1, 0x18
/* 80270C88 4B FF 5E AD */ bl __mi__4cXyzCFRC3Vec
/* 80270C8C C0 41 00 18 */ lfs f2, 0x18(r1)
/* 80270C90 D0 41 00 24 */ stfs f2, 0x24(r1)
/* 80270C94 C0 01 00 1C */ lfs f0, 0x1c(r1)
/* 80270C98 D0 01 00 28 */ stfs f0, 0x28(r1)
/* 80270C9C C0 21 00 20 */ lfs f1, 0x20(r1)
/* 80270CA0 D0 21 00 2C */ stfs f1, 0x2c(r1)
/* 80270CA4 D0 41 00 0C */ stfs f2, 0xc(r1)
/* 80270CA8 C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 80270CAC D0 01 00 10 */ stfs f0, 0x10(r1)
/* 80270CB0 D0 21 00 14 */ stfs f1, 0x14(r1)
/* 80270CB4 38 61 00 0C */ addi r3, r1, 0xc
/* 80270CB8 48 0D 64 81 */ bl PSVECSquareMag
/* 80270CBC C0 02 B7 E0 */ lfs f0, lit_2262(r2)
/* 80270CC0 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270CC4 40 81 00 58 */ ble lbl_80270D1C
/* 80270CC8 FC 00 08 34 */ frsqrte f0, f1
/* 80270CCC C8 82 B7 E8 */ lfd f4, lit_2379(r2)
/* 80270CD0 FC 44 00 32 */ fmul f2, f4, f0
/* 80270CD4 C8 62 B7 F0 */ lfd f3, lit_2380(r2)
/* 80270CD8 FC 00 00 32 */ fmul f0, f0, f0
/* 80270CDC FC 01 00 32 */ fmul f0, f1, f0
/* 80270CE0 FC 03 00 28 */ fsub f0, f3, f0
/* 80270CE4 FC 02 00 32 */ fmul f0, f2, f0
/* 80270CE8 FC 44 00 32 */ fmul f2, f4, f0
/* 80270CEC FC 00 00 32 */ fmul f0, f0, f0
/* 80270CF0 FC 01 00 32 */ fmul f0, f1, f0
/* 80270CF4 FC 03 00 28 */ fsub f0, f3, f0
/* 80270CF8 FC 02 00 32 */ fmul f0, f2, f0
/* 80270CFC FC 44 00 32 */ fmul f2, f4, f0
/* 80270D00 FC 00 00 32 */ fmul f0, f0, f0
/* 80270D04 FC 01 00 32 */ fmul f0, f1, f0
/* 80270D08 FC 03 00 28 */ fsub f0, f3, f0
/* 80270D0C FC 02 00 32 */ fmul f0, f2, f0
/* 80270D10 FC 41 00 32 */ fmul f2, f1, f0
/* 80270D14 FC 40 10 18 */ frsp f2, f2
/* 80270D18 48 00 00 90 */ b lbl_80270DA8
lbl_80270D1C:
/* 80270D1C C8 02 B7 F8 */ lfd f0, lit_2381(r2)
/* 80270D20 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 80270D24 40 80 00 10 */ bge lbl_80270D34
/* 80270D28 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 80270D2C C0 43 0A E0 */ lfs f2, __float_nan@l(r3) /* 0x80450AE0@l */
/* 80270D30 48 00 00 78 */ b lbl_80270DA8
lbl_80270D34:
/* 80270D34 D0 21 00 08 */ stfs f1, 8(r1)
/* 80270D38 80 81 00 08 */ lwz r4, 8(r1)
/* 80270D3C 54 83 00 50 */ rlwinm r3, r4, 0, 1, 8
/* 80270D40 3C 00 7F 80 */ lis r0, 0x7f80
/* 80270D44 7C 03 00 00 */ cmpw r3, r0
/* 80270D48 41 82 00 14 */ beq lbl_80270D5C
/* 80270D4C 40 80 00 40 */ bge lbl_80270D8C
/* 80270D50 2C 03 00 00 */ cmpwi r3, 0
/* 80270D54 41 82 00 20 */ beq lbl_80270D74
/* 80270D58 48 00 00 34 */ b lbl_80270D8C
lbl_80270D5C:
/* 80270D5C 54 80 02 7F */ clrlwi. r0, r4, 9
/* 80270D60 41 82 00 0C */ beq lbl_80270D6C
/* 80270D64 38 00 00 01 */ li r0, 1
/* 80270D68 48 00 00 28 */ b lbl_80270D90
lbl_80270D6C:
/* 80270D6C 38 00 00 02 */ li r0, 2
/* 80270D70 48 00 00 20 */ b lbl_80270D90
lbl_80270D74:
/* 80270D74 54 80 02 7F */ clrlwi. r0, r4, 9
/* 80270D78 41 82 00 0C */ beq lbl_80270D84
/* 80270D7C 38 00 00 05 */ li r0, 5
/* 80270D80 48 00 00 10 */ b lbl_80270D90
lbl_80270D84:
/* 80270D84 38 00 00 03 */ li r0, 3
/* 80270D88 48 00 00 08 */ b lbl_80270D90
lbl_80270D8C:
/* 80270D8C 38 00 00 04 */ li r0, 4
lbl_80270D90:
/* 80270D90 2C 00 00 01 */ cmpwi r0, 1
/* 80270D94 40 82 00 10 */ bne lbl_80270DA4
/* 80270D98 3C 60 80 45 */ lis r3, __float_nan@ha /* 0x80450AE0@ha */
/* 80270D9C C0 43 0A E0 */ lfs f2, __float_nan@l(r3) /* 0x80450AE0@l */
/* 80270DA0 48 00 00 08 */ b lbl_80270DA8
lbl_80270DA4:
/* 80270DA4 FC 40 08 90 */ fmr f2, f1
lbl_80270DA8:
/* 80270DA8 C0 21 00 28 */ lfs f1, 0x28(r1)
/* 80270DAC 4B FF 68 C9 */ bl cM_atan2s__Fff
/* 80270DB0 80 01 00 34 */ lwz r0, 0x34(r1)
/* 80270DB4 7C 08 03 A6 */ mtlr r0
/* 80270DB8 38 21 00 30 */ addi r1, r1, 0x30
/* 80270DBC 4E 80 00 20 */ blr

2
include/SSystem/SComponent/c_lib.h
View File

@ -7,7 +7,7 @@
#include "msl_c/math.h"
inline bool cLib_IsZero(f32 f) {
return fabsf(f) < 8e-11;
return fabsf(f) < 8e-11f;
}
void cLib_memCpy(void* dst, const void* src, unsigned long size);

2
include/SSystem/SComponent/c_xyz.h
View File

@ -121,6 +121,8 @@ struct cXyz : Vec {
}
f32 abs() const { return sqrtf(this->abs2()); }
f32 abs(const Vec& other) const { return sqrtf(this->abs2(other)); }
f32 absXZ() const { return sqrtf(this->abs2XZ()); }
f32 absXZ(const Vec& other) const { return sqrtf(this->abs2XZ(other)); }
f32 getMagXZ() const { return cXyz(this->x, 0, this->z).getSquareMag(); }
};

399
libs/SSystem/SComponent/c_lib.cpp
View File

@ -5,7 +5,7 @@
#include "SSystem/SComponent/c_lib.h"
#include "JSystem/JMath/JMath.h"
#include "MSL_C.PPCEABI.bare.H/MSL_Common/src/string.h"
#include "MSL_C.PPCEABI.bare.H/MSL_Common/Src/string.h"
#include "SSystem/SComponent/c_math.h"
#include "SSystem/SComponent/c_xyz.h"
#include "dol2asm.h"
@ -13,51 +13,6 @@
#include "dolphin/types.h"
#include "msl_c/math.h"
//
// Forward References:
//
extern "C" void cLib_memCpy__FPvPCvUl();
extern "C" void cLib_memSet__FPviUl();
extern "C" void cLib_addCalc__FPfffff();
extern "C" void cLib_addCalc2__FPffff();
extern "C" void cLib_addCalc0__FPfff();
extern "C" void cLib_addCalcPos__FP4cXyzRC4cXyzfff();
extern "C" void cLib_addCalcPosXZ__FP4cXyzRC4cXyzfff();
extern "C" void cLib_addCalcPos2__FP4cXyzRC4cXyzff();
extern "C" void cLib_addCalcPosXZ2__FP4cXyzRC4cXyzff();
extern "C" void cLib_addCalcAngleS__FPsssss();
extern "C" void cLib_addCalcAngleS2__FPssss();
extern "C" void cLib_chaseUC__FPUcUcUc();
extern "C" void cLib_chaseS__FPsss();
extern "C" void cLib_chaseF__FPfff();
extern "C" void cLib_chasePos__FP4cXyzRC4cXyzf();
extern "C" void cLib_chasePosXZ__FP4cXyzRC4cXyzf();
extern "C" void cLib_chaseAngleS__FPsss();
extern "C" void cLib_targetAngleY__FPC3VecPC3Vec();
extern "C" void cLib_targetAngleY__FRC3VecRC3Vec();
extern "C" void cLib_targetAngleX__FPC4cXyzPC4cXyz();
extern "C" void cLib_offsetPos__FP4cXyzPC4cXyzsPC4cXyz();
extern "C" void cLib_distanceAngleS__Fss();
extern "C" void MtxInit__Fv();
extern "C" void MtxTrans__FfffUc();
extern "C" void MtxScale__FfffUc();
extern "C" void MtxPosition__FP4cXyzP4cXyz();
extern "C" void MtxPush__Fv();
extern "C" void MtxPull__Fv();
//
// External References:
//
extern "C" void __mi__4cXyzCFRC3Vec();
extern "C" void __ml__4cXyzCFf();
extern "C" void normZP__4cXyzCFv();
extern "C" bool __eq__4cXyzCFRC3Vec();
extern "C" bool __ne__4cXyzCFRC3Vec();
extern "C" void cM_atan2s__Fff();
extern "C" u8 sincosTable___5JMath[65536];
//
// Declarations:
//
@ -72,38 +27,30 @@ void cLib_memSet(void* ptr, int value, unsigned long size) {
memset(ptr, value, size);
}
/* ############################################################################################## */
/* 804551E0-804551E8 0037E0 0004+04 9/9 0/0 0/0 .sdata2 @2262 */
SECTION_SDATA2 static f32 lit_2262[1 + 1 /* padding */] = {
0.0f,
/* padding */
0.0f,
};
/* 8026F97C-8026FA3C 26A2BC 00C0+00 0/0 50/50 178/178 .text cLib_addCalc__FPfffff */
f32 cLib_addCalc(f32* pValue, f32 target, f32 scale, f32 minStep, f32 maxStep) {
f32 cLib_addCalc(f32* pValue, f32 target, f32 scale, f32 maxStep, f32 minStep) {
if (*pValue != target) {
f32 step = scale * (target - *pValue);
if (step >= maxStep || step <= -maxStep) {
if (step > minStep) {
step = minStep;
if (step >= minStep || step <= -minStep) {
if (step > maxStep) {
step = maxStep;
}
if (step < -minStep) {
step = -minStep;
if (step < -maxStep) {
step = -maxStep;
}
*pValue += step;
} else {
if (step > FLOAT_LABEL(/* 0.0f */ lit_2262)) {
if (step < maxStep) {
*pValue += maxStep;
if (step > 0) {
if (step < minStep) {
*pValue += minStep;
if (*pValue > target) {
*pValue = target;
}
}
} else {
maxStep = -maxStep;
if (step > maxStep) {
*pValue += maxStep;
minStep = -minStep;
if (step > minStep) {
*pValue += minStep;
if (*pValue < target) {
*pValue = target;
}
@ -138,42 +85,21 @@ void cLib_addCalc0(f32* pValue, f32 scale, f32 maxStep) {
*pValue -= step;
}
/* ############################################################################################## */
/* 804551E8-804551F0 0037E8 0008+00 7/7 0/0 0/0 .sdata2 @2379 */
SECTION_SDATA2 static f64 lit_2379 = 0.5;
/* 804551F0-804551F8 0037F0 0008+00 7/7 0/0 0/0 .sdata2 @2380 */
SECTION_SDATA2 static f64 lit_2380 = 3.0;
/* 804551F8-80455200 0037F8 0008+00 7/7 0/0 0/0 .sdata2 @2381 */
SECTION_SDATA2 static u8 lit_2381[8] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
};
/* 80455200-80455208 003800 0004+04 5/5 0/0 0/0 .sdata2 @2382 */
SECTION_SDATA2 static f32 lit_2382[1 + 1 /* padding */] = {
7.999999968033578e-11f,
/* padding */
0.0f,
};
/* 8026FAB8-8026FDF4 26A3F8 033C+00 0/0 3/3 78/78 .text cLib_addCalcPos__FP4cXyzRC4cXyzfff */
#ifdef NON_MATCHING
// matches besides data
f32 cLib_addCalcPos(cXyz* pValue, cXyz const& target, f32 scale, f32 param_3, f32 param_4) {
f32 cLib_addCalcPos(cXyz* pValue, cXyz const& target, f32 scale, f32 maxStep, f32 minStep) {
if (*pValue != target) {
cXyz diff = (*pValue - target);
f32 step = diff.abs();
if (step < param_4) {
if (step < minStep) {
*pValue = target;
} else {
step *= scale;
diff *= scale;
if (!cLib_IsZero(step)) {
if (step > param_3) {
diff *= (param_3 / step);
} else if (step < param_4) {
diff *= (param_4 / step);
if (step > maxStep) {
diff *= (maxStep / step);
} else if (step < minStep) {
diff *= (minStep / step);
}
*pValue -= diff;
} else {
@ -183,129 +109,216 @@ f32 cLib_addCalcPos(cXyz* pValue, cXyz const& target, f32 scale, f32 param_3, f3
}
return pValue->abs(target);
}
#else
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm f32 cLib_addCalcPos(cXyz* param_0, cXyz const& param_1, f32 param_2, f32 param_3, f32 param_4) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_addCalcPos__FP4cXyzRC4cXyzfff.s"
}
#pragma pop
#endif
/* 8026FDF4-80270178 26A734 0384+00 0/0 1/1 4/4 .text cLib_addCalcPosXZ__FP4cXyzRC4cXyzfff */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm f32 cLib_addCalcPosXZ(cXyz* param_0, cXyz const& param_1, f32 param_2, f32 param_3,
f32 param_4) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_addCalcPosXZ__FP4cXyzRC4cXyzfff.s"
f32 cLib_addCalcPosXZ(cXyz* pValue, cXyz const& target, f32 scale, f32 maxStep, f32 minStep) {
if (pValue->x != target.x || pValue->z != target.z) {
cXyz diff = (*pValue - target);
f32 step = diff.absXZ();
if (step < minStep) {
pValue->x = target.x;
pValue->z = target.z;
} else {
step *= scale;
diff *= scale;
if (!cLib_IsZero(step)) {
if (step > maxStep) {
diff *= (maxStep / step);
} else if (step < minStep) {
diff *= (minStep / step);
}
pValue->x -= diff.x;
pValue->z -= diff.z;
} else {
pValue->x = target.x;
pValue->z = target.z;
}
}
}
return (*pValue - target).absXZ();
}
#pragma pop
/* 80270178-80270350 26AAB8 01D8+00 0/0 2/2 33/33 .text cLib_addCalcPos2__FP4cXyzRC4cXyzff */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void cLib_addCalcPos2(cXyz* param_0, cXyz const& param_1, f32 param_2, f32 param_3) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_addCalcPos2__FP4cXyzRC4cXyzff.s"
void cLib_addCalcPos2(cXyz* pValue, cXyz const& target, f32 scale, f32 maxStep) {
if (*pValue != target) {
cXyz diff = (*pValue - target) * scale;
if (diff.abs() > maxStep) {
diff = diff.normZP();
diff *= maxStep;
}
*pValue -= diff;
}
}
#pragma pop
/* 80270350-80270540 26AC90 01F0+00 0/0 0/0 4/4 .text cLib_addCalcPosXZ2__FP4cXyzRC4cXyzff */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void cLib_addCalcPosXZ2(cXyz* param_0, cXyz const& param_1, f32 param_2, f32 param_3) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_addCalcPosXZ2__FP4cXyzRC4cXyzff.s"
void cLib_addCalcPosXZ2(cXyz* pValue, cXyz const& target, f32 scale, f32 maxStep) {
if (pValue->x != target.x || pValue->z != target.z) {
cXyz diff = (*pValue - target) * scale;
f32 step = diff.absXZ();
if (!cLib_IsZero(step)) {
if (step > maxStep) {
diff *= (maxStep / step);
}
pValue->x -= diff.x;
pValue->z -= diff.z;
}
}
}
#pragma pop
/* 80270540-80270608 26AE80 00C8+00 0/0 81/81 244/244 .text cLib_addCalcAngleS__FPsssss
*/
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm s16 cLib_addCalcAngleS(s16* param_0, s16 param_1, s16 param_2, s16 param_3, s16 param_4) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_addCalcAngleS__FPsssss.s"
s16 cLib_addCalcAngleS(s16* pValue, s16 target, s16 scale, s16 maxStep, s16 minStep) {
s16 diff = target - *pValue;
if (*pValue != target) {
s16 step = (diff) / scale;
if (step > minStep || step < -minStep) {
if (step > maxStep) {
step = maxStep;
}
if (step < -maxStep) {
step = -maxStep;
}
*pValue += step;
} else {
if (0 <= diff) {
*pValue += minStep;
diff = target - *pValue;
if (0 >= diff) {
*pValue = target;
}
} else {
*pValue -= minStep;
diff = target - *pValue;
if (0 <= diff) {
*pValue = target;
}
}
}
}
return target - *pValue;
}
#pragma pop
/* 80270608-8027065C 26AF48 0054+00 0/0 2/2 849/849 .text cLib_addCalcAngleS2__FPssss */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void cLib_addCalcAngleS2(s16* param_0, s16 param_1, s16 param_2, s16 param_3) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_addCalcAngleS2__FPssss.s"
void cLib_addCalcAngleS2(s16* pValue, s16 target, s16 scale, s16 maxStep) {
s16 diff = target - *pValue;
s16 step = diff / scale;
if (step > maxStep) {
*pValue += maxStep;
} else if (step < -maxStep) {
*pValue -= maxStep;
} else {
*pValue += step;
}
}
#pragma pop
/* 8027065C-802706D0 26AF9C 0074+00 0/0 3/3 14/14 .text cLib_chaseUC__FPUcUcUc */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm int cLib_chaseUC(u8* param_0, u8 param_1, u8 param_2) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_chaseUC__FPUcUcUc.s"
int cLib_chaseUC(u8* pValue, u8 target, u8 step) {
if (step) {
s16 wideValue = *pValue;
s16 wideTarget = target;
s16 wideStep;
if (wideValue > wideTarget) {
wideStep = -step;
} else {
wideStep = step;
}
wideValue += wideStep;
if (wideStep * (wideValue - wideTarget) >= 0) {
*pValue = target;
return 1;
} else {
*pValue = wideValue;
}
} else if (*pValue == target) {
return 1;
}
return 0;
}
#pragma pop
/* 802706D0-80270740 26B010 0070+00 0/0 4/4 49/49 .text cLib_chaseS__FPsss */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm int cLib_chaseS(s16* param_0, s16 param_1, s16 param_2) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_chaseS__FPsss.s"
int cLib_chaseS(s16* pValue, s16 target, s16 step) {
if (step) {
if (*pValue > target) {
step = -step;
}
*pValue += step;
if (step * (*pValue - target) >= 0) {
*pValue = target;
return 1;
}
} else if (*pValue == target) {
return 1;
}
return 0;
}
#pragma pop
/* 80270740-802707AC 26B080 006C+00 0/0 70/70 448/448 .text cLib_chaseF__FPfff */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm int cLib_chaseF(f32* param_0, f32 param_1, f32 param_2) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_chaseF__FPfff.s"
int cLib_chaseF(f32* pValue, f32 target, f32 step) {
if (step) {
if (*pValue > target) {
step = -step;
}
*pValue += step;
if (step * (*pValue - target) >= 0) {
*pValue = target;
return 1;
}
} else if (*pValue == target) {
return 1;
}
return 0;
}
#pragma pop
/* 802707AC-80270990 26B0EC 01E4+00 0/0 3/3 60/60 .text cLib_chasePos__FP4cXyzRC4cXyzf */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm int cLib_chasePos(cXyz* param_0, cXyz const& param_1, f32 param_2) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_chasePos__FP4cXyzRC4cXyzf.s"
int cLib_chasePos(cXyz* pValue, cXyz const& target, f32 step) {
if (step) {
cXyz diff = *pValue - target;
f32 diffF = diff.abs();
if (cLib_IsZero(diffF) || diffF <= step) {
*pValue = target;
return 1;
}
*pValue -= diff * (step / diffF);
} else if (*pValue == target) {
return 1;
}
return 0;
}
#pragma pop
/* 80270990-80270B90 26B2D0 0200+00 0/0 1/0 19/19 .text cLib_chasePosXZ__FP4cXyzRC4cXyzf
*/
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm int cLib_chasePosXZ(cXyz* param_0, cXyz const& param_1, f32 param_2) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_chasePosXZ__FP4cXyzRC4cXyzf.s"
int cLib_chasePosXZ(cXyz* pValue, cXyz const& target, f32 step) {
cXyz diff = *pValue - target;
diff.y = 0;
f32 diffF = diff.absXZ();
if (step) {
if (cLib_IsZero(diffF) || diffF <= step) {
*pValue = target;
return 1;
}
*pValue -= diff * (step / diffF);
} else if (cLib_IsZero(diffF)) {
return 1;
}
return 0;
}
#pragma pop
/* 80270B90-80270C04 26B4D0 0074+00 0/0 4/4 213/213 .text cLib_chaseAngleS__FPsss */
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm int cLib_chaseAngleS(s16* param_0, s16 param_1, s16 param_2) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_chaseAngleS__FPsss.s"
int cLib_chaseAngleS(s16* pValue, s16 target, s16 step) {
if (step) {
if ((s16)(*pValue - target) > 0) {
step = -step;
}
*pValue += step;
if (step * (s16)(*pValue - target) >= 0) {
*pValue = target;
return 1;
}
} else if (*pValue == target) {
return 1;
}
return 0;
}
#pragma pop
/* 80270C04-80270C3C 26B544 0038+00 0/0 39/39 454/454 .text cLib_targetAngleY__FPC3VecPC3Vec */
s16 cLib_targetAngleY(const Vec* lhs, const Vec* rhs) {
@ -318,34 +331,22 @@ s16 cLib_targetAngleY(const Vec& lhs, const Vec& rhs) {
}
/* 80270C74-80270DC0 26B5B4 014C+00 0/0 2/2 109/109 .text cLib_targetAngleX__FPC4cXyzPC4cXyz */
#ifdef NON_MATCHING
s16 cLib_targetAngleX(cXyz const* param_0, cXyz const* param_1) {
// would match with all float literals
cXyz diff = *param_1 - *param_0;
f32 f1 = sqrtf(diff.getMagXZ());
return cM_atan2s(diff.GetY(), f1);
}
#else
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm s16 cLib_targetAngleX(cXyz const* param_0, cXyz const* param_1) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_targetAngleX__FPC4cXyzPC4cXyz.s"
}
#pragma pop
#endif
/* 80270DC0-80270E24 26B700 0064+00 0/0 2/2 118/118 .text cLib_offsetPos__FP4cXyzPC4cXyzsPC4cXyz
*/
#pragma push
#pragma optimization_level 0
#pragma optimizewithasm off
asm void cLib_offsetPos(cXyz* param_0, cXyz const* param_1, s16 param_2, cXyz const* param_3) {
nofralloc
#include "asm/SSystem/SComponent/c_lib/cLib_offsetPos__FP4cXyzPC4cXyzsPC4cXyz.s"
void cLib_offsetPos(cXyz* pDest, cXyz const* pSrc, s16 angle, cXyz const* vec) {
f32 cos = cM_scos(angle);
f32 sin = cM_ssin(angle);
pDest->x = pSrc->x + (vec->x * cos + vec->z * sin);
pDest->y = pSrc->y + vec->y;
pDest->z = pSrc->z + (vec->z * cos - vec->x * sin);
}
#pragma pop
/* 80270E24-80270E4C 26B764 0028+00 0/0 48/48 71/71 .text cLib_distanceAngleS__Fss */
s32 cLib_distanceAngleS(s16 x, s16 y) {